Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r524-tall-171679080300434.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is SafeBus-PT-15, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r524-tall-171679080300434
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 12M
-rw-r--r-- 1 mcc users 28K Apr 12 15:36 CTLCardinality.txt
-rw-r--r-- 1 mcc users 202K Apr 12 15:36 CTLCardinality.xml
-rw-r--r-- 1 mcc users 961K Apr 12 15:31 CTLFireability.txt
-rw-r--r-- 1 mcc users 4.0M Apr 12 15:31 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 17K Apr 23 07:49 LTLCardinality.txt
-rw-r--r-- 1 mcc users 70K Apr 23 07:49 LTLCardinality.xml
-rw-r--r-- 1 mcc users 111K Apr 23 07:49 LTLFireability.txt
-rw-r--r-- 1 mcc users 339K Apr 23 07:49 LTLFireability.xml
-rw-r--r-- 1 mcc users 88K Apr 12 16:33 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 488K Apr 12 16:33 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 378K Apr 12 16:25 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 1.7M Apr 12 16:25 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.5K Apr 23 07:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.9K Apr 23 07:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 3.5M May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SafeBus-PT-15-CTLFireability-2024-00
FORMULA_NAME SafeBus-PT-15-CTLFireability-2024-01
FORMULA_NAME SafeBus-PT-15-CTLFireability-2024-02
FORMULA_NAME SafeBus-PT-15-CTLFireability-2024-03
FORMULA_NAME SafeBus-PT-15-CTLFireability-2024-04
FORMULA_NAME SafeBus-PT-15-CTLFireability-2024-05
FORMULA_NAME SafeBus-PT-15-CTLFireability-2024-06
FORMULA_NAME SafeBus-PT-15-CTLFireability-2024-07
FORMULA_NAME SafeBus-PT-15-CTLFireability-2024-08
FORMULA_NAME SafeBus-PT-15-CTLFireability-2024-09
FORMULA_NAME SafeBus-PT-15-CTLFireability-2024-10
FORMULA_NAME SafeBus-PT-15-CTLFireability-2024-11
FORMULA_NAME SafeBus-PT-15-CTLFireability-2024-12
FORMULA_NAME SafeBus-PT-15-CTLFireability-2024-13
FORMULA_NAME SafeBus-PT-15-CTLFireability-2024-14
FORMULA_NAME SafeBus-PT-15-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717227021143

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SafeBus-PT-15
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 07:30:22] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 07:30:22] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 07:30:22] [INFO ] Load time of PNML (sax parser for PT used): 294 ms
[2024-06-01 07:30:22] [INFO ] Transformed 621 places.
[2024-06-01 07:30:22] [INFO ] Transformed 4771 transitions.
[2024-06-01 07:30:22] [INFO ] Found NUPN structural information;
[2024-06-01 07:30:22] [INFO ] Parsed PT model containing 621 places and 4771 transitions and 34549 arcs in 426 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 129 ms.
Reduce places removed 15 places and 0 transitions.
Support contains 606 out of 606 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 38 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
[2024-06-01 07:30:23] [INFO ] Flow matrix only has 1412 transitions (discarded 3359 similar events)
// Phase 1: matrix 1412 rows 606 cols
[2024-06-01 07:30:24] [INFO ] Computed 65 invariants in 114 ms
[2024-06-01 07:30:24] [INFO ] Implicit Places using invariants in 665 ms returned []
[2024-06-01 07:30:24] [INFO ] Flow matrix only has 1412 transitions (discarded 3359 similar events)
[2024-06-01 07:30:24] [INFO ] Invariant cache hit.
[2024-06-01 07:30:25] [INFO ] State equation strengthened by 241 read => feed constraints.
[2024-06-01 07:30:25] [INFO ] Implicit Places using invariants and state equation in 684 ms returned []
Implicit Place search using SMT with State Equation took 1378 ms to find 0 implicit places.
Running 4756 sub problems to find dead transitions.
[2024-06-01 07:30:25] [INFO ] Flow matrix only has 1412 transitions (discarded 3359 similar events)
[2024-06-01 07:30:25] [INFO ] Invariant cache hit.
[2024-06-01 07:30:25] [INFO ] State equation strengthened by 241 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/606 variables, 606/606 constraints. Problems are: Problem set: 0 solved, 4756 unsolved
SMT process timed out in 59082ms, After SMT, problems are : Problem set: 0 solved, 4756 unsolved
Search for dead transitions found 0 dead transitions in 59156ms
Finished structural reductions in LTL mode , in 1 iterations and 60614 ms. Remains : 606/606 places, 4771/4771 transitions.
Support contains 606 out of 606 places after structural reductions.
[2024-06-01 07:31:26] [INFO ] Flatten gal took : 759 ms
[2024-06-01 07:31:32] [INFO ] Flatten gal took : 795 ms
[2024-06-01 07:31:38] [INFO ] Input system was already deterministic with 4771 transitions.
Reduction of identical properties reduced properties to check from 69 to 66
RANDOM walk for 40000 steps (8 resets) in 4035 ms. (9 steps per ms) remains 8/66 properties
BEST_FIRST walk for 40003 steps (8 resets) in 1205 ms. (33 steps per ms) remains 8/8 properties
BEST_FIRST walk for 40004 steps (8 resets) in 13973 ms. (2 steps per ms) remains 8/8 properties
BEST_FIRST walk for 40004 steps (8 resets) in 431 ms. (92 steps per ms) remains 8/8 properties
BEST_FIRST walk for 40001 steps (8 resets) in 1413 ms. (28 steps per ms) remains 8/8 properties
BEST_FIRST walk for 40004 steps (8 resets) in 376 ms. (106 steps per ms) remains 8/8 properties
BEST_FIRST walk for 40003 steps (8 resets) in 488 ms. (81 steps per ms) remains 7/8 properties
BEST_FIRST walk for 40002 steps (8 resets) in 445 ms. (89 steps per ms) remains 7/7 properties
BEST_FIRST walk for 40002 steps (8 resets) in 506 ms. (78 steps per ms) remains 7/7 properties
[2024-06-01 07:31:46] [INFO ] Flow matrix only has 1412 transitions (discarded 3359 similar events)
[2024-06-01 07:31:46] [INFO ] Invariant cache hit.
[2024-06-01 07:31:46] [INFO ] State equation strengthened by 241 read => feed constraints.
Problem AtomicPropp20 is UNSAT
At refinement iteration 0 (INCLUDED_ONLY) 0/561 variables, 561/561 constraints. Problems are: Problem set: 1 solved, 6 unsolved
Problem AtomicPropp7 is UNSAT
Problem AtomicPropp11 is UNSAT
Problem AtomicPropp21 is UNSAT
Problem AtomicPropp22 is UNSAT
At refinement iteration 1 (INCLUDED_ONLY) 0/561 variables, 3/564 constraints. Problems are: Problem set: 5 solved, 2 unsolved
Problem AtomicPropp62 is UNSAT
At refinement iteration 2 (INCLUDED_ONLY) 0/561 variables, 16/580 constraints. Problems are: Problem set: 6 solved, 1 unsolved
All remaining problems are real, not stopping.
At refinement iteration 3 (INCLUDED_ONLY) 0/561 variables, 0/580 constraints. Problems are: Problem set: 6 solved, 1 unsolved
Problem AtomicPropp51 is UNSAT
After SMT solving in domain Real declared 589/2018 variables, and 608 constraints, problems are : Problem set: 7 solved, 0 unsolved in 497 ms.
Refiners :[Domain max(s): 561/606 constraints, Positive P Invariants (semi-flows): 31/32 constraints, Generalized P Invariants (flows): 16/33 constraints, State Equation: 0/606 constraints, ReadFeed: 0/241 constraints, PredecessorRefiner: 5/5 constraints, Known Traps: 0/0 constraints]
After SMT, in 8457ms problems are : Problem set: 7 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 7 atomic propositions for a total of 16 simplifications.
FORMULA SafeBus-PT-15-CTLFireability-2024-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 07:31:55] [INFO ] Flatten gal took : 438 ms
[2024-06-01 07:31:59] [INFO ] Flatten gal took : 504 ms
[2024-06-01 07:32:03] [INFO ] Input system was already deterministic with 4771 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 28 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 29 ms. Remains : 606/606 places, 4771/4771 transitions.
[2024-06-01 07:32:04] [INFO ] Flatten gal took : 252 ms
[2024-06-01 07:32:04] [INFO ] Flatten gal took : 255 ms
[2024-06-01 07:32:05] [INFO ] Input system was already deterministic with 4771 transitions.
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 12 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13 ms. Remains : 606/606 places, 4771/4771 transitions.
[2024-06-01 07:32:05] [INFO ] Flatten gal took : 222 ms
[2024-06-01 07:32:06] [INFO ] Flatten gal took : 286 ms
[2024-06-01 07:32:06] [INFO ] Input system was already deterministic with 4771 transitions.
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 16 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 16 ms. Remains : 606/606 places, 4771/4771 transitions.
[2024-06-01 07:32:06] [INFO ] Flatten gal took : 152 ms
[2024-06-01 07:32:07] [INFO ] Flatten gal took : 163 ms
[2024-06-01 07:32:07] [INFO ] Input system was already deterministic with 4771 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 1139 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1139 ms. Remains : 606/606 places, 4771/4771 transitions.
[2024-06-01 07:32:08] [INFO ] Flatten gal took : 209 ms
[2024-06-01 07:32:09] [INFO ] Flatten gal took : 261 ms
[2024-06-01 07:32:09] [INFO ] Input system was already deterministic with 4771 transitions.
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 53 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 53 ms. Remains : 606/606 places, 4771/4771 transitions.
[2024-06-01 07:32:09] [INFO ] Flatten gal took : 160 ms
[2024-06-01 07:32:10] [INFO ] Flatten gal took : 169 ms
[2024-06-01 07:32:10] [INFO ] Input system was already deterministic with 4771 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 1018 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1018 ms. Remains : 606/606 places, 4771/4771 transitions.
[2024-06-01 07:32:11] [INFO ] Flatten gal took : 189 ms
[2024-06-01 07:32:12] [INFO ] Flatten gal took : 239 ms
[2024-06-01 07:32:12] [INFO ] Input system was already deterministic with 4771 transitions.
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 37 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 38 ms. Remains : 606/606 places, 4771/4771 transitions.
[2024-06-01 07:32:12] [INFO ] Flatten gal took : 151 ms
[2024-06-01 07:32:12] [INFO ] Flatten gal took : 165 ms
[2024-06-01 07:32:13] [INFO ] Input system was already deterministic with 4771 transitions.
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 32 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 32 ms. Remains : 606/606 places, 4771/4771 transitions.
[2024-06-01 07:32:13] [INFO ] Flatten gal took : 145 ms
[2024-06-01 07:32:13] [INFO ] Flatten gal took : 163 ms
[2024-06-01 07:32:13] [INFO ] Input system was already deterministic with 4771 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 939 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 939 ms. Remains : 606/606 places, 4771/4771 transitions.
[2024-06-01 07:32:14] [INFO ] Flatten gal took : 152 ms
[2024-06-01 07:32:15] [INFO ] Flatten gal took : 168 ms
[2024-06-01 07:32:15] [INFO ] Input system was already deterministic with 4771 transitions.
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 26 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 26 ms. Remains : 606/606 places, 4771/4771 transitions.
[2024-06-01 07:32:15] [INFO ] Flatten gal took : 145 ms
[2024-06-01 07:32:15] [INFO ] Flatten gal took : 163 ms
[2024-06-01 07:32:15] [INFO ] Input system was already deterministic with 4771 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 1107 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1108 ms. Remains : 606/606 places, 4771/4771 transitions.
[2024-06-01 07:32:17] [INFO ] Flatten gal took : 170 ms
[2024-06-01 07:32:17] [INFO ] Flatten gal took : 156 ms
[2024-06-01 07:32:17] [INFO ] Input system was already deterministic with 4771 transitions.
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 27 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 27 ms. Remains : 606/606 places, 4771/4771 transitions.
[2024-06-01 07:32:17] [INFO ] Flatten gal took : 148 ms
[2024-06-01 07:32:18] [INFO ] Flatten gal took : 162 ms
[2024-06-01 07:32:18] [INFO ] Input system was already deterministic with 4771 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 1191 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1191 ms. Remains : 606/606 places, 4771/4771 transitions.
[2024-06-01 07:32:19] [INFO ] Flatten gal took : 192 ms
[2024-06-01 07:32:20] [INFO ] Flatten gal took : 313 ms
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : SafeBus-PT-15-CTLFireability-2024-00
Could not compute solution for formula : SafeBus-PT-15-CTLFireability-2024-01
Could not compute solution for formula : SafeBus-PT-15-CTLFireability-2024-02
Could not compute solution for formula : SafeBus-PT-15-CTLFireability-2024-03
Could not compute solution for formula : SafeBus-PT-15-CTLFireability-2024-04
Could not compute solution for formula : SafeBus-PT-15-CTLFireability-2024-05
Could not compute solution for formula : SafeBus-PT-15-CTLFireability-2024-06
Could not compute solution for formula : SafeBus-PT-15-CTLFireability-2024-07
Could not compute solution for formula : SafeBus-PT-15-CTLFireability-2024-08
Could not compute solution for formula : SafeBus-PT-15-CTLFireability-2024-09
Could not compute solution for formula : SafeBus-PT-15-CTLFireability-2024-10
Could not compute solution for formula : SafeBus-PT-15-CTLFireability-2024-11
Could not compute solution for formula : SafeBus-PT-15-CTLFireability-2024-12
Could not compute solution for formula : SafeBus-PT-15-CTLFireability-2024-13
Could not compute solution for formula : SafeBus-PT-15-CTLFireability-2024-14
Could not compute solution for formula : SafeBus-PT-15-CTLFireability-2024-15

BK_STOP 1717227140974

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name SafeBus-PT-15-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/522/ctl_0_
ctl formula name SafeBus-PT-15-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/522/ctl_1_
ctl formula name SafeBus-PT-15-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/522/ctl_2_
ctl formula name SafeBus-PT-15-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/522/ctl_3_
ctl formula name SafeBus-PT-15-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/522/ctl_4_
ctl formula name SafeBus-PT-15-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/522/ctl_5_
ctl formula name SafeBus-PT-15-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/522/ctl_6_
ctl formula name SafeBus-PT-15-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/522/ctl_7_
ctl formula name SafeBus-PT-15-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/522/ctl_8_
ctl formula name SafeBus-PT-15-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/522/ctl_9_
ctl formula name SafeBus-PT-15-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/522/ctl_10_
ctl formula name SafeBus-PT-15-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/522/ctl_11_
ctl formula name SafeBus-PT-15-CTLFireability-2024-12
ctl formula formula --ctl=/tmp/522/ctl_12_
ctl formula name SafeBus-PT-15-CTLFireability-2024-13
ctl formula formula --ctl=/tmp/522/ctl_13_
ctl formula name SafeBus-PT-15-CTLFireability-2024-14
ctl formula formula --ctl=/tmp/522/ctl_14_
ctl formula name SafeBus-PT-15-CTLFireability-2024-15
ctl formula formula --ctl=/tmp/522/ctl_15_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SafeBus-PT-15"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is SafeBus-PT-15, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r524-tall-171679080300434"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SafeBus-PT-15.tgz
mv SafeBus-PT-15 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;