Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r524-tall-171679080300426.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is SafeBus-PT-10, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r524-tall-171679080300426
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 3.9M
-rw-r--r-- 1 mcc users 21K Apr 12 15:05 CTLCardinality.txt
-rw-r--r-- 1 mcc users 147K Apr 12 15:05 CTLCardinality.xml
-rw-r--r-- 1 mcc users 145K Apr 12 15:01 CTLFireability.txt
-rw-r--r-- 1 mcc users 605K Apr 12 15:01 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 8.4K Apr 23 07:49 LTLCardinality.txt
-rw-r--r-- 1 mcc users 42K Apr 23 07:49 LTLCardinality.xml
-rw-r--r-- 1 mcc users 79K Apr 23 07:49 LTLFireability.txt
-rw-r--r-- 1 mcc users 245K Apr 23 07:49 LTLFireability.xml
-rw-r--r-- 1 mcc users 25K Apr 12 15:24 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 159K Apr 12 15:24 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 218K Apr 12 15:20 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 989K Apr 12 15:20 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 3.4K Apr 23 07:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 8.1K Apr 23 07:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 1.2M May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SafeBus-PT-10-CTLFireability-2024-00
FORMULA_NAME SafeBus-PT-10-CTLFireability-2024-01
FORMULA_NAME SafeBus-PT-10-CTLFireability-2024-02
FORMULA_NAME SafeBus-PT-10-CTLFireability-2024-03
FORMULA_NAME SafeBus-PT-10-CTLFireability-2024-04
FORMULA_NAME SafeBus-PT-10-CTLFireability-2024-05
FORMULA_NAME SafeBus-PT-10-CTLFireability-2024-06
FORMULA_NAME SafeBus-PT-10-CTLFireability-2024-07
FORMULA_NAME SafeBus-PT-10-CTLFireability-2024-08
FORMULA_NAME SafeBus-PT-10-CTLFireability-2024-09
FORMULA_NAME SafeBus-PT-10-CTLFireability-2024-10
FORMULA_NAME SafeBus-PT-10-CTLFireability-2024-11
FORMULA_NAME SafeBus-PT-10-CTLFireability-2024-12
FORMULA_NAME SafeBus-PT-10-CTLFireability-2024-13
FORMULA_NAME SafeBus-PT-10-CTLFireability-2024-14
FORMULA_NAME SafeBus-PT-10-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717226897237

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SafeBus-PT-10
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 07:28:18] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 07:28:18] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 07:28:18] [INFO ] Load time of PNML (sax parser for PT used): 155 ms
[2024-06-01 07:28:18] [INFO ] Transformed 316 places.
[2024-06-01 07:28:18] [INFO ] Transformed 1631 transitions.
[2024-06-01 07:28:18] [INFO ] Found NUPN structural information;
[2024-06-01 07:28:18] [INFO ] Parsed PT model containing 316 places and 1631 transitions and 11384 arcs in 261 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 43 ms.
Reduce places removed 10 places and 0 transitions.
Support contains 306 out of 306 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 306/306 places, 1631/1631 transitions.
Applied a total of 0 rules in 24 ms. Remains 306 /306 variables (removed 0) and now considering 1631/1631 (removed 0) transitions.
[2024-06-01 07:28:18] [INFO ] Flow matrix only has 642 transitions (discarded 989 similar events)
// Phase 1: matrix 642 rows 306 cols
[2024-06-01 07:28:19] [INFO ] Computed 45 invariants in 44 ms
[2024-06-01 07:28:19] [INFO ] Implicit Places using invariants in 291 ms returned []
[2024-06-01 07:28:19] [INFO ] Flow matrix only has 642 transitions (discarded 989 similar events)
[2024-06-01 07:28:19] [INFO ] Invariant cache hit.
[2024-06-01 07:28:19] [INFO ] State equation strengthened by 111 read => feed constraints.
[2024-06-01 07:28:19] [INFO ] Implicit Places using invariants and state equation in 291 ms returned []
Implicit Place search using SMT with State Equation took 609 ms to find 0 implicit places.
Running 1621 sub problems to find dead transitions.
[2024-06-01 07:28:19] [INFO ] Flow matrix only has 642 transitions (discarded 989 similar events)
[2024-06-01 07:28:19] [INFO ] Invariant cache hit.
[2024-06-01 07:28:19] [INFO ] State equation strengthened by 111 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/306 variables, 306/306 constraints. Problems are: Problem set: 0 solved, 1621 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/306 variables, 24/330 constraints. Problems are: Problem set: 0 solved, 1621 unsolved
Problem TDEAD91 is UNSAT
Problem TDEAD102 is UNSAT
Problem TDEAD113 is UNSAT
Problem TDEAD124 is UNSAT
Problem TDEAD135 is UNSAT
Problem TDEAD146 is UNSAT
Problem TDEAD157 is UNSAT
Problem TDEAD168 is UNSAT
Problem TDEAD179 is UNSAT
Problem TDEAD190 is UNSAT
Problem TDEAD191 is UNSAT
Problem TDEAD202 is UNSAT
Problem TDEAD213 is UNSAT
Problem TDEAD224 is UNSAT
Problem TDEAD235 is UNSAT
Problem TDEAD246 is UNSAT
Problem TDEAD257 is UNSAT
Problem TDEAD268 is UNSAT
Problem TDEAD279 is UNSAT
Problem TDEAD290 is UNSAT
Problem TDEAD291 is UNSAT
Problem TDEAD302 is UNSAT
Problem TDEAD313 is UNSAT
Problem TDEAD324 is UNSAT
Problem TDEAD335 is UNSAT
Problem TDEAD346 is UNSAT
Problem TDEAD357 is UNSAT
Problem TDEAD368 is UNSAT
Problem TDEAD379 is UNSAT
Problem TDEAD390 is UNSAT
Problem TDEAD391 is UNSAT
Problem TDEAD402 is UNSAT
Problem TDEAD413 is UNSAT
Problem TDEAD424 is UNSAT
Problem TDEAD435 is UNSAT
Problem TDEAD446 is UNSAT
Problem TDEAD457 is UNSAT
Problem TDEAD468 is UNSAT
Problem TDEAD479 is UNSAT
Problem TDEAD490 is UNSAT
Problem TDEAD491 is UNSAT
Problem TDEAD502 is UNSAT
Problem TDEAD513 is UNSAT
Problem TDEAD524 is UNSAT
Problem TDEAD535 is UNSAT
Problem TDEAD546 is UNSAT
Problem TDEAD557 is UNSAT
Problem TDEAD568 is UNSAT
Problem TDEAD579 is UNSAT
Problem TDEAD590 is UNSAT
Problem TDEAD591 is UNSAT
Problem TDEAD602 is UNSAT
Problem TDEAD613 is UNSAT
Problem TDEAD624 is UNSAT
Problem TDEAD635 is UNSAT
Problem TDEAD646 is UNSAT
Problem TDEAD657 is UNSAT
Problem TDEAD668 is UNSAT
Problem TDEAD679 is UNSAT
Problem TDEAD690 is UNSAT
Problem TDEAD691 is UNSAT
Problem TDEAD702 is UNSAT
Problem TDEAD713 is UNSAT
Problem TDEAD724 is UNSAT
Problem TDEAD735 is UNSAT
Problem TDEAD746 is UNSAT
Problem TDEAD757 is UNSAT
Problem TDEAD768 is UNSAT
Problem TDEAD779 is UNSAT
Problem TDEAD790 is UNSAT
Problem TDEAD791 is UNSAT
Problem TDEAD802 is UNSAT
Problem TDEAD813 is UNSAT
Problem TDEAD824 is UNSAT
Problem TDEAD835 is UNSAT
Problem TDEAD846 is UNSAT
Problem TDEAD857 is UNSAT
Problem TDEAD868 is UNSAT
Problem TDEAD879 is UNSAT
Problem TDEAD890 is UNSAT
Problem TDEAD891 is UNSAT
Problem TDEAD902 is UNSAT
Problem TDEAD913 is UNSAT
Problem TDEAD924 is UNSAT
Problem TDEAD935 is UNSAT
Problem TDEAD946 is UNSAT
Problem TDEAD957 is UNSAT
Problem TDEAD968 is UNSAT
Problem TDEAD979 is UNSAT
Problem TDEAD990 is UNSAT
Problem TDEAD991 is UNSAT
Problem TDEAD1002 is UNSAT
Problem TDEAD1013 is UNSAT
Problem TDEAD1024 is UNSAT
Problem TDEAD1035 is UNSAT
Problem TDEAD1046 is UNSAT
Problem TDEAD1057 is UNSAT
Problem TDEAD1068 is UNSAT
Problem TDEAD1079 is UNSAT
Problem TDEAD1090 is UNSAT
At refinement iteration 2 (INCLUDED_ONLY) 0/306 variables, 21/351 constraints. Problems are: Problem set: 100 solved, 1521 unsolved
[2024-06-01 07:28:34] [INFO ] Deduced a trap composed of 41 places in 263 ms of which 27 ms to minimize.
[2024-06-01 07:28:43] [INFO ] Deduced a trap composed of 21 places in 230 ms of which 3 ms to minimize.
[2024-06-01 07:28:43] [INFO ] Deduced a trap composed of 21 places in 221 ms of which 2 ms to minimize.
[2024-06-01 07:28:43] [INFO ] Deduced a trap composed of 21 places in 209 ms of which 2 ms to minimize.
[2024-06-01 07:28:43] [INFO ] Deduced a trap composed of 21 places in 224 ms of which 2 ms to minimize.
[2024-06-01 07:28:44] [INFO ] Deduced a trap composed of 30 places in 220 ms of which 2 ms to minimize.
[2024-06-01 07:28:44] [INFO ] Deduced a trap composed of 30 places in 218 ms of which 2 ms to minimize.
[2024-06-01 07:28:44] [INFO ] Deduced a trap composed of 31 places in 213 ms of which 2 ms to minimize.
[2024-06-01 07:28:44] [INFO ] Deduced a trap composed of 30 places in 219 ms of which 1 ms to minimize.
[2024-06-01 07:28:44] [INFO ] Deduced a trap composed of 21 places in 215 ms of which 2 ms to minimize.
[2024-06-01 07:28:46] [INFO ] Deduced a trap composed of 49 places in 205 ms of which 2 ms to minimize.
[2024-06-01 07:28:46] [INFO ] Deduced a trap composed of 41 places in 209 ms of which 2 ms to minimize.
[2024-06-01 07:28:46] [INFO ] Deduced a trap composed of 49 places in 213 ms of which 1 ms to minimize.
[2024-06-01 07:28:46] [INFO ] Deduced a trap composed of 49 places in 213 ms of which 2 ms to minimize.
[2024-06-01 07:28:46] [INFO ] Deduced a trap composed of 49 places in 210 ms of which 2 ms to minimize.
[2024-06-01 07:28:49] [INFO ] Deduced a trap composed of 38 places in 210 ms of which 4 ms to minimize.
[2024-06-01 07:28:50] [INFO ] Deduced a trap composed of 51 places in 205 ms of which 2 ms to minimize.
[2024-06-01 07:28:50] [INFO ] Deduced a trap composed of 37 places in 208 ms of which 2 ms to minimize.
[2024-06-01 07:28:50] [INFO ] Deduced a trap composed of 39 places in 204 ms of which 2 ms to minimize.
[2024-06-01 07:28:50] [INFO ] Deduced a trap composed of 38 places in 211 ms of which 2 ms to minimize.
At refinement iteration 3 (INCLUDED_ONLY) 0/306 variables, 20/371 constraints. Problems are: Problem set: 100 solved, 1521 unsolved
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 306/948 variables, and 371 constraints, problems are : Problem set: 100 solved, 1521 unsolved in 30066 ms.
Refiners :[Domain max(s): 306/306 constraints, Positive P Invariants (semi-flows): 24/24 constraints, Generalized P Invariants (flows): 21/21 constraints, State Equation: 0/306 constraints, ReadFeed: 0/111 constraints, PredecessorRefiner: 1621/1621 constraints, Known Traps: 20/20 constraints]
Escalating to Integer solving :Problem set: 100 solved, 1521 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/306 variables, 306/306 constraints. Problems are: Problem set: 100 solved, 1521 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/306 variables, 24/330 constraints. Problems are: Problem set: 100 solved, 1521 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/306 variables, 21/351 constraints. Problems are: Problem set: 100 solved, 1521 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/306 variables, 20/371 constraints. Problems are: Problem set: 100 solved, 1521 unsolved
[2024-06-01 07:29:07] [INFO ] Deduced a trap composed of 49 places in 123 ms of which 1 ms to minimize.
[2024-06-01 07:29:07] [INFO ] Deduced a trap composed of 41 places in 118 ms of which 2 ms to minimize.
[2024-06-01 07:29:07] [INFO ] Deduced a trap composed of 49 places in 120 ms of which 2 ms to minimize.
[2024-06-01 07:29:07] [INFO ] Deduced a trap composed of 49 places in 137 ms of which 1 ms to minimize.
[2024-06-01 07:29:07] [INFO ] Deduced a trap composed of 53 places in 138 ms of which 1 ms to minimize.
[2024-06-01 07:29:10] [INFO ] Deduced a trap composed of 37 places in 207 ms of which 2 ms to minimize.
[2024-06-01 07:29:11] [INFO ] Deduced a trap composed of 37 places in 213 ms of which 2 ms to minimize.
[2024-06-01 07:29:11] [INFO ] Deduced a trap composed of 44 places in 208 ms of which 2 ms to minimize.
[2024-06-01 07:29:11] [INFO ] Deduced a trap composed of 37 places in 210 ms of which 2 ms to minimize.
[2024-06-01 07:29:11] [INFO ] Deduced a trap composed of 35 places in 218 ms of which 1 ms to minimize.
[2024-06-01 07:29:12] [INFO ] Deduced a trap composed of 57 places in 140 ms of which 1 ms to minimize.
[2024-06-01 07:29:12] [INFO ] Deduced a trap composed of 49 places in 134 ms of which 2 ms to minimize.
[2024-06-01 07:29:12] [INFO ] Deduced a trap composed of 41 places in 126 ms of which 1 ms to minimize.
[2024-06-01 07:29:12] [INFO ] Deduced a trap composed of 49 places in 119 ms of which 2 ms to minimize.
[2024-06-01 07:29:12] [INFO ] Deduced a trap composed of 49 places in 85 ms of which 1 ms to minimize.
[2024-06-01 07:29:12] [INFO ] Deduced a trap composed of 49 places in 75 ms of which 1 ms to minimize.
[2024-06-01 07:29:12] [INFO ] Deduced a trap composed of 49 places in 71 ms of which 1 ms to minimize.
[2024-06-01 07:29:13] [INFO ] Deduced a trap composed of 70 places in 142 ms of which 2 ms to minimize.
[2024-06-01 07:29:13] [INFO ] Deduced a trap composed of 41 places in 132 ms of which 1 ms to minimize.
[2024-06-01 07:29:13] [INFO ] Deduced a trap composed of 69 places in 196 ms of which 2 ms to minimize.
At refinement iteration 4 (INCLUDED_ONLY) 0/306 variables, 20/391 constraints. Problems are: Problem set: 100 solved, 1521 unsolved
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 306/948 variables, and 391 constraints, problems are : Problem set: 100 solved, 1521 unsolved in 30033 ms.
Refiners :[Domain max(s): 306/306 constraints, Positive P Invariants (semi-flows): 24/24 constraints, Generalized P Invariants (flows): 21/21 constraints, State Equation: 0/306 constraints, ReadFeed: 0/111 constraints, PredecessorRefiner: 0/1621 constraints, Known Traps: 40/40 constraints]
After SMT, in 64424ms problems are : Problem set: 100 solved, 1521 unsolved
Search for dead transitions found 100 dead transitions in 64466ms
Found 100 dead transitions using SMT.
Drop transitions (Dead Transitions using SMT only with invariants) removed 100 transitions
Dead transitions reduction (with SMT) removed 100 transitions
Starting structural reductions in LTL mode, iteration 1 : 306/306 places, 1531/1631 transitions.
Applied a total of 0 rules in 17 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 65145 ms. Remains : 306/306 places, 1531/1631 transitions.
Support contains 306 out of 306 places after structural reductions.
[2024-06-01 07:29:24] [INFO ] Flatten gal took : 259 ms
[2024-06-01 07:29:25] [INFO ] Flatten gal took : 215 ms
[2024-06-01 07:29:27] [INFO ] Input system was already deterministic with 1531 transitions.
Reduction of identical properties reduced properties to check from 70 to 64
RANDOM walk for 40000 steps (8 resets) in 2608 ms. (15 steps per ms) remains 6/64 properties
BEST_FIRST walk for 40003 steps (8 resets) in 679 ms. (58 steps per ms) remains 6/6 properties
BEST_FIRST walk for 40002 steps (8 resets) in 169 ms. (235 steps per ms) remains 6/6 properties
BEST_FIRST walk for 40003 steps (8 resets) in 188 ms. (211 steps per ms) remains 6/6 properties
BEST_FIRST walk for 40002 steps (8 resets) in 177 ms. (224 steps per ms) remains 6/6 properties
BEST_FIRST walk for 40003 steps (8 resets) in 160 ms. (248 steps per ms) remains 6/6 properties
BEST_FIRST walk for 40003 steps (8 resets) in 141 ms. (281 steps per ms) remains 6/6 properties
[2024-06-01 07:29:28] [INFO ] Flow matrix only has 642 transitions (discarded 889 similar events)
// Phase 1: matrix 642 rows 306 cols
[2024-06-01 07:29:28] [INFO ] Computed 45 invariants in 17 ms
[2024-06-01 07:29:28] [INFO ] State equation strengthened by 111 read => feed constraints.
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/135 variables, 135/135 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/135 variables, 1/136 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/135 variables, 0/136 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 3 (OVERLAPS) 160/295 variables, 15/151 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/295 variables, 160/311 constraints. Problems are: Problem set: 0 solved, 6 unsolved
Problem AtomicPropp27 is UNSAT
Problem AtomicPropp29 is UNSAT
Problem AtomicPropp50 is UNSAT
Problem AtomicPropp54 is UNSAT
Problem AtomicPropp63 is UNSAT
At refinement iteration 5 (INCLUDED_ONLY) 0/295 variables, 18/329 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/295 variables, 0/329 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 7 (OVERLAPS) 9/304 variables, 9/338 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/304 variables, 9/347 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 9 (INCLUDED_ONLY) 0/304 variables, 0/347 constraints. Problems are: Problem set: 5 solved, 1 unsolved
Problem AtomicPropp10 is UNSAT
After SMT solving in domain Real declared 306/948 variables, and 349 constraints, problems are : Problem set: 6 solved, 0 unsolved in 418 ms.
Refiners :[Domain max(s): 304/306 constraints, Positive P Invariants (semi-flows): 24/24 constraints, Generalized P Invariants (flows): 21/21 constraints, State Equation: 0/306 constraints, ReadFeed: 0/111 constraints, PredecessorRefiner: 6/6 constraints, Known Traps: 0/0 constraints]
After SMT, in 670ms problems are : Problem set: 6 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 6 atomic propositions for a total of 16 simplifications.
FORMULA SafeBus-PT-10-CTLFireability-2024-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 07:29:29] [INFO ] Flatten gal took : 137 ms
[2024-06-01 07:29:30] [INFO ] Flatten gal took : 151 ms
[2024-06-01 07:29:31] [INFO ] Input system was already deterministic with 1531 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Applied a total of 0 rules in 28 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 28 ms. Remains : 306/306 places, 1531/1531 transitions.
[2024-06-01 07:29:31] [INFO ] Flatten gal took : 49 ms
[2024-06-01 07:29:31] [INFO ] Flatten gal took : 54 ms
[2024-06-01 07:29:31] [INFO ] Input system was already deterministic with 1531 transitions.
Starting structural reductions in LTL mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Applied a total of 0 rules in 10 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 306/306 places, 1531/1531 transitions.
[2024-06-01 07:29:31] [INFO ] Flatten gal took : 53 ms
[2024-06-01 07:29:31] [INFO ] Flatten gal took : 58 ms
[2024-06-01 07:29:31] [INFO ] Input system was already deterministic with 1531 transitions.
Starting structural reductions in LTL mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Applied a total of 0 rules in 11 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 306/306 places, 1531/1531 transitions.
[2024-06-01 07:29:31] [INFO ] Flatten gal took : 48 ms
[2024-06-01 07:29:31] [INFO ] Flatten gal took : 53 ms
[2024-06-01 07:29:32] [INFO ] Input system was already deterministic with 1531 transitions.
Starting structural reductions in LTL mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Applied a total of 0 rules in 6 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 306/306 places, 1531/1531 transitions.
[2024-06-01 07:29:32] [INFO ] Flatten gal took : 54 ms
[2024-06-01 07:29:32] [INFO ] Flatten gal took : 65 ms
[2024-06-01 07:29:32] [INFO ] Input system was already deterministic with 1531 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Applied a total of 0 rules in 198 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 198 ms. Remains : 306/306 places, 1531/1531 transitions.
[2024-06-01 07:29:32] [INFO ] Flatten gal took : 46 ms
[2024-06-01 07:29:32] [INFO ] Flatten gal took : 54 ms
[2024-06-01 07:29:32] [INFO ] Input system was already deterministic with 1531 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Applied a total of 0 rules in 97 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 97 ms. Remains : 306/306 places, 1531/1531 transitions.
[2024-06-01 07:29:32] [INFO ] Flatten gal took : 55 ms
[2024-06-01 07:29:33] [INFO ] Flatten gal took : 64 ms
[2024-06-01 07:29:33] [INFO ] Input system was already deterministic with 1531 transitions.
Starting structural reductions in LTL mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Applied a total of 0 rules in 4 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 306/306 places, 1531/1531 transitions.
[2024-06-01 07:29:33] [INFO ] Flatten gal took : 73 ms
[2024-06-01 07:29:33] [INFO ] Flatten gal took : 95 ms
[2024-06-01 07:29:33] [INFO ] Input system was already deterministic with 1531 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Applied a total of 0 rules in 97 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 97 ms. Remains : 306/306 places, 1531/1531 transitions.
[2024-06-01 07:29:33] [INFO ] Flatten gal took : 56 ms
[2024-06-01 07:29:33] [INFO ] Flatten gal took : 68 ms
[2024-06-01 07:29:33] [INFO ] Input system was already deterministic with 1531 transitions.
Starting structural reductions in LTL mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Applied a total of 0 rules in 6 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 306/306 places, 1531/1531 transitions.
[2024-06-01 07:29:34] [INFO ] Flatten gal took : 45 ms
[2024-06-01 07:29:34] [INFO ] Flatten gal took : 51 ms
[2024-06-01 07:29:34] [INFO ] Input system was already deterministic with 1531 transitions.
Starting structural reductions in LTL mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Applied a total of 0 rules in 4 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 306/306 places, 1531/1531 transitions.
[2024-06-01 07:29:34] [INFO ] Flatten gal took : 45 ms
[2024-06-01 07:29:34] [INFO ] Flatten gal took : 48 ms
[2024-06-01 07:29:34] [INFO ] Input system was already deterministic with 1531 transitions.
Starting structural reductions in LTL mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Applied a total of 0 rules in 4 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 306/306 places, 1531/1531 transitions.
[2024-06-01 07:29:34] [INFO ] Flatten gal took : 44 ms
[2024-06-01 07:29:34] [INFO ] Flatten gal took : 49 ms
[2024-06-01 07:29:34] [INFO ] Input system was already deterministic with 1531 transitions.
Starting structural reductions in LTL mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Applied a total of 0 rules in 5 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 306/306 places, 1531/1531 transitions.
[2024-06-01 07:29:34] [INFO ] Flatten gal took : 45 ms
[2024-06-01 07:29:34] [INFO ] Flatten gal took : 50 ms
[2024-06-01 07:29:34] [INFO ] Input system was already deterministic with 1531 transitions.
Starting structural reductions in LTL mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Applied a total of 0 rules in 5 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 306/306 places, 1531/1531 transitions.
[2024-06-01 07:29:34] [INFO ] Flatten gal took : 44 ms
[2024-06-01 07:29:34] [INFO ] Flatten gal took : 48 ms
[2024-06-01 07:29:34] [INFO ] Input system was already deterministic with 1531 transitions.
Starting structural reductions in LTL mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Applied a total of 0 rules in 5 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 306/306 places, 1531/1531 transitions.
[2024-06-01 07:29:35] [INFO ] Flatten gal took : 46 ms
[2024-06-01 07:29:35] [INFO ] Flatten gal took : 49 ms
[2024-06-01 07:29:35] [INFO ] Input system was already deterministic with 1531 transitions.
Starting structural reductions in LTL mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Applied a total of 0 rules in 5 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 306/306 places, 1531/1531 transitions.
[2024-06-01 07:29:35] [INFO ] Flatten gal took : 44 ms
[2024-06-01 07:29:35] [INFO ] Flatten gal took : 48 ms
[2024-06-01 07:29:35] [INFO ] Input system was already deterministic with 1531 transitions.
[2024-06-01 07:29:35] [INFO ] Flatten gal took : 143 ms
[2024-06-01 07:29:36] [INFO ] Flatten gal took : 144 ms
[2024-06-01 07:29:37] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 63 ms.
[2024-06-01 07:29:37] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 306 places, 1531 transitions and 10404 arcs took 11 ms.
Total runtime 79206 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : SafeBus-PT-10-CTLFireability-2024-00
Could not compute solution for formula : SafeBus-PT-10-CTLFireability-2024-01
Could not compute solution for formula : SafeBus-PT-10-CTLFireability-2024-02
Could not compute solution for formula : SafeBus-PT-10-CTLFireability-2024-03
Could not compute solution for formula : SafeBus-PT-10-CTLFireability-2024-04
Could not compute solution for formula : SafeBus-PT-10-CTLFireability-2024-05
Could not compute solution for formula : SafeBus-PT-10-CTLFireability-2024-06
Could not compute solution for formula : SafeBus-PT-10-CTLFireability-2024-07
Could not compute solution for formula : SafeBus-PT-10-CTLFireability-2024-08
Could not compute solution for formula : SafeBus-PT-10-CTLFireability-2024-09
Could not compute solution for formula : SafeBus-PT-10-CTLFireability-2024-10
Could not compute solution for formula : SafeBus-PT-10-CTLFireability-2024-11
Could not compute solution for formula : SafeBus-PT-10-CTLFireability-2024-12
Could not compute solution for formula : SafeBus-PT-10-CTLFireability-2024-13
Could not compute solution for formula : SafeBus-PT-10-CTLFireability-2024-14

BK_STOP 1717226978547

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name SafeBus-PT-10-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/655/ctl_0_
ctl formula name SafeBus-PT-10-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/655/ctl_1_
ctl formula name SafeBus-PT-10-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/655/ctl_2_
ctl formula name SafeBus-PT-10-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/655/ctl_3_
ctl formula name SafeBus-PT-10-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/655/ctl_4_
ctl formula name SafeBus-PT-10-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/655/ctl_5_
ctl formula name SafeBus-PT-10-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/655/ctl_6_
ctl formula name SafeBus-PT-10-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/655/ctl_7_
ctl formula name SafeBus-PT-10-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/655/ctl_8_
ctl formula name SafeBus-PT-10-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/655/ctl_9_
ctl formula name SafeBus-PT-10-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/655/ctl_10_
ctl formula name SafeBus-PT-10-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/655/ctl_11_
ctl formula name SafeBus-PT-10-CTLFireability-2024-12
ctl formula formula --ctl=/tmp/655/ctl_12_
ctl formula name SafeBus-PT-10-CTLFireability-2024-13
ctl formula formula --ctl=/tmp/655/ctl_13_
ctl formula name SafeBus-PT-10-CTLFireability-2024-14
ctl formula formula --ctl=/tmp/655/ctl_14_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SafeBus-PT-10"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is SafeBus-PT-10, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r524-tall-171679080300426"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SafeBus-PT-10.tgz
mv SafeBus-PT-10 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;