Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r524-tall-171679080300410.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is SafeBus-PT-03, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r524-tall-171679080300410
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 732K
-rw-r--r-- 1 mcc users 8.5K Apr 12 14:42 CTLCardinality.txt
-rw-r--r-- 1 mcc users 77K Apr 12 14:42 CTLCardinality.xml
-rw-r--r-- 1 mcc users 11K Apr 12 14:37 CTLFireability.txt
-rw-r--r-- 1 mcc users 69K Apr 12 14:37 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 5.2K Apr 23 07:49 LTLCardinality.txt
-rw-r--r-- 1 mcc users 32K Apr 23 07:49 LTLCardinality.xml
-rw-r--r-- 1 mcc users 6.2K Apr 23 07:49 LTLFireability.txt
-rw-r--r-- 1 mcc users 32K Apr 23 07:49 LTLFireability.xml
-rw-r--r-- 1 mcc users 16K Apr 12 14:49 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 138K Apr 12 14:49 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 26K Apr 12 14:47 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 154K Apr 12 14:47 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 23 07:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Apr 23 07:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 95K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SafeBus-PT-03-CTLFireability-2024-00
FORMULA_NAME SafeBus-PT-03-CTLFireability-2024-01
FORMULA_NAME SafeBus-PT-03-CTLFireability-2024-02
FORMULA_NAME SafeBus-PT-03-CTLFireability-2024-03
FORMULA_NAME SafeBus-PT-03-CTLFireability-2024-04
FORMULA_NAME SafeBus-PT-03-CTLFireability-2024-05
FORMULA_NAME SafeBus-PT-03-CTLFireability-2024-06
FORMULA_NAME SafeBus-PT-03-CTLFireability-2024-07
FORMULA_NAME SafeBus-PT-03-CTLFireability-2024-08
FORMULA_NAME SafeBus-PT-03-CTLFireability-2024-09
FORMULA_NAME SafeBus-PT-03-CTLFireability-2024-10
FORMULA_NAME SafeBus-PT-03-CTLFireability-2024-11
FORMULA_NAME SafeBus-PT-03-CTLFireability-2024-12
FORMULA_NAME SafeBus-PT-03-CTLFireability-2024-13
FORMULA_NAME SafeBus-PT-03-CTLFireability-2024-14
FORMULA_NAME SafeBus-PT-03-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717225685227

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SafeBus-PT-03
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 07:08:06] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 07:08:06] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 07:08:06] [INFO ] Load time of PNML (sax parser for PT used): 70 ms
[2024-06-01 07:08:06] [INFO ] Transformed 57 places.
[2024-06-01 07:08:06] [INFO ] Transformed 91 transitions.
[2024-06-01 07:08:06] [INFO ] Found NUPN structural information;
[2024-06-01 07:08:06] [INFO ] Parsed PT model containing 57 places and 91 transitions and 541 arcs in 167 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 14 ms.
Reduce places removed 3 places and 0 transitions.
Support contains 52 out of 54 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 91/91 transitions.
Applied a total of 0 rules in 9 ms. Remains 54 /54 variables (removed 0) and now considering 91/91 (removed 0) transitions.
[2024-06-01 07:08:06] [INFO ] Flow matrix only has 68 transitions (discarded 23 similar events)
// Phase 1: matrix 68 rows 54 cols
[2024-06-01 07:08:06] [INFO ] Computed 17 invariants in 13 ms
[2024-06-01 07:08:06] [INFO ] Implicit Places using invariants in 240 ms returned []
[2024-06-01 07:08:06] [INFO ] Flow matrix only has 68 transitions (discarded 23 similar events)
[2024-06-01 07:08:06] [INFO ] Invariant cache hit.
[2024-06-01 07:08:07] [INFO ] State equation strengthened by 13 read => feed constraints.
[2024-06-01 07:08:07] [INFO ] Implicit Places using invariants and state equation in 101 ms returned []
Implicit Place search using SMT with State Equation took 379 ms to find 0 implicit places.
Running 88 sub problems to find dead transitions.
[2024-06-01 07:08:07] [INFO ] Flow matrix only has 68 transitions (discarded 23 similar events)
[2024-06-01 07:08:07] [INFO ] Invariant cache hit.
[2024-06-01 07:08:07] [INFO ] State equation strengthened by 13 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/54 variables, 54/54 constraints. Problems are: Problem set: 0 solved, 88 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/54 variables, 7/61 constraints. Problems are: Problem set: 0 solved, 88 unsolved
Problem TDEAD7 is UNSAT
Problem TDEAD11 is UNSAT
Problem TDEAD15 is UNSAT
Problem TDEAD16 is UNSAT
Problem TDEAD20 is UNSAT
Problem TDEAD24 is UNSAT
Problem TDEAD25 is UNSAT
Problem TDEAD29 is UNSAT
Problem TDEAD33 is UNSAT
At refinement iteration 2 (INCLUDED_ONLY) 0/54 variables, 10/71 constraints. Problems are: Problem set: 9 solved, 79 unsolved
[2024-06-01 07:08:07] [INFO ] Deduced a trap composed of 12 places in 54 ms of which 10 ms to minimize.
[2024-06-01 07:08:07] [INFO ] Deduced a trap composed of 13 places in 52 ms of which 2 ms to minimize.
[2024-06-01 07:08:07] [INFO ] Deduced a trap composed of 14 places in 36 ms of which 0 ms to minimize.
[2024-06-01 07:08:07] [INFO ] Deduced a trap composed of 12 places in 37 ms of which 1 ms to minimize.
[2024-06-01 07:08:07] [INFO ] Deduced a trap composed of 11 places in 38 ms of which 1 ms to minimize.
[2024-06-01 07:08:07] [INFO ] Deduced a trap composed of 14 places in 80 ms of which 1 ms to minimize.
[2024-06-01 07:08:07] [INFO ] Deduced a trap composed of 14 places in 47 ms of which 20 ms to minimize.
[2024-06-01 07:08:08] [INFO ] Deduced a trap composed of 14 places in 34 ms of which 1 ms to minimize.
[2024-06-01 07:08:08] [INFO ] Deduced a trap composed of 7 places in 67 ms of which 0 ms to minimize.
[2024-06-01 07:08:08] [INFO ] Deduced a trap composed of 15 places in 32 ms of which 1 ms to minimize.
At refinement iteration 3 (INCLUDED_ONLY) 0/54 variables, 10/81 constraints. Problems are: Problem set: 9 solved, 79 unsolved
[2024-06-01 07:08:08] [INFO ] Deduced a trap composed of 13 places in 51 ms of which 1 ms to minimize.
[2024-06-01 07:08:08] [INFO ] Deduced a trap composed of 15 places in 27 ms of which 1 ms to minimize.
At refinement iteration 4 (INCLUDED_ONLY) 0/54 variables, 2/83 constraints. Problems are: Problem set: 9 solved, 79 unsolved
[2024-06-01 07:08:08] [INFO ] Deduced a trap composed of 15 places in 37 ms of which 1 ms to minimize.
At refinement iteration 5 (INCLUDED_ONLY) 0/54 variables, 1/84 constraints. Problems are: Problem set: 9 solved, 79 unsolved
[2024-06-01 07:08:08] [INFO ] Deduced a trap composed of 15 places in 59 ms of which 1 ms to minimize.
At refinement iteration 6 (INCLUDED_ONLY) 0/54 variables, 1/85 constraints. Problems are: Problem set: 9 solved, 79 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/54 variables, 0/85 constraints. Problems are: Problem set: 9 solved, 79 unsolved
At refinement iteration 8 (OVERLAPS) 68/122 variables, 54/139 constraints. Problems are: Problem set: 9 solved, 79 unsolved
At refinement iteration 9 (INCLUDED_ONLY) 0/122 variables, 13/152 constraints. Problems are: Problem set: 9 solved, 79 unsolved
At refinement iteration 10 (INCLUDED_ONLY) 0/122 variables, 0/152 constraints. Problems are: Problem set: 9 solved, 79 unsolved
At refinement iteration 11 (OVERLAPS) 0/122 variables, 0/152 constraints. Problems are: Problem set: 9 solved, 79 unsolved
No progress, stopping.
After SMT solving in domain Real declared 122/122 variables, and 152 constraints, problems are : Problem set: 9 solved, 79 unsolved in 2924 ms.
Refiners :[Domain max(s): 54/54 constraints, Positive P Invariants (semi-flows): 7/7 constraints, Generalized P Invariants (flows): 10/10 constraints, State Equation: 54/54 constraints, ReadFeed: 13/13 constraints, PredecessorRefiner: 88/88 constraints, Known Traps: 14/14 constraints]
Escalating to Integer solving :Problem set: 9 solved, 79 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/54 variables, 54/54 constraints. Problems are: Problem set: 9 solved, 79 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/54 variables, 7/61 constraints. Problems are: Problem set: 9 solved, 79 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/54 variables, 10/71 constraints. Problems are: Problem set: 9 solved, 79 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/54 variables, 14/85 constraints. Problems are: Problem set: 9 solved, 79 unsolved
[2024-06-01 07:08:10] [INFO ] Deduced a trap composed of 13 places in 31 ms of which 1 ms to minimize.
[2024-06-01 07:08:10] [INFO ] Deduced a trap composed of 9 places in 29 ms of which 1 ms to minimize.
[2024-06-01 07:08:10] [INFO ] Deduced a trap composed of 9 places in 29 ms of which 1 ms to minimize.
[2024-06-01 07:08:10] [INFO ] Deduced a trap composed of 7 places in 28 ms of which 1 ms to minimize.
At refinement iteration 4 (INCLUDED_ONLY) 0/54 variables, 4/89 constraints. Problems are: Problem set: 9 solved, 79 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/54 variables, 0/89 constraints. Problems are: Problem set: 9 solved, 79 unsolved
At refinement iteration 6 (OVERLAPS) 68/122 variables, 54/143 constraints. Problems are: Problem set: 9 solved, 79 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/122 variables, 13/156 constraints. Problems are: Problem set: 9 solved, 79 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/122 variables, 79/235 constraints. Problems are: Problem set: 9 solved, 79 unsolved
At refinement iteration 9 (INCLUDED_ONLY) 0/122 variables, 0/235 constraints. Problems are: Problem set: 9 solved, 79 unsolved
At refinement iteration 10 (OVERLAPS) 0/122 variables, 0/235 constraints. Problems are: Problem set: 9 solved, 79 unsolved
No progress, stopping.
After SMT solving in domain Int declared 122/122 variables, and 235 constraints, problems are : Problem set: 9 solved, 79 unsolved in 1974 ms.
Refiners :[Domain max(s): 54/54 constraints, Positive P Invariants (semi-flows): 7/7 constraints, Generalized P Invariants (flows): 10/10 constraints, State Equation: 54/54 constraints, ReadFeed: 13/13 constraints, PredecessorRefiner: 79/88 constraints, Known Traps: 18/18 constraints]
After SMT, in 5016ms problems are : Problem set: 9 solved, 79 unsolved
Search for dead transitions found 9 dead transitions in 5032ms
Found 9 dead transitions using SMT.
Drop transitions (Dead Transitions using SMT only with invariants) removed 9 transitions
Dead transitions reduction (with SMT) removed 9 transitions
Starting structural reductions in LTL mode, iteration 1 : 54/54 places, 82/91 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 5440 ms. Remains : 54/54 places, 82/91 transitions.
Support contains 52 out of 54 places after structural reductions.
[2024-06-01 07:08:12] [INFO ] Flatten gal took : 32 ms
[2024-06-01 07:08:12] [INFO ] Flatten gal took : 20 ms
[2024-06-01 07:08:12] [INFO ] Input system was already deterministic with 82 transitions.
Reduction of identical properties reduced properties to check from 66 to 58
RANDOM walk for 40000 steps (8 resets) in 1886 ms. (21 steps per ms) remains 10/58 properties
BEST_FIRST walk for 40002 steps (8 resets) in 459 ms. (86 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40002 steps (8 resets) in 150 ms. (264 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40001 steps (8 resets) in 335 ms. (119 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40003 steps (8 resets) in 201 ms. (198 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40002 steps (8 resets) in 165 ms. (240 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40001 steps (8 resets) in 126 ms. (314 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40001 steps (8 resets) in 109 ms. (363 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40003 steps (8 resets) in 83 ms. (476 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40002 steps (8 resets) in 62 ms. (634 steps per ms) remains 10/10 properties
BEST_FIRST walk for 40003 steps (8 resets) in 74 ms. (533 steps per ms) remains 10/10 properties
[2024-06-01 07:08:13] [INFO ] Flow matrix only has 68 transitions (discarded 14 similar events)
// Phase 1: matrix 68 rows 54 cols
[2024-06-01 07:08:13] [INFO ] Computed 17 invariants in 6 ms
[2024-06-01 07:08:13] [INFO ] State equation strengthened by 13 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/38 variables, 38/38 constraints. Problems are: Problem set: 0 solved, 10 unsolved
Problem AtomicPropp1 is UNSAT
At refinement iteration 1 (INCLUDED_ONLY) 0/38 variables, 2/40 constraints. Problems are: Problem set: 1 solved, 9 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/38 variables, 2/42 constraints. Problems are: Problem set: 1 solved, 9 unsolved
All remaining problems are real, not stopping.
At refinement iteration 3 (INCLUDED_ONLY) 0/38 variables, 0/42 constraints. Problems are: Problem set: 1 solved, 9 unsolved
Problem AtomicPropp14 is UNSAT
Problem AtomicPropp40 is UNSAT
Problem AtomicPropp59 is UNSAT
At refinement iteration 4 (OVERLAPS) 11/49 variables, 5/47 constraints. Problems are: Problem set: 4 solved, 6 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/49 variables, 11/58 constraints. Problems are: Problem set: 4 solved, 6 unsolved
Problem AtomicPropp24 is UNSAT
Problem AtomicPropp34 is UNSAT
Problem AtomicPropp45 is UNSAT
At refinement iteration 6 (INCLUDED_ONLY) 0/49 variables, 3/61 constraints. Problems are: Problem set: 7 solved, 3 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/49 variables, 0/61 constraints. Problems are: Problem set: 7 solved, 3 unsolved
Problem AtomicPropp26 is UNSAT
Problem AtomicPropp35 is UNSAT
Problem AtomicPropp61 is UNSAT
After SMT solving in domain Real declared 54/122 variables, and 66 constraints, problems are : Problem set: 10 solved, 0 unsolved in 103 ms.
Refiners :[Domain max(s): 49/54 constraints, Positive P Invariants (semi-flows): 7/7 constraints, Generalized P Invariants (flows): 10/10 constraints, State Equation: 0/54 constraints, ReadFeed: 0/13 constraints, PredecessorRefiner: 10/10 constraints, Known Traps: 0/0 constraints]
After SMT, in 145ms problems are : Problem set: 10 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 10 atomic propositions for a total of 16 simplifications.
FORMULA SafeBus-PT-03-CTLFireability-2024-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SafeBus-PT-03-CTLFireability-2024-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 07:08:13] [INFO ] Flatten gal took : 11 ms
[2024-06-01 07:08:13] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA SafeBus-PT-03-CTLFireability-2024-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 07:08:13] [INFO ] Flatten gal took : 14 ms
[2024-06-01 07:08:14] [INFO ] Input system was already deterministic with 82 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 0 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 82/82 transitions.
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 6 ms
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 8 ms
[2024-06-01 07:08:14] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 82/82 transitions.
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 7 ms
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 8 ms
[2024-06-01 07:08:14] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 82/82 transitions.
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 6 ms
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 8 ms
[2024-06-01 07:08:14] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 82/82 transitions.
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 6 ms
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 9 ms
[2024-06-01 07:08:14] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 82/82 transitions.
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 6 ms
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 7 ms
[2024-06-01 07:08:14] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 0 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 82/82 transitions.
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 7 ms
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 6 ms
[2024-06-01 07:08:14] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 82/82 transitions.
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 6 ms
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 6 ms
[2024-06-01 07:08:14] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 82/82 transitions.
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 5 ms
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 5 ms
[2024-06-01 07:08:14] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 7 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 54/54 places, 82/82 transitions.
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 5 ms
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 5 ms
[2024-06-01 07:08:14] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 82/82 transitions.
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 4 ms
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 5 ms
[2024-06-01 07:08:14] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 3 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 54/54 places, 82/82 transitions.
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 4 ms
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 5 ms
[2024-06-01 07:08:14] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 82/82 transitions.
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 4 ms
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 6 ms
[2024-06-01 07:08:14] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 82/82 transitions.
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 4 ms
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 4 ms
[2024-06-01 07:08:14] [INFO ] Input system was already deterministic with 82 transitions.
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 11 ms
[2024-06-01 07:08:14] [INFO ] Flatten gal took : 8 ms
[2024-06-01 07:08:14] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 12 ms.
[2024-06-01 07:08:14] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 54 places, 82 transitions and 457 arcs took 5 ms.
Total runtime 8091 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : SafeBus-PT-03-CTLFireability-2024-00
Could not compute solution for formula : SafeBus-PT-03-CTLFireability-2024-01
Could not compute solution for formula : SafeBus-PT-03-CTLFireability-2024-02
Could not compute solution for formula : SafeBus-PT-03-CTLFireability-2024-04
Could not compute solution for formula : SafeBus-PT-03-CTLFireability-2024-05
Could not compute solution for formula : SafeBus-PT-03-CTLFireability-2024-06
Could not compute solution for formula : SafeBus-PT-03-CTLFireability-2024-07
Could not compute solution for formula : SafeBus-PT-03-CTLFireability-2024-09
Could not compute solution for formula : SafeBus-PT-03-CTLFireability-2024-10
Could not compute solution for formula : SafeBus-PT-03-CTLFireability-2024-12
Could not compute solution for formula : SafeBus-PT-03-CTLFireability-2024-13
Could not compute solution for formula : SafeBus-PT-03-CTLFireability-2024-14
Could not compute solution for formula : SafeBus-PT-03-CTLFireability-2024-15

BK_STOP 1717225694872

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name SafeBus-PT-03-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/565/ctl_0_
ctl formula name SafeBus-PT-03-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/565/ctl_1_
ctl formula name SafeBus-PT-03-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/565/ctl_2_
ctl formula name SafeBus-PT-03-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/565/ctl_3_
ctl formula name SafeBus-PT-03-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/565/ctl_4_
ctl formula name SafeBus-PT-03-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/565/ctl_5_
ctl formula name SafeBus-PT-03-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/565/ctl_6_
ctl formula name SafeBus-PT-03-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/565/ctl_7_
ctl formula name SafeBus-PT-03-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/565/ctl_8_
ctl formula name SafeBus-PT-03-CTLFireability-2024-12
ctl formula formula --ctl=/tmp/565/ctl_9_
ctl formula name SafeBus-PT-03-CTLFireability-2024-13
ctl formula formula --ctl=/tmp/565/ctl_10_
ctl formula name SafeBus-PT-03-CTLFireability-2024-14
ctl formula formula --ctl=/tmp/565/ctl_11_
ctl formula name SafeBus-PT-03-CTLFireability-2024-15
ctl formula formula --ctl=/tmp/565/ctl_12_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SafeBus-PT-03"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is SafeBus-PT-03, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r524-tall-171679080300410"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SafeBus-PT-03.tgz
mv SafeBus-PT-03 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;