Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r524-tall-171679080200378.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is SafeBus-COL-15, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r524-tall-171679080200378
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 548K
-rw-r--r-- 1 mcc users 8.0K Apr 12 15:35 CTLCardinality.txt
-rw-r--r-- 1 mcc users 88K Apr 12 15:35 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.6K Apr 12 15:29 CTLFireability.txt
-rw-r--r-- 1 mcc users 62K Apr 12 15:29 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Apr 23 07:49 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Apr 23 07:49 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Apr 23 07:49 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 23 07:49 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Apr 12 16:31 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 134K Apr 12 16:31 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.5K Apr 12 16:24 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 79K Apr 12 16:24 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 23 07:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 23 07:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_pt
-rw-r--r-- 1 mcc users 3 May 18 16:43 instance
-rw-r--r-- 1 mcc users 5 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 42K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SafeBus-COL-15-CTLFireability-2024-00
FORMULA_NAME SafeBus-COL-15-CTLFireability-2024-01
FORMULA_NAME SafeBus-COL-15-CTLFireability-2024-02
FORMULA_NAME SafeBus-COL-15-CTLFireability-2024-03
FORMULA_NAME SafeBus-COL-15-CTLFireability-2024-04
FORMULA_NAME SafeBus-COL-15-CTLFireability-2024-05
FORMULA_NAME SafeBus-COL-15-CTLFireability-2024-06
FORMULA_NAME SafeBus-COL-15-CTLFireability-2024-07
FORMULA_NAME SafeBus-COL-15-CTLFireability-2024-08
FORMULA_NAME SafeBus-COL-15-CTLFireability-2024-09
FORMULA_NAME SafeBus-COL-15-CTLFireability-2024-10
FORMULA_NAME SafeBus-COL-15-CTLFireability-2024-11
FORMULA_NAME SafeBus-COL-15-CTLFireability-2024-12
FORMULA_NAME SafeBus-COL-15-CTLFireability-2024-13
FORMULA_NAME SafeBus-COL-15-CTLFireability-2024-14
FORMULA_NAME SafeBus-COL-15-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717222601115

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SafeBus-COL-15
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 06:16:42] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 06:16:42] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 06:16:42] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2024-06-01 06:16:42] [WARNING] Using fallBack plugin, rng conformance not checked
[2024-06-01 06:16:42] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 596 ms
[2024-06-01 06:16:43] [INFO ] Detected 1 constant HL places corresponding to 15 PT places.
[2024-06-01 06:16:43] [INFO ] Imported 20 HL places and 14 HL transitions for a total of 636 PT places and 59206.0 transition bindings in 30 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 15 ms.
[2024-06-01 06:16:43] [INFO ] Built PT skeleton of HLPN with 20 places and 14 transitions 68 arcs in 3 ms.
[2024-06-01 06:16:43] [INFO ] Skeletonized 4 HLPN properties in 1 ms. Removed 12 properties that had guard overlaps.
Computed a total of 3 stabilizing places and 0 stable transitions
Remains 4 properties that can be checked using skeleton over-approximation.
Reduce places removed 3 places and 0 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
RANDOM walk for 40000 steps (8 resets) in 753 ms. (53 steps per ms) remains 1/7 properties
BEST_FIRST walk for 40002 steps (8 resets) in 213 ms. (186 steps per ms) remains 1/1 properties
// Phase 1: matrix 14 rows 17 cols
[2024-06-01 06:16:43] [INFO ] Computed 7 invariants in 10 ms
[2024-06-01 06:16:43] [INFO ] State equation strengthened by 3 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/4 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 1 (OVERLAPS) 8/12 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/12 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 3 (OVERLAPS) 4/16 variables, 3/6 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/16 variables, 0/6 constraints. Problems are: Problem set: 0 solved, 1 unsolved
Problem AtomicPropp4 is UNSAT
After SMT solving in domain Real declared 17/31 variables, and 7 constraints, problems are : Problem set: 1 solved, 0 unsolved in 283 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, Generalized P Invariants (flows): 3/3 constraints, State Equation: 0/17 constraints, ReadFeed: 0/3 constraints, PredecessorRefiner: 1/1 constraints, Known Traps: 0/0 constraints]
After SMT, in 334ms problems are : Problem set: 1 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 1 atomic propositions for a total of 4 simplifications.
FORMULA SafeBus-COL-15-CTLFireability-2024-14 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 06:16:43] [INFO ] Flatten gal took : 15 ms
[2024-06-01 06:16:43] [INFO ] Flatten gal took : 3 ms
Domain [It(15), It(15)] of place AMC breaks symmetries in sort It
[2024-06-01 06:16:43] [INFO ] Unfolded HLPN to a Petri net with 636 places and 4801 transitions 34264 arcs in 98 ms.
[2024-06-01 06:16:43] [INFO ] Unfolded 15 HLPN properties in 5 ms.
[2024-06-01 06:16:44] [INFO ] Reduced 195 identical enabling conditions.
[2024-06-01 06:16:44] [INFO ] Reduced 195 identical enabling conditions.
[2024-06-01 06:16:44] [INFO ] Reduced 195 identical enabling conditions.
[2024-06-01 06:16:44] [INFO ] Reduced 195 identical enabling conditions.
[2024-06-01 06:16:44] [INFO ] Reduced 195 identical enabling conditions.
[2024-06-01 06:16:44] [INFO ] Reduced 195 identical enabling conditions.
[2024-06-01 06:16:44] [INFO ] Reduced 195 identical enabling conditions.
[2024-06-01 06:16:44] [INFO ] Reduced 195 identical enabling conditions.
Deduced a syphon composed of 15 places in 14 ms
Reduce places removed 30 places and 30 transitions.
Support contains 606 out of 606 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 27 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
[2024-06-01 06:16:45] [INFO ] Flow matrix only has 1412 transitions (discarded 3359 similar events)
// Phase 1: matrix 1412 rows 606 cols
[2024-06-01 06:16:45] [INFO ] Computed 65 invariants in 100 ms
[2024-06-01 06:16:45] [INFO ] Implicit Places using invariants in 258 ms returned []
[2024-06-01 06:16:45] [INFO ] Flow matrix only has 1412 transitions (discarded 3359 similar events)
[2024-06-01 06:16:45] [INFO ] Invariant cache hit.
[2024-06-01 06:16:46] [INFO ] State equation strengthened by 241 read => feed constraints.
[2024-06-01 06:16:46] [INFO ] Implicit Places using invariants and state equation in 790 ms returned []
Implicit Place search using SMT with State Equation took 1057 ms to find 0 implicit places.
Running 4756 sub problems to find dead transitions.
[2024-06-01 06:16:46] [INFO ] Flow matrix only has 1412 transitions (discarded 3359 similar events)
[2024-06-01 06:16:46] [INFO ] Invariant cache hit.
[2024-06-01 06:16:46] [INFO ] State equation strengthened by 241 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/606 variables, 31/31 constraints. Problems are: Problem set: 0 solved, 4756 unsolved
SMT process timed out in 58954ms, After SMT, problems are : Problem set: 0 solved, 4756 unsolved
Search for dead transitions found 0 dead transitions in 59030ms
Finished structural reductions in LTL mode , in 1 iterations and 60147 ms. Remains : 606/606 places, 4771/4771 transitions.
Support contains 606 out of 606 places after structural reductions.
[2024-06-01 06:17:46] [INFO ] Flatten gal took : 767 ms
[2024-06-01 06:17:54] [INFO ] Flatten gal took : 932 ms
[2024-06-01 06:18:00] [INFO ] Input system was already deterministic with 4771 transitions.
Reduction of identical properties reduced properties to check from 39 to 34
RANDOM walk for 40000 steps (8 resets) in 4461 ms. (8 steps per ms) remains 6/34 properties
BEST_FIRST walk for 40002 steps (8 resets) in 1125 ms. (35 steps per ms) remains 6/6 properties
BEST_FIRST walk for 40003 steps (8 resets) in 16836 ms. (2 steps per ms) remains 6/6 properties
BEST_FIRST walk for 40003 steps (8 resets) in 366 ms. (109 steps per ms) remains 6/6 properties
BEST_FIRST walk for 40003 steps (8 resets) in 1233 ms. (32 steps per ms) remains 6/6 properties
BEST_FIRST walk for 40004 steps (8 resets) in 310 ms. (128 steps per ms) remains 6/6 properties
BEST_FIRST walk for 40002 steps (8 resets) in 1073 ms. (37 steps per ms) remains 6/6 properties
[2024-06-01 06:18:07] [INFO ] Flow matrix only has 1412 transitions (discarded 3359 similar events)
[2024-06-01 06:18:07] [INFO ] Invariant cache hit.
[2024-06-01 06:18:07] [INFO ] State equation strengthened by 241 read => feed constraints.
Problem AtomicPropp20 is UNSAT
Problem AtomicPropp37 is UNSAT
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/561 variables, 2/2 constraints. Problems are: Problem set: 2 solved, 4 unsolved
Problem AtomicPropp7 is UNSAT
Problem AtomicPropp11 is UNSAT
Problem AtomicPropp21 is UNSAT
Problem AtomicPropp22 is UNSAT
After SMT solving in domain Real declared 561/2018 variables, and 19 constraints, problems are : Problem set: 6 solved, 0 unsolved in 542 ms.
Refiners :[Positive P Invariants (semi-flows): 2/31 constraints, Generalized P Invariants (flows): 17/34 constraints, State Equation: 0/606 constraints, ReadFeed: 0/241 constraints, PredecessorRefiner: 3/3 constraints, Known Traps: 0/0 constraints]
After SMT, in 10035ms problems are : Problem set: 6 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 6 atomic propositions for a total of 15 simplifications.
FORMULA SafeBus-COL-15-CTLFireability-2024-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 06:18:19] [INFO ] Flatten gal took : 635 ms
[2024-06-01 06:18:23] [INFO ] Flatten gal took : 685 ms
[2024-06-01 06:18:28] [INFO ] Input system was already deterministic with 4771 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 13 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 16 ms. Remains : 606/606 places, 4771/4771 transitions.
[2024-06-01 06:18:29] [INFO ] Flatten gal took : 250 ms
[2024-06-01 06:18:30] [INFO ] Flatten gal took : 319 ms
[2024-06-01 06:18:30] [INFO ] Input system was already deterministic with 4771 transitions.
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 13 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 18 ms. Remains : 606/606 places, 4771/4771 transitions.
[2024-06-01 06:18:31] [INFO ] Flatten gal took : 229 ms
[2024-06-01 06:18:31] [INFO ] Flatten gal took : 288 ms
[2024-06-01 06:18:32] [INFO ] Input system was already deterministic with 4771 transitions.
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 18 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 19 ms. Remains : 606/606 places, 4771/4771 transitions.
[2024-06-01 06:18:32] [INFO ] Flatten gal took : 173 ms
[2024-06-01 06:18:32] [INFO ] Flatten gal took : 195 ms
[2024-06-01 06:18:33] [INFO ] Input system was already deterministic with 4771 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 1234 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1238 ms. Remains : 606/606 places, 4771/4771 transitions.
[2024-06-01 06:18:34] [INFO ] Flatten gal took : 234 ms
[2024-06-01 06:18:35] [INFO ] Flatten gal took : 300 ms
[2024-06-01 06:18:35] [INFO ] Input system was already deterministic with 4771 transitions.
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 78 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 80 ms. Remains : 606/606 places, 4771/4771 transitions.
[2024-06-01 06:18:36] [INFO ] Flatten gal took : 172 ms
[2024-06-01 06:18:36] [INFO ] Flatten gal took : 184 ms
[2024-06-01 06:18:36] [INFO ] Input system was already deterministic with 4771 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 1167 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1168 ms. Remains : 606/606 places, 4771/4771 transitions.
[2024-06-01 06:18:38] [INFO ] Flatten gal took : 209 ms
[2024-06-01 06:18:38] [INFO ] Flatten gal took : 246 ms
[2024-06-01 06:18:38] [INFO ] Input system was already deterministic with 4771 transitions.
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 39 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 44 ms. Remains : 606/606 places, 4771/4771 transitions.
[2024-06-01 06:18:39] [INFO ] Flatten gal took : 157 ms
[2024-06-01 06:18:39] [INFO ] Flatten gal took : 173 ms
[2024-06-01 06:18:39] [INFO ] Input system was already deterministic with 4771 transitions.
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 10 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 606/606 places, 4771/4771 transitions.
[2024-06-01 06:18:40] [INFO ] Flatten gal took : 219 ms
[2024-06-01 06:18:40] [INFO ] Flatten gal took : 273 ms
[2024-06-01 06:18:40] [INFO ] Input system was already deterministic with 4771 transitions.
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 8 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 606/606 places, 4771/4771 transitions.
[2024-06-01 06:18:41] [INFO ] Flatten gal took : 176 ms
[2024-06-01 06:18:41] [INFO ] Flatten gal took : 222 ms
[2024-06-01 06:18:41] [INFO ] Input system was already deterministic with 4771 transitions.
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 23 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 25 ms. Remains : 606/606 places, 4771/4771 transitions.
[2024-06-01 06:18:42] [INFO ] Flatten gal took : 158 ms
[2024-06-01 06:18:42] [INFO ] Flatten gal took : 199 ms
[2024-06-01 06:18:42] [INFO ] Input system was already deterministic with 4771 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 1013 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1014 ms. Remains : 606/606 places, 4771/4771 transitions.
[2024-06-01 06:18:43] [INFO ] Flatten gal took : 162 ms
[2024-06-01 06:18:44] [INFO ] Flatten gal took : 174 ms
[2024-06-01 06:18:44] [INFO ] Input system was already deterministic with 4771 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 1142 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1142 ms. Remains : 606/606 places, 4771/4771 transitions.
[2024-06-01 06:18:45] [INFO ] Flatten gal took : 149 ms
[2024-06-01 06:18:45] [INFO ] Flatten gal took : 170 ms
[2024-06-01 06:18:46] [INFO ] Input system was already deterministic with 4771 transitions.
RANDOM walk for 128 steps (0 resets) in 14 ms. (8 steps per ms) remains 0/1 properties
FORMULA SafeBus-COL-15-CTLFireability-2024-12 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 944 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 944 ms. Remains : 606/606 places, 4771/4771 transitions.
[2024-06-01 06:18:47] [INFO ] Flatten gal took : 164 ms
[2024-06-01 06:18:47] [INFO ] Flatten gal took : 188 ms
[2024-06-01 06:18:47] [INFO ] Input system was already deterministic with 4771 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 914 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 914 ms. Remains : 606/606 places, 4771/4771 transitions.
[2024-06-01 06:18:48] [INFO ] Flatten gal took : 150 ms
[2024-06-01 06:18:49] [INFO ] Flatten gal took : 189 ms
[2024-06-01 06:18:49] [INFO ] Input system was already deterministic with 4771 transitions.
RANDOM walk for 116 steps (0 resets) in 7 ms. (14 steps per ms) remains 0/1 properties
FORMULA SafeBus-COL-15-CTLFireability-2024-15 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
[2024-06-01 06:18:50] [INFO ] Flatten gal took : 686 ms
[2024-06-01 06:18:55] [INFO ] Flatten gal took : 721 ms
[2024-06-01 06:18:59] [INFO ] Export to MCC of 12 properties in file /home/mcc/execution/CTLFireability.sr.xml took 208 ms.
[2024-06-01 06:18:59] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 606 places, 4771 transitions and 34129 arcs took 53 ms.
Total runtime 137369 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : SafeBus-COL-15-CTLFireability-2024-00
Could not compute solution for formula : SafeBus-COL-15-CTLFireability-2024-01
Could not compute solution for formula : SafeBus-COL-15-CTLFireability-2024-03
Could not compute solution for formula : SafeBus-COL-15-CTLFireability-2024-04
Could not compute solution for formula : SafeBus-COL-15-CTLFireability-2024-05
Could not compute solution for formula : SafeBus-COL-15-CTLFireability-2024-06
Could not compute solution for formula : SafeBus-COL-15-CTLFireability-2024-07
Could not compute solution for formula : SafeBus-COL-15-CTLFireability-2024-08
Could not compute solution for formula : SafeBus-COL-15-CTLFireability-2024-09
Could not compute solution for formula : SafeBus-COL-15-CTLFireability-2024-10
Could not compute solution for formula : SafeBus-COL-15-CTLFireability-2024-11
Could not compute solution for formula : SafeBus-COL-15-CTLFireability-2024-13

BK_STOP 1717222742188

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name SafeBus-COL-15-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/526/ctl_0_
ctl formula name SafeBus-COL-15-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/526/ctl_1_
ctl formula name SafeBus-COL-15-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/526/ctl_2_
ctl formula name SafeBus-COL-15-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/526/ctl_3_
ctl formula name SafeBus-COL-15-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/526/ctl_4_
ctl formula name SafeBus-COL-15-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/526/ctl_5_
ctl formula name SafeBus-COL-15-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/526/ctl_6_
ctl formula name SafeBus-COL-15-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/526/ctl_7_
ctl formula name SafeBus-COL-15-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/526/ctl_8_
ctl formula name SafeBus-COL-15-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/526/ctl_9_
ctl formula name SafeBus-COL-15-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/526/ctl_10_
ctl formula name SafeBus-COL-15-CTLFireability-2024-13
ctl formula formula --ctl=/tmp/526/ctl_11_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SafeBus-COL-15"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is SafeBus-COL-15, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r524-tall-171679080200378"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SafeBus-COL-15.tgz
mv SafeBus-COL-15 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;