fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r524-tall-171679080100348
Last Updated
July 7, 2024

About the Execution of LTSMin+red for RwMutex-PT-r2000w0010

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1287.371 310577.00 346937.00 884.90 FFFFFFFFFFFFFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r524-tall-171679080100348.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is RwMutex-PT-r2000w0010, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r524-tall-171679080100348
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 5.0M
-rw-r--r-- 1 mcc users 7.5K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 82K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 59K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Apr 23 07:49 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 23 07:49 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Apr 23 07:49 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Apr 23 07:49 LTLFireability.xml
-rw-r--r-- 1 mcc users 16K Apr 13 07:36 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 180K Apr 13 07:36 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 16K Apr 13 07:22 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 145K Apr 13 07:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 23 07:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 23 07:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 11 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 4.4M May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RwMutex-PT-r2000w0010-LTLFireability-00
FORMULA_NAME RwMutex-PT-r2000w0010-LTLFireability-01
FORMULA_NAME RwMutex-PT-r2000w0010-LTLFireability-02
FORMULA_NAME RwMutex-PT-r2000w0010-LTLFireability-03
FORMULA_NAME RwMutex-PT-r2000w0010-LTLFireability-04
FORMULA_NAME RwMutex-PT-r2000w0010-LTLFireability-05
FORMULA_NAME RwMutex-PT-r2000w0010-LTLFireability-06
FORMULA_NAME RwMutex-PT-r2000w0010-LTLFireability-07
FORMULA_NAME RwMutex-PT-r2000w0010-LTLFireability-08
FORMULA_NAME RwMutex-PT-r2000w0010-LTLFireability-09
FORMULA_NAME RwMutex-PT-r2000w0010-LTLFireability-10
FORMULA_NAME RwMutex-PT-r2000w0010-LTLFireability-11
FORMULA_NAME RwMutex-PT-r2000w0010-LTLFireability-12
FORMULA_NAME RwMutex-PT-r2000w0010-LTLFireability-13
FORMULA_NAME RwMutex-PT-r2000w0010-LTLFireability-14
FORMULA_NAME RwMutex-PT-r2000w0010-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1717222051158

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=LTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RwMutex-PT-r2000w0010
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 06:07:32] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 06:07:32] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 06:07:32] [INFO ] Load time of PNML (sax parser for PT used): 465 ms
[2024-06-01 06:07:32] [INFO ] Transformed 6020 places.
[2024-06-01 06:07:32] [INFO ] Transformed 4020 transitions.
[2024-06-01 06:07:32] [INFO ] Found NUPN structural information;
[2024-06-01 06:07:32] [INFO ] Parsed PT model containing 6020 places and 4020 transitions and 52040 arcs in 633 ms.
Parsed 16 properties from file /home/mcc/execution/LTLFireability.xml in 11 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 1 formulas.
FORMULA RwMutex-PT-r2000w0010-LTLFireability-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 47 out of 6020 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 6020/6020 places, 4020/4020 transitions.
Applied a total of 0 rules in 725 ms. Remains 6020 /6020 variables (removed 0) and now considering 4020/4020 (removed 0) transitions.
// Phase 1: matrix 4020 rows 6020 cols
[2024-06-01 06:07:33] [INFO ] Computed 4010 invariants in 95 ms
[2024-06-01 06:08:06] [INFO ] Performed 3441/6020 implicitness test of which 1347 returned IMPLICIT in 30 seconds.
[2024-06-01 06:08:36] [INFO ] Performed 3544/6020 implicitness test of which 1357 returned IMPLICIT in 60 seconds.
[2024-06-01 06:09:06] [INFO ] Performed 3648/6020 implicitness test of which 1368 returned IMPLICIT in 90 seconds.
[2024-06-01 06:09:36] [INFO ] Performed 3751/6020 implicitness test of which 1378 returned IMPLICIT in 120 seconds.
[2024-06-01 06:10:06] [INFO ] Performed 3852/6020 implicitness test of which 1388 returned IMPLICIT in 150 seconds.
[2024-06-01 06:10:14] [INFO ] Implicit Places using invariants in 160237 ms returned [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191, 192, 193, 194, 195, 196, 197, 198, 199, 200, 201, 202, 204, 205, 206, 207, 208, 209, 210, 211, 212, 213, 214, 215, 216, 217, 218, 219, 220, 221, 222, 223, 224, 226, 227, 228, 229, 230, 231, 232, 233, 234, 235, 236, 237, 238, 239, 240, 241, 242, 243, 244, 245, 246, 247, 248, 249, 250, 251, 252, 253, 254, 255, 256, 257, 258, 259, 260, 261, 262, 263, 264, 265, 266, 267, 268, 269, 270, 271, 272, 273, 274, 275, 276, 277, 278, 279, 280, 281, 282, 283, 284, 285, 286, 287, 288, 289, 290, 291, 292, 293, 294, 295, 297, 298, 299, 300, 301, 302, 303, 304, 305, 306, 307, 308, 309, 310, 311, 312, 313, 314, 315, 316, 317, 318, 319, 320, 321, 322, 323, 324, 325, 326, 327, 328, 329, 330, 331, 332, 333, 334, 335, 336, 337, 338, 339, 340, 341, 342, 343, 344, 345, 346, 347, 349, 350, 351, 352, 353, 354, 355, 356, 357, 358, 359, 360, 361, 362, 363, 364, 365, 366, 367, 368, 369, 370, 371, 372, 373, 374, 375, 376, 377, 378, 379, 380, 381, 382, 383, 385, 386, 387, 388, 389, 390, 391, 392, 393, 394, 395, 396, 397, 398, 399, 400, 401, 402, 403, 404, 405, 406, 407, 408, 409, 410, 411, 412, 413, 414, 415, 416, 417, 418, 419, 420, 421, 422, 423, 424, 425, 426, 427, 428, 429, 430, 431, 432, 433, 434, 435, 436, 437, 438, 439, 440, 441, 442, 443, 444, 445, 446, 447, 448, 449, 450, 451, 452, 453, 454, 455, 456, 457, 458, 459, 460, 461, 462, 463, 464, 465, 466, 467, 468, 469, 471, 472, 473, 474, 475, 476, 477, 478, 479, 480, 481, 482, 483, 484, 485, 486, 487, 488, 489, 490, 491, 492, 493, 494, 495, 496, 497, 498, 499, 500, 501, 502, 503, 504, 505, 506, 507, 508, 509, 510, 511, 512, 513, 514, 515, 516, 517, 518, 519, 520, 521, 522, 523, 524, 525, 526, 527, 528, 529, 531, 532, 533, 534, 535, 536, 537, 538, 539, 540, 541, 542, 543, 544, 545, 546, 547, 548, 549, 550, 551, 552, 553, 554, 555, 556, 557, 558, 559, 560, 561, 562, 563, 564, 565, 566, 567, 568, 569, 570, 571, 572, 573, 574, 575, 576, 577, 578, 579, 580, 581, 582, 583, 584, 585, 586, 587, 588, 589, 590, 591, 592, 593, 594, 595, 596, 597, 598, 599, 600, 601, 602, 603, 604, 605, 606, 607, 608, 609, 610, 611, 612, 613, 614, 615, 616, 617, 618, 619, 620, 621, 622, 623, 624, 625, 626, 627, 628, 629, 630, 631, 632, 633, 634, 635, 636, 637, 638, 639, 640, 641, 642, 643, 644, 645, 646, 647, 648, 649, 650, 651, 652, 653, 654, 655, 656, 657, 658, 659, 660, 661, 662, 663, 664, 665, 666, 667, 668, 669, 670, 671, 672, 673, 674, 675, 676, 677, 678, 679, 680, 681, 682, 683, 684, 685, 686, 687, 688, 689, 690, 691, 692, 693, 694, 695, 696, 697, 698, 699, 700, 701, 702, 703, 704, 705, 706, 707, 708, 709, 710, 711, 712, 713, 714, 715, 716, 717, 718, 719, 720, 721, 722, 723, 724, 725, 726, 727, 728, 729, 730, 731, 732, 733, 734, 735, 736, 737, 738, 739, 740, 741, 742, 743, 744, 745, 746, 747, 748, 749, 750, 751, 752, 753, 754, 755, 756, 757, 758, 759, 760, 761, 762, 763, 764, 765, 766, 767, 768, 769, 770, 771, 772, 773, 774, 775, 776, 777, 778, 779, 780, 781, 782, 783, 784, 785, 786, 787, 788, 789, 790, 791, 792, 793, 794, 795, 796, 797, 798, 799, 800, 801, 802, 803, 804, 805, 806, 807, 808, 809, 810, 811, 812, 813, 814, 815, 816, 817, 818, 819, 820, 821, 822, 823, 824, 825, 826, 827, 828, 829, 830, 831, 832, 833, 834, 835, 836, 837, 838, 839, 840, 841, 842, 843, 844, 845, 846, 847, 848, 849, 850, 851, 852, 853, 854, 855, 856, 857, 858, 859, 860, 861, 862, 863, 864, 865, 866, 867, 868, 869, 870, 871, 872, 873, 874, 875, 876, 877, 878, 879, 880, 881, 882, 883, 884, 885, 886, 887, 888, 889, 890, 891, 892, 893, 894, 895, 896, 897, 898, 899, 900, 901, 902, 903, 904, 905, 906, 907, 908, 909, 910, 911, 912, 913, 914, 915, 916, 917, 918, 919, 920, 921, 922, 923, 924, 925, 926, 927, 928, 929, 930, 931, 932, 933, 934, 935, 936, 937, 938, 939, 940, 941, 942, 943, 944, 945, 946, 947, 948, 949, 950, 951, 952, 953, 954, 955, 956, 957, 958, 959, 960, 961, 962, 963, 964, 965, 966, 967, 968, 969, 970, 971, 972, 973, 974, 975, 976, 977, 978, 979, 980, 981, 982, 983, 984, 985, 986, 987, 988, 989, 990, 991, 992, 993, 994, 995, 996, 997, 998, 999, 1000, 1001, 1002, 1003, 1004, 1005, 1006, 1007, 1008, 1009, 1010, 1011, 1012, 1013, 1014, 1015, 1016, 1017, 1018, 1019, 1020, 1021, 1022, 1023, 1024, 1025, 1026, 1027, 1028, 1029, 1030, 1031, 1032, 1033, 1034, 1035, 1036, 1037, 1038, 1039, 1040, 1041, 1042, 1043, 1044, 1045, 1046, 1047, 1048, 1049, 1050, 1051, 1052, 1053, 1054, 1055, 1056, 1057, 1058, 1059, 1060, 1061, 1062, 1063, 1064, 1065, 1066, 1067, 1068, 1069, 1070, 1071, 1072, 1073, 1074, 1075, 1076, 1077, 1078, 1079, 1080, 1081, 1082, 1083, 1084, 1086, 1087, 1088, 1089, 1090, 1091, 1092, 1093, 1094, 1095, 1096, 1097, 1098, 1099, 1100, 1101, 1102, 1103, 1104, 1105, 1106, 1107, 1108, 1109, 1110, 1111, 1112, 1113, 1114, 1115, 1116, 1117, 1118, 1119, 1120, 1121, 1122, 1123, 1124, 1125, 1126, 1135, 1146, 1157, 1168, 1179, 1190, 1201, 1212, 1223, 1224, 1235, 1246, 1257, 1268, 1279, 1290, 1301, 1312, 1323, 1334, 1335, 1346, 1357, 1368, 1379, 1390, 1401, 1412, 1423, 1434, 1445, 1446, 1457, 1468, 1479, 1490, 1501, 1512, 1523, 1534, 1545, 1556, 1557, 1568, 1579, 1590, 1601, 1612, 1623, 1634, 1645, 1656, 1667, 1668, 1679, 1690, 1701, 1712, 1723, 1734, 1745, 1756, 1767, 1778, 1779, 1790, 1801, 1812, 1823, 1834, 1845, 1856, 1867, 1878, 1889, 1890, 1901, 1912, 1923, 1934, 1945, 1956, 1967, 1978, 1989, 2000, 2001, 2012, 2023, 2034, 2045, 2056, 2067, 2078, 2089, 2100, 2111, 2112, 2123, 2134, 2145, 2156, 2167, 2178, 2189, 2200, 2211, 2222, 2223, 2224, 2235, 2246, 2257, 2268, 2279, 2290, 2301, 2312, 2323, 2334, 2335, 2346, 2357, 2368, 2379, 2390, 2401, 2412, 2423, 2434, 2445, 2446, 2457, 2468, 2479, 2490, 2501, 2512, 2523, 2534, 2545, 2556, 2557, 2568, 2579, 2590, 2601, 2612, 2623, 2634, 2645, 2656, 2667, 2668, 2679, 2690, 2701, 2712, 2723, 2734, 2745, 2756, 2767, 2778, 2779, 2790, 2801, 2823, 2834, 2845, 2856, 2867, 2878, 2889, 2890, 2901, 2912, 2923, 2934, 2945, 2956, 2967, 2978, 2989, 3000, 3001, 3012, 3023, 3034, 3045, 3056, 3067, 3078, 3089, 3100, 3111, 3112, 3123, 3134, 3145, 3156, 3167, 3178, 3189, 3200, 3211, 3222, 3223, 3234, 3245, 3256, 3267, 3278, 3289, 3300, 3311, 3322, 3333, 3334, 3335, 3346, 3357, 3368, 3379, 3390, 3401, 3412, 3423, 3434, 3445, 3446, 3457, 3468, 3479, 3490, 3501, 3512, 3523, 3534, 3545, 3556, 3557, 3568, 3579, 3590, 3601, 3612, 3623, 3634, 3645, 3656, 3667, 3668, 3679, 3690, 3701, 3712, 3723, 3734, 3745, 3756, 3767, 3778, 3779, 3790, 3801, 3812, 3823, 3834, 3845, 3856, 3867]
Discarding 1390 places :
Implicit Place search using SMT only with invariants took 160390 ms to find 1390 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 4630/6020 places, 4020/4020 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 4621 transition count 4011
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 4621 transition count 4011
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 0 with 9 rules applied. Total rules applied 27 place count 4621 transition count 4002
Applied a total of 27 rules in 878 ms. Remains 4621 /4630 variables (removed 9) and now considering 4002/4020 (removed 18) transitions.
// Phase 1: matrix 4002 rows 4621 cols
[2024-06-01 06:10:15] [INFO ] Computed 2620 invariants in 22 ms
[2024-06-01 06:10:43] [INFO ] Implicit Places using invariants in 28466 ms returned [2488, 2499, 2500, 2511, 2522, 2533, 2544, 2555, 2566, 2577, 2588, 2599, 2610, 2611, 2622, 2633, 2644, 2655, 2666, 2677, 2688, 2699, 2710, 2721, 2722, 2733, 2744, 2755, 2766, 2777, 2788, 2799, 2810, 2821, 2832, 2844, 2855, 2866, 2877, 2888, 2899, 2910, 2921, 2932, 2943, 2944, 2955, 2966, 2977, 2988, 2999, 3010, 3021, 3032, 3043, 3054, 3055, 3056, 3067, 3078, 3089, 3100, 3111, 3122, 3133, 3144, 3155, 3166, 3167, 3178, 3189, 3200, 3211, 3222, 3233, 3244, 3255, 3266, 3277, 3278, 3289, 3300, 3311, 3322, 3333, 3344, 3355, 3366, 3377, 3388, 3389, 3400, 3411, 3422, 3433, 3444, 3455, 3466, 3477, 3488, 3499, 3500, 3511, 3522, 3533, 3544, 3555, 3566, 3577, 3588, 3599, 3610, 3611, 3622, 3633, 3644, 3655, 3666, 3677, 3688, 3699, 3710, 3721, 3722, 3733, 3744, 3755, 3766, 3777, 3788, 3799, 3810, 3821, 3832, 3833, 3844, 3855, 3866, 3877, 3888, 3899, 3910, 3921, 3932, 3943, 3944, 3955, 3966, 3977, 3988, 3999, 4010, 4021, 4032, 4043, 4054, 4055, 4066, 4077, 4088, 4099, 4110, 4121, 4132, 4143, 4154, 4165, 4166, 4167, 4178, 4181, 4182, 4183, 4184, 4185, 4186, 4187, 4188, 4189, 4190, 4191, 4192, 4193, 4194, 4195, 4196, 4197, 4198, 4199, 4200, 4201, 4202, 4203, 4204, 4205, 4206, 4207, 4208, 4209, 4210, 4211, 4212, 4213, 4214, 4215, 4216, 4217, 4218, 4220, 4221, 4222, 4223, 4224, 4225, 4226, 4227, 4228, 4229, 4230, 4231, 4232, 4233, 4234, 4235, 4236, 4237, 4238, 4239, 4240, 4241, 4243, 4244, 4245, 4246, 4247, 4248, 4250, 4251, 4252, 4253, 4254, 4255, 4256, 4257, 4258, 4259, 4260, 4261, 4262, 4263, 4264, 4265, 4266, 4267, 4268, 4269, 4270, 4271, 4272, 4273, 4274, 4275, 4276, 4277, 4278, 4279, 4280, 4281, 4282, 4283, 4284, 4285, 4286, 4287, 4288, 4289, 4290, 4291, 4292, 4293, 4294, 4295, 4296, 4297, 4298, 4299, 4300, 4301, 4302, 4303, 4304, 4305, 4306, 4307, 4308, 4309, 4310, 4311, 4312, 4313, 4314, 4315, 4316, 4317, 4318, 4319, 4320, 4321, 4322, 4323, 4324, 4325, 4326, 4327, 4328, 4329, 4330, 4331, 4332, 4333, 4334, 4335, 4336, 4337, 4338, 4339, 4340, 4341, 4342, 4343, 4344, 4345, 4346, 4347, 4348, 4349, 4350, 4351, 4352, 4353, 4354, 4355, 4356, 4357, 4358, 4359, 4360, 4361, 4362, 4363, 4364, 4365, 4366, 4367, 4368, 4369, 4370, 4371, 4372, 4373, 4374, 4375, 4376, 4377, 4378, 4379, 4380, 4381, 4382, 4383, 4384, 4385, 4386, 4387, 4388, 4389, 4390, 4391, 4392, 4393, 4394, 4395, 4396, 4397, 4398, 4399, 4400, 4401, 4402, 4403, 4404, 4405, 4406, 4407, 4408, 4409, 4410, 4411, 4412, 4413, 4414, 4415, 4416, 4417, 4418, 4419, 4420, 4421, 4422, 4423, 4424, 4425, 4426, 4427, 4428, 4429, 4430, 4431, 4432, 4433, 4434, 4435, 4436, 4437, 4438, 4439, 4440, 4441, 4442, 4443, 4444, 4445, 4446, 4447, 4448, 4449, 4450, 4451, 4452, 4453, 4454, 4455, 4456, 4457, 4458, 4459, 4460, 4461, 4462, 4463, 4464, 4465, 4466, 4467, 4468, 4469, 4470, 4471, 4472, 4473, 4474, 4475, 4476, 4477, 4478, 4479, 4480, 4481, 4482, 4483, 4484, 4485, 4486, 4487, 4488, 4489, 4490, 4491, 4492, 4493, 4494, 4495, 4496, 4497, 4498, 4499, 4500, 4501, 4502, 4503, 4504, 4505, 4506, 4507, 4508, 4509, 4510, 4511, 4512, 4513, 4514, 4515, 4516, 4517, 4518, 4519, 4520, 4521, 4522, 4523, 4524, 4525, 4526, 4527, 4528, 4529, 4530, 4531, 4532, 4533, 4534, 4535, 4536, 4537, 4538, 4539, 4540, 4541, 4542, 4543, 4544, 4545, 4546, 4547, 4548, 4549, 4550, 4551, 4552, 4553, 4554, 4555, 4556, 4557, 4558, 4559, 4560, 4561, 4562, 4563, 4564, 4565, 4566, 4567, 4568, 4569, 4571, 4572, 4573, 4574, 4575, 4576, 4577, 4578, 4579, 4580, 4581, 4582, 4583, 4584, 4585, 4586, 4587, 4588, 4589, 4590, 4591, 4592, 4593, 4594, 4595, 4596, 4597, 4598, 4599, 4600, 4601, 4602, 4603, 4604, 4605, 4606, 4607, 4608, 4609, 4610, 4611, 4612, 4613, 4614, 4615, 4616, 4617, 4618, 4619, 4620]
Discarding 606 places :
Implicit Place search using SMT only with invariants took 28486 ms to find 606 implicit places.
Starting structural reductions in LTL mode, iteration 2 : 4015/6020 places, 4002/4020 transitions.
Applied a total of 0 rules in 202 ms. Remains 4015 /4015 variables (removed 0) and now considering 4002/4002 (removed 0) transitions.
Finished structural reductions in LTL mode , in 3 iterations and 190698 ms. Remains : 4015/6020 places, 4002/4020 transitions.
Support contains 47 out of 4015 places after structural reductions.
[2024-06-01 06:10:45] [INFO ] Flatten gal took : 1081 ms
[2024-06-01 06:10:45] [INFO ] Flatten gal took : 841 ms
[2024-06-01 06:10:46] [INFO ] Input system was already deterministic with 4002 transitions.
Support contains 44 out of 4015 places (down from 47) after GAL structural reductions.
RANDOM walk for 32187 steps (7 resets) in 8383 ms. (3 steps per ms) remains 0/31 properties
FORMULA RwMutex-PT-r2000w0010-LTLFireability-04 FALSE TECHNIQUES REACHABILITY_KNOWLEDGE
Computed a total of 0 stabilizing places and 0 stable transitions
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(p0))'
Support contains 1 out of 4015 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 4015/4015 places, 4002/4002 transitions.
Graph (trivial) has 3970 edges and 4015 vertex of which 3970 / 4015 are part of one of the 1985 SCC in 21 ms
Free SCC test removed 1985 places
Ensure Unique test removed 1985 transitions
Reduce isomorphic transitions removed 1985 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 15 transitions
Trivial Post-agglo rules discarded 15 transitions
Performed 15 trivial Post agglomeration. Transition count delta: 15
Iterating post reduction 0 with 15 rules applied. Total rules applied 16 place count 2030 transition count 2002
Reduce places removed 2028 places and 0 transitions.
Ensure Unique test removed 1998 transitions
Reduce isomorphic transitions removed 1998 transitions.
Iterating post reduction 1 with 4026 rules applied. Total rules applied 4042 place count 2 transition count 4
Drop transitions (Redundant composition of simpler transitions.) removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 4043 place count 2 transition count 3
Applied a total of 4043 rules in 69 ms. Remains 2 /4015 variables (removed 4013) and now considering 3/4002 (removed 3999) transitions.
// Phase 1: matrix 3 rows 2 cols
[2024-06-01 06:10:49] [INFO ] Computed 1 invariants in 0 ms
[2024-06-01 06:10:49] [INFO ] Implicit Places using invariants in 15 ms returned []
[2024-06-01 06:10:49] [INFO ] Invariant cache hit.
[2024-06-01 06:10:49] [INFO ] Implicit Places using invariants and state equation in 22 ms returned []
Implicit Place search using SMT with State Equation took 39 ms to find 0 implicit places.
[2024-06-01 06:10:49] [INFO ] Redundant transitions in 0 ms returned []
Running 1 sub problems to find dead transitions.
[2024-06-01 06:10:49] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/1 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 1 (OVERLAPS) 1/2 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/2 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 3 (OVERLAPS) 2/4 variables, 2/3 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/4 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 5 (OVERLAPS) 0/4 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 1 unsolved
No progress, stopping.
After SMT solving in domain Real declared 4/5 variables, and 3 constraints, problems are : Problem set: 0 solved, 1 unsolved in 36 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, State Equation: 2/2 constraints, PredecessorRefiner: 1/1 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 1 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/1 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 1 (OVERLAPS) 1/2 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/2 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 3 (OVERLAPS) 2/4 variables, 2/3 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/4 variables, 1/4 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/4 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 6 (OVERLAPS) 0/4 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 1 unsolved
No progress, stopping.
After SMT solving in domain Int declared 4/5 variables, and 4 constraints, problems are : Problem set: 0 solved, 1 unsolved in 47 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, State Equation: 2/2 constraints, PredecessorRefiner: 1/1 constraints, Known Traps: 0/0 constraints]
After SMT, in 96ms problems are : Problem set: 0 solved, 1 unsolved
Search for dead transitions found 0 dead transitions in 102ms
Starting structural reductions in SI_LTL mode, iteration 1 : 2/4015 places, 3/4002 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 219 ms. Remains : 2/4015 places, 3/4002 transitions.
Stuttering acceptance computed with spot in 151 ms :[(NOT p0)]
Running random walk in product with property : RwMutex-PT-r2000w0010-LTLFireability-00
Stuttering criterion allowed to conclude after 0 steps with 0 reset in 1 ms.
FORMULA RwMutex-PT-r2000w0010-LTLFireability-00 FALSE TECHNIQUES STUTTER_TEST
Treatment of property RwMutex-PT-r2000w0010-LTLFireability-00 finished in 429 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(X(G(p0))))'
Support contains 1 out of 4015 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 4015/4015 places, 4002/4002 transitions.
Applied a total of 0 rules in 200 ms. Remains 4015 /4015 variables (removed 0) and now considering 4002/4002 (removed 0) transitions.
// Phase 1: matrix 4002 rows 4015 cols
[2024-06-01 06:10:49] [INFO ] Computed 2014 invariants in 16 ms
[2024-06-01 06:10:51] [INFO ] Implicit Places using invariants in 2005 ms returned [1, 2, 3, 4, 5, 6, 7, 8, 1527, 2798, 4011, 4012, 4013, 4014]
Discarding 14 places :
Implicit Place search using SMT only with invariants took 2012 ms to find 14 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 4001/4015 places, 4002/4002 transitions.
Applied a total of 0 rules in 176 ms. Remains 4001 /4001 variables (removed 0) and now considering 4002/4002 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 2388 ms. Remains : 4001/4015 places, 4002/4002 transitions.
Stuttering acceptance computed with spot in 222 ms :[true, (NOT p0), (NOT p0), (NOT p0)]
Running random walk in product with property : RwMutex-PT-r2000w0010-LTLFireability-01
Entered a terminal (fully accepting) state of product in 19 steps with 0 reset in 19 ms.
FORMULA RwMutex-PT-r2000w0010-LTLFireability-01 FALSE TECHNIQUES STUTTER_TEST
Treatment of property RwMutex-PT-r2000w0010-LTLFireability-01 finished in 2667 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G(F(p0)))'
Support contains 2 out of 4015 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 4015/4015 places, 4002/4002 transitions.
Graph (trivial) has 3972 edges and 4015 vertex of which 3972 / 4015 are part of one of the 1986 SCC in 8 ms
Free SCC test removed 1986 places
Ensure Unique test removed 1986 transitions
Reduce isomorphic transitions removed 1986 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 13 transitions
Trivial Post-agglo rules discarded 13 transitions
Performed 13 trivial Post agglomeration. Transition count delta: 13
Iterating post reduction 0 with 13 rules applied. Total rules applied 14 place count 2029 transition count 2003
Reduce places removed 26 places and 0 transitions.
Iterating post reduction 1 with 26 rules applied. Total rules applied 40 place count 2003 transition count 2003
Applied a total of 40 rules in 417 ms. Remains 2003 /4015 variables (removed 2012) and now considering 2003/4002 (removed 1999) transitions.
[2024-06-01 06:10:52] [INFO ] Flow matrix only has 5 transitions (discarded 1998 similar events)
// Phase 1: matrix 5 rows 2003 cols
[2024-06-01 06:10:52] [INFO ] Computed 2001 invariants in 17 ms
[2024-06-01 06:10:54] [INFO ] Implicit Places using invariants in 1671 ms returned []
[2024-06-01 06:10:54] [INFO ] Flow matrix only has 5 transitions (discarded 1998 similar events)
[2024-06-01 06:10:54] [INFO ] Invariant cache hit.
[2024-06-01 06:10:56] [INFO ] Implicit Places using invariants and state equation in 2059 ms returned []
Implicit Place search using SMT with State Equation took 3736 ms to find 0 implicit places.
[2024-06-01 06:10:56] [INFO ] Redundant transitions in 112 ms returned []
Running 2 sub problems to find dead transitions.
[2024-06-01 06:10:56] [INFO ] Flow matrix only has 5 transitions (discarded 1998 similar events)
[2024-06-01 06:10:56] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/2 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 1 (OVERLAPS) 2001/2003 variables, 2001/2001 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/2003 variables, 0/2001 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 3 (OVERLAPS) 4/2007 variables, 2003/4004 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/2007 variables, 0/4004 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 5 (OVERLAPS) 0/2007 variables, 0/4004 constraints. Problems are: Problem set: 0 solved, 2 unsolved
No progress, stopping.
After SMT solving in domain Real declared 2007/2008 variables, and 4004 constraints, problems are : Problem set: 0 solved, 2 unsolved in 1016 ms.
Refiners :[Positive P Invariants (semi-flows): 2001/2001 constraints, State Equation: 2003/2003 constraints, PredecessorRefiner: 2/2 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 2 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/2 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 1 (OVERLAPS) 2001/2003 variables, 2001/2001 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/2003 variables, 0/2001 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 3 (OVERLAPS) 4/2007 variables, 2003/4004 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/2007 variables, 2/4006 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/2007 variables, 0/4006 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 6 (OVERLAPS) 0/2007 variables, 0/4006 constraints. Problems are: Problem set: 0 solved, 2 unsolved
No progress, stopping.
After SMT solving in domain Int declared 2007/2008 variables, and 4006 constraints, problems are : Problem set: 0 solved, 2 unsolved in 898 ms.
Refiners :[Positive P Invariants (semi-flows): 2001/2001 constraints, State Equation: 2003/2003 constraints, PredecessorRefiner: 2/2 constraints, Known Traps: 0/0 constraints]
After SMT, in 1941ms problems are : Problem set: 0 solved, 2 unsolved
Search for dead transitions found 0 dead transitions in 1941ms
Starting structural reductions in SI_LTL mode, iteration 1 : 2003/4015 places, 2003/4002 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 6217 ms. Remains : 2003/4015 places, 2003/4002 transitions.
Stuttering acceptance computed with spot in 70 ms :[(NOT p0), (NOT p0)]
Running random walk in product with property : RwMutex-PT-r2000w0010-LTLFireability-02
Stuttering criterion allowed to conclude after 2 steps with 0 reset in 1 ms.
FORMULA RwMutex-PT-r2000w0010-LTLFireability-02 FALSE TECHNIQUES STUTTER_TEST
Treatment of property RwMutex-PT-r2000w0010-LTLFireability-02 finished in 6315 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F((p0&&X((p1&&F(p2))))))'
Support contains 5 out of 4015 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 4015/4015 places, 4002/4002 transitions.
Applied a total of 0 rules in 212 ms. Remains 4015 /4015 variables (removed 0) and now considering 4002/4002 (removed 0) transitions.
// Phase 1: matrix 4002 rows 4015 cols
[2024-06-01 06:10:58] [INFO ] Computed 2014 invariants in 17 ms
[2024-06-01 06:11:00] [INFO ] Implicit Places using invariants in 1695 ms returned [1, 2, 3, 4, 5, 6, 7, 1527, 2798, 4011, 4012, 4014]
Discarding 12 places :
Implicit Place search using SMT only with invariants took 1701 ms to find 12 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 4003/4015 places, 4002/4002 transitions.
Applied a total of 0 rules in 199 ms. Remains 4003 /4003 variables (removed 0) and now considering 4002/4002 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 2113 ms. Remains : 4003/4015 places, 4002/4002 transitions.
Stuttering acceptance computed with spot in 143 ms :[(OR (NOT p0) (NOT p2) (NOT p1)), (NOT p2), (OR (NOT p1) (NOT p2))]
Running random walk in product with property : RwMutex-PT-r2000w0010-LTLFireability-03
Product exploration timeout after 43700 steps with 7 reset in 10002 ms.
Stack based approach found an accepted trace after 11006 steps with 2 reset with depth 5090 and stack size 3064 in 2496 ms.
FORMULA RwMutex-PT-r2000w0010-LTLFireability-03 FALSE TECHNIQUES STACK_TEST
Treatment of property RwMutex-PT-r2000w0010-LTLFireability-03 finished in 14782 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((X((!p0&&X((F(p1)||G(!p0))))) U (p2 U p3)))'
Support contains 5 out of 4015 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 4015/4015 places, 4002/4002 transitions.
Applied a total of 0 rules in 187 ms. Remains 4015 /4015 variables (removed 0) and now considering 4002/4002 (removed 0) transitions.
[2024-06-01 06:11:13] [INFO ] Invariant cache hit.
[2024-06-01 06:11:15] [INFO ] Implicit Places using invariants in 1695 ms returned [1, 2, 3, 4, 5, 6, 7, 8, 2798, 4011, 4012, 4013, 4014]
Discarding 13 places :
Implicit Place search using SMT only with invariants took 1700 ms to find 13 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 4002/4015 places, 4002/4002 transitions.
Applied a total of 0 rules in 173 ms. Remains 4002 /4002 variables (removed 0) and now considering 4002/4002 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 2061 ms. Remains : 4002/4015 places, 4002/4002 transitions.
Stuttering acceptance computed with spot in 365 ms :[(AND (NOT p1) p0), true, (NOT p1), (NOT p3), (NOT p3), (NOT p3), (OR (NOT p3) p0), (OR (NOT p3) (AND p0 (NOT p1))), (OR (NOT p3) (NOT p1))]
Running random walk in product with property : RwMutex-PT-r2000w0010-LTLFireability-05
Entered a terminal (fully accepting) state of product in 24298 steps with 24 reset in 4773 ms.
FORMULA RwMutex-PT-r2000w0010-LTLFireability-05 FALSE TECHNIQUES STUTTER_TEST
Treatment of property RwMutex-PT-r2000w0010-LTLFireability-05 finished in 7245 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(X((F(p0)||X(G(p1))))))'
Support contains 3 out of 4015 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 4015/4015 places, 4002/4002 transitions.
Applied a total of 0 rules in 176 ms. Remains 4015 /4015 variables (removed 0) and now considering 4002/4002 (removed 0) transitions.
[2024-06-01 06:11:20] [INFO ] Invariant cache hit.
[2024-06-01 06:11:22] [INFO ] Implicit Places using invariants in 1660 ms returned [1, 3, 4, 5, 6, 7, 8, 1527, 2798, 4011, 4012, 4013, 4014]
Discarding 13 places :
Implicit Place search using SMT only with invariants took 1667 ms to find 13 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 4002/4015 places, 4002/4002 transitions.
Applied a total of 0 rules in 169 ms. Remains 4002 /4002 variables (removed 0) and now considering 4002/4002 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 2015 ms. Remains : 4002/4015 places, 4002/4002 transitions.
Stuttering acceptance computed with spot in 201 ms :[(NOT p0), (AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Running random walk in product with property : RwMutex-PT-r2000w0010-LTLFireability-06
Product exploration timeout after 65220 steps with 13008 reset in 10002 ms.
Stack based approach found an accepted trace after 6676 steps with 743 reset with depth 1108 and stack size 1108 in 1167 ms.
FORMULA RwMutex-PT-r2000w0010-LTLFireability-06 FALSE TECHNIQUES STACK_TEST
Treatment of property RwMutex-PT-r2000w0010-LTLFireability-06 finished in 13416 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((G((F(p0)&&F(!p0))) U G(p1)))'
Support contains 2 out of 4015 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 4015/4015 places, 4002/4002 transitions.
Graph (trivial) has 3968 edges and 4015 vertex of which 3968 / 4015 are part of one of the 1984 SCC in 6 ms
Free SCC test removed 1984 places
Ensure Unique test removed 1984 transitions
Reduce isomorphic transitions removed 1984 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 15 transitions
Trivial Post-agglo rules discarded 15 transitions
Performed 15 trivial Post agglomeration. Transition count delta: 15
Iterating post reduction 0 with 15 rules applied. Total rules applied 16 place count 2031 transition count 2003
Reduce places removed 2027 places and 0 transitions.
Ensure Unique test removed 1997 transitions
Reduce isomorphic transitions removed 1997 transitions.
Iterating post reduction 1 with 4024 rules applied. Total rules applied 4040 place count 4 transition count 6
Drop transitions (Redundant composition of simpler transitions.) removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 4041 place count 4 transition count 5
Applied a total of 4041 rules in 31 ms. Remains 4 /4015 variables (removed 4011) and now considering 5/4002 (removed 3997) transitions.
// Phase 1: matrix 5 rows 4 cols
[2024-06-01 06:11:34] [INFO ] Computed 2 invariants in 0 ms
[2024-06-01 06:11:34] [INFO ] Implicit Places using invariants in 14 ms returned []
[2024-06-01 06:11:34] [INFO ] Invariant cache hit.
[2024-06-01 06:11:34] [INFO ] Implicit Places using invariants and state equation in 18 ms returned []
Implicit Place search using SMT with State Equation took 38 ms to find 0 implicit places.
[2024-06-01 06:11:34] [INFO ] Redundant transitions in 1 ms returned []
Running 2 sub problems to find dead transitions.
[2024-06-01 06:11:34] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/2 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 1 (OVERLAPS) 2/4 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/4 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 3 (OVERLAPS) 4/8 variables, 4/6 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/8 variables, 0/6 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 5 (OVERLAPS) 0/8 variables, 0/6 constraints. Problems are: Problem set: 0 solved, 2 unsolved
No progress, stopping.
After SMT solving in domain Real declared 8/9 variables, and 6 constraints, problems are : Problem set: 0 solved, 2 unsolved in 35 ms.
Refiners :[Positive P Invariants (semi-flows): 2/2 constraints, State Equation: 4/4 constraints, PredecessorRefiner: 2/2 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 2 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/2 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 1 (OVERLAPS) 2/4 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/4 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 3 (OVERLAPS) 4/8 variables, 4/6 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/8 variables, 2/8 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/8 variables, 0/8 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 6 (OVERLAPS) 0/8 variables, 0/8 constraints. Problems are: Problem set: 0 solved, 2 unsolved
No progress, stopping.
After SMT solving in domain Int declared 8/9 variables, and 8 constraints, problems are : Problem set: 0 solved, 2 unsolved in 26 ms.
Refiners :[Positive P Invariants (semi-flows): 2/2 constraints, State Equation: 4/4 constraints, PredecessorRefiner: 2/2 constraints, Known Traps: 0/0 constraints]
After SMT, in 64ms problems are : Problem set: 0 solved, 2 unsolved
Search for dead transitions found 0 dead transitions in 64ms
Starting structural reductions in SI_LTL mode, iteration 1 : 4/4015 places, 5/4002 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 139 ms. Remains : 4/4015 places, 5/4002 transitions.
Stuttering acceptance computed with spot in 148 ms :[(NOT p1), (NOT p0), p0, p1]
Running random walk in product with property : RwMutex-PT-r2000w0010-LTLFireability-07
Stuttering criterion allowed to conclude after 0 steps with 0 reset in 0 ms.
FORMULA RwMutex-PT-r2000w0010-LTLFireability-07 FALSE TECHNIQUES STUTTER_TEST
Treatment of property RwMutex-PT-r2000w0010-LTLFireability-07 finished in 312 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(F(((p1&&G(p2))||p0))))'
Support contains 4 out of 4015 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 4015/4015 places, 4002/4002 transitions.
Applied a total of 0 rules in 178 ms. Remains 4015 /4015 variables (removed 0) and now considering 4002/4002 (removed 0) transitions.
// Phase 1: matrix 4002 rows 4015 cols
[2024-06-01 06:11:34] [INFO ] Computed 2014 invariants in 15 ms
[2024-06-01 06:11:36] [INFO ] Implicit Places using invariants in 1582 ms returned [1, 2, 3, 5, 6, 8, 1527, 2798, 4011, 4012, 4013, 4014]
Discarding 12 places :
Implicit Place search using SMT only with invariants took 1589 ms to find 12 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 4003/4015 places, 4002/4002 transitions.
Applied a total of 0 rules in 169 ms. Remains 4003 /4003 variables (removed 0) and now considering 4002/4002 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 1936 ms. Remains : 4003/4015 places, 4002/4002 transitions.
Stuttering acceptance computed with spot in 95 ms :[(OR (AND (NOT p0) (NOT p1)) (AND (NOT p0) (NOT p2))), (OR (AND (NOT p0) (NOT p1)) (AND (NOT p0) (NOT p2))), (AND (NOT p0) (NOT p2))]
Running random walk in product with property : RwMutex-PT-r2000w0010-LTLFireability-08
Product exploration timeout after 48120 steps with 18 reset in 10002 ms.
Stack based approach found an accepted trace after 5206 steps with 3 reset with depth 2470 and stack size 2470 in 1023 ms.
FORMULA RwMutex-PT-r2000w0010-LTLFireability-08 FALSE TECHNIQUES STACK_TEST
Treatment of property RwMutex-PT-r2000w0010-LTLFireability-08 finished in 13080 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X((p0&&(p1 U X(G(!p2))))))'
Support contains 4 out of 4015 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 4015/4015 places, 4002/4002 transitions.
Applied a total of 0 rules in 179 ms. Remains 4015 /4015 variables (removed 0) and now considering 4002/4002 (removed 0) transitions.
[2024-06-01 06:11:47] [INFO ] Invariant cache hit.
[2024-06-01 06:11:49] [INFO ] Implicit Places using invariants in 1648 ms returned [1, 2, 3, 4, 5, 7, 8, 1527, 2798, 4011, 4012, 4013, 4014]
Discarding 13 places :
Implicit Place search using SMT only with invariants took 1656 ms to find 13 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 4002/4015 places, 4002/4002 transitions.
Applied a total of 0 rules in 179 ms. Remains 4002 /4002 variables (removed 0) and now considering 4002/4002 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 2014 ms. Remains : 4002/4015 places, 4002/4002 transitions.
Stuttering acceptance computed with spot in 183 ms :[(OR (NOT p0) p2), (OR (NOT p0) p2), true, p2, p2]
Running random walk in product with property : RwMutex-PT-r2000w0010-LTLFireability-09
Entered a terminal (fully accepting) state of product in 1 steps with 0 reset in 2 ms.
FORMULA RwMutex-PT-r2000w0010-LTLFireability-09 FALSE TECHNIQUES STUTTER_TEST
Treatment of property RwMutex-PT-r2000w0010-LTLFireability-09 finished in 2227 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G((F(p0)||X((X(G(p1)) U G(p2))))))'
Support contains 4 out of 4015 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 4015/4015 places, 4002/4002 transitions.
Applied a total of 0 rules in 169 ms. Remains 4015 /4015 variables (removed 0) and now considering 4002/4002 (removed 0) transitions.
[2024-06-01 06:11:49] [INFO ] Invariant cache hit.
[2024-06-01 06:11:51] [INFO ] Implicit Places using invariants in 1648 ms returned [1, 2, 3, 4, 5, 6, 7, 8, 1527, 4011, 4012, 4013, 4014]
Discarding 13 places :
Implicit Place search using SMT only with invariants took 1653 ms to find 13 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 4002/4015 places, 4002/4002 transitions.
Applied a total of 0 rules in 172 ms. Remains 4002 /4002 variables (removed 0) and now considering 4002/4002 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 1994 ms. Remains : 4002/4015 places, 4002/4002 transitions.
Stuttering acceptance computed with spot in 240 ms :[(AND (NOT p0) (NOT p2)), (AND (NOT p0) (NOT p2)), (AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p2) (NOT p1)), (NOT p0), (AND (NOT p0) (NOT p2) p1)]
Running random walk in product with property : RwMutex-PT-r2000w0010-LTLFireability-10
Product exploration timeout after 48170 steps with 19 reset in 10001 ms.
Stack based approach found an accepted trace after 16990 steps with 1 reset with depth 13319 and stack size 1555 in 3959 ms.
FORMULA RwMutex-PT-r2000w0010-LTLFireability-10 FALSE TECHNIQUES STACK_TEST
Treatment of property RwMutex-PT-r2000w0010-LTLFireability-10 finished in 16223 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(X(F(p0))))'
Support contains 1 out of 4015 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 4015/4015 places, 4002/4002 transitions.
Applied a total of 0 rules in 167 ms. Remains 4015 /4015 variables (removed 0) and now considering 4002/4002 (removed 0) transitions.
[2024-06-01 06:12:06] [INFO ] Invariant cache hit.
[2024-06-01 06:12:07] [INFO ] Implicit Places using invariants in 1722 ms returned [1, 2, 3, 4, 5, 6, 7, 8, 1527, 2798, 4011, 4012, 4013, 4014]
Discarding 14 places :
Implicit Place search using SMT only with invariants took 1727 ms to find 14 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 4001/4015 places, 4002/4002 transitions.
Applied a total of 0 rules in 160 ms. Remains 4001 /4001 variables (removed 0) and now considering 4002/4002 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 2054 ms. Remains : 4001/4015 places, 4002/4002 transitions.
Stuttering acceptance computed with spot in 93 ms :[(NOT p0), (NOT p0), (NOT p0)]
Running random walk in product with property : RwMutex-PT-r2000w0010-LTLFireability-11
Product exploration timeout after 66850 steps with 14306 reset in 10002 ms.
Stack based approach found an accepted trace after 5544 steps with 1482 reset with depth 579 and stack size 579 in 757 ms.
FORMULA RwMutex-PT-r2000w0010-LTLFireability-11 FALSE TECHNIQUES STACK_TEST
Treatment of property RwMutex-PT-r2000w0010-LTLFireability-11 finished in 12937 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(G(p0)))'
Support contains 3 out of 4015 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 4015/4015 places, 4002/4002 transitions.
Applied a total of 0 rules in 174 ms. Remains 4015 /4015 variables (removed 0) and now considering 4002/4002 (removed 0) transitions.
[2024-06-01 06:12:19] [INFO ] Invariant cache hit.
[2024-06-01 06:12:20] [INFO ] Implicit Places using invariants in 1634 ms returned [1, 2, 4, 5, 6, 7, 8, 1527, 2798, 4011, 4012, 4013, 4014]
Discarding 13 places :
Implicit Place search using SMT only with invariants took 1639 ms to find 13 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 4002/4015 places, 4002/4002 transitions.
Applied a total of 0 rules in 169 ms. Remains 4002 /4002 variables (removed 0) and now considering 4002/4002 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 1983 ms. Remains : 4002/4015 places, 4002/4002 transitions.
Stuttering acceptance computed with spot in 79 ms :[true, (NOT p0), (NOT p0)]
Running random walk in product with property : RwMutex-PT-r2000w0010-LTLFireability-12
Entered a terminal (fully accepting) state of product in 1 steps with 0 reset in 1 ms.
FORMULA RwMutex-PT-r2000w0010-LTLFireability-12 FALSE TECHNIQUES STUTTER_TEST
Treatment of property RwMutex-PT-r2000w0010-LTLFireability-12 finished in 2098 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((F(G(p0))&&(p1 U p2)))'
Support contains 5 out of 4015 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 4015/4015 places, 4002/4002 transitions.
Graph (trivial) has 3970 edges and 4015 vertex of which 3970 / 4015 are part of one of the 1985 SCC in 3 ms
Free SCC test removed 1985 places
Ensure Unique test removed 1985 transitions
Reduce isomorphic transitions removed 1985 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 12 transitions
Trivial Post-agglo rules discarded 12 transitions
Performed 12 trivial Post agglomeration. Transition count delta: 12
Iterating post reduction 0 with 12 rules applied. Total rules applied 13 place count 2030 transition count 2005
Reduce places removed 24 places and 0 transitions.
Iterating post reduction 1 with 24 rules applied. Total rules applied 37 place count 2006 transition count 2005
Applied a total of 37 rules in 299 ms. Remains 2006 /4015 variables (removed 2009) and now considering 2005/4002 (removed 1997) transitions.
[2024-06-01 06:12:21] [INFO ] Flow matrix only has 9 transitions (discarded 1996 similar events)
// Phase 1: matrix 9 rows 2006 cols
[2024-06-01 06:12:21] [INFO ] Computed 2002 invariants in 20 ms
[2024-06-01 06:12:22] [INFO ] Implicit Places using invariants in 1588 ms returned []
[2024-06-01 06:12:22] [INFO ] Flow matrix only has 9 transitions (discarded 1996 similar events)
[2024-06-01 06:12:22] [INFO ] Invariant cache hit.
[2024-06-01 06:12:24] [INFO ] Implicit Places using invariants and state equation in 2022 ms returned []
Implicit Place search using SMT with State Equation took 3613 ms to find 0 implicit places.
[2024-06-01 06:12:25] [INFO ] Redundant transitions in 132 ms returned []
Running 4 sub problems to find dead transitions.
[2024-06-01 06:12:25] [INFO ] Flow matrix only has 9 transitions (discarded 1996 similar events)
[2024-06-01 06:12:25] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/4 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 1 (OVERLAPS) 2002/2006 variables, 2002/2002 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/2006 variables, 0/2002 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 3 (OVERLAPS) 8/2014 variables, 2006/4008 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/2014 variables, 0/4008 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 5 (OVERLAPS) 0/2014 variables, 0/4008 constraints. Problems are: Problem set: 0 solved, 4 unsolved
No progress, stopping.
After SMT solving in domain Real declared 2014/2015 variables, and 4008 constraints, problems are : Problem set: 0 solved, 4 unsolved in 1197 ms.
Refiners :[Positive P Invariants (semi-flows): 2002/2002 constraints, State Equation: 2006/2006 constraints, PredecessorRefiner: 4/4 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 4 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/4 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 1 (OVERLAPS) 2002/2006 variables, 2002/2002 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/2006 variables, 0/2002 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 3 (OVERLAPS) 8/2014 variables, 2006/4008 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/2014 variables, 4/4012 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/2014 variables, 0/4012 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 6 (OVERLAPS) 0/2014 variables, 0/4012 constraints. Problems are: Problem set: 0 solved, 4 unsolved
No progress, stopping.
After SMT solving in domain Int declared 2014/2015 variables, and 4012 constraints, problems are : Problem set: 0 solved, 4 unsolved in 1034 ms.
Refiners :[Positive P Invariants (semi-flows): 2002/2002 constraints, State Equation: 2006/2006 constraints, PredecessorRefiner: 4/4 constraints, Known Traps: 0/0 constraints]
After SMT, in 2249ms problems are : Problem set: 0 solved, 4 unsolved
Search for dead transitions found 0 dead transitions in 2249ms
Starting structural reductions in SI_LTL mode, iteration 1 : 2006/4015 places, 2005/4002 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 6304 ms. Remains : 2006/4015 places, 2005/4002 transitions.
Stuttering acceptance computed with spot in 107 ms :[(OR (NOT p2) (NOT p0)), true, (NOT p0), (NOT p2)]
Running random walk in product with property : RwMutex-PT-r2000w0010-LTLFireability-14
Stuttering criterion allowed to conclude after 1 steps with 0 reset in 1 ms.
FORMULA RwMutex-PT-r2000w0010-LTLFireability-14 FALSE TECHNIQUES STUTTER_TEST
Treatment of property RwMutex-PT-r2000w0010-LTLFireability-14 finished in 6431 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((F(p0)||X(p1)))'
Support contains 3 out of 4015 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 4015/4015 places, 4002/4002 transitions.
Applied a total of 0 rules in 176 ms. Remains 4015 /4015 variables (removed 0) and now considering 4002/4002 (removed 0) transitions.
// Phase 1: matrix 4002 rows 4015 cols
[2024-06-01 06:12:27] [INFO ] Computed 2014 invariants in 13 ms
[2024-06-01 06:12:29] [INFO ] Implicit Places using invariants in 1684 ms returned [1, 2, 3, 4, 5, 6, 7, 8, 1527, 2798, 4011, 4012, 4013]
Discarding 13 places :
Implicit Place search using SMT only with invariants took 1695 ms to find 13 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 4002/4015 places, 4002/4002 transitions.
Applied a total of 0 rules in 174 ms. Remains 4002 /4002 variables (removed 0) and now considering 4002/4002 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 2045 ms. Remains : 4002/4015 places, 4002/4002 transitions.
Stuttering acceptance computed with spot in 90 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1)), (NOT p0)]
Running random walk in product with property : RwMutex-PT-r2000w0010-LTLFireability-15
Product exploration timeout after 67630 steps with 18587 reset in 10173 ms.
Stack based approach found an accepted trace after 12845 steps with 3514 reset with depth 1781 and stack size 1781 in 1934 ms.
FORMULA RwMutex-PT-r2000w0010-LTLFireability-15 FALSE TECHNIQUES STACK_TEST
Treatment of property RwMutex-PT-r2000w0010-LTLFireability-15 finished in 14261 ms.
All properties solved by simple procedures.
Total runtime 309427 ms.
ITS solved all properties within timeout

BK_STOP 1717222361735

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination LTLFireability -timeout 360 -rebuildPNML

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RwMutex-PT-r2000w0010"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is RwMutex-PT-r2000w0010, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r524-tall-171679080100348"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RwMutex-PT-r2000w0010.tgz
mv RwMutex-PT-r2000w0010 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;