Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r524-tall-171679080000298.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is RwMutex-PT-r0010w1000, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r524-tall-171679080000298
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.2M
-rw-r--r-- 1 mcc users 6.2K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 62K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Apr 23 07:49 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 23 07:49 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Apr 23 07:49 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 23 07:49 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.6K Apr 13 08:44 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 85K Apr 13 08:44 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.4K Apr 13 08:11 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 61K Apr 13 08:11 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 23 07:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 23 07:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 11 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 1.8M May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RwMutex-PT-r0010w1000-CTLFireability-2024-00
FORMULA_NAME RwMutex-PT-r0010w1000-CTLFireability-2024-01
FORMULA_NAME RwMutex-PT-r0010w1000-CTLFireability-2024-02
FORMULA_NAME RwMutex-PT-r0010w1000-CTLFireability-2024-03
FORMULA_NAME RwMutex-PT-r0010w1000-CTLFireability-2024-04
FORMULA_NAME RwMutex-PT-r0010w1000-CTLFireability-2024-05
FORMULA_NAME RwMutex-PT-r0010w1000-CTLFireability-2024-06
FORMULA_NAME RwMutex-PT-r0010w1000-CTLFireability-2024-07
FORMULA_NAME RwMutex-PT-r0010w1000-CTLFireability-2024-08
FORMULA_NAME RwMutex-PT-r0010w1000-CTLFireability-2024-09
FORMULA_NAME RwMutex-PT-r0010w1000-CTLFireability-2024-10
FORMULA_NAME RwMutex-PT-r0010w1000-CTLFireability-2024-11
FORMULA_NAME RwMutex-PT-r0010w1000-CTLFireability-2023-12
FORMULA_NAME RwMutex-PT-r0010w1000-CTLFireability-2023-13
FORMULA_NAME RwMutex-PT-r0010w1000-CTLFireability-2023-14
FORMULA_NAME RwMutex-PT-r0010w1000-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717221810241

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RwMutex-PT-r0010w1000
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 06:03:31] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 06:03:31] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 06:03:31] [INFO ] Load time of PNML (sax parser for PT used): 246 ms
[2024-06-01 06:03:31] [INFO ] Transformed 2030 places.
[2024-06-01 06:03:31] [INFO ] Transformed 2020 transitions.
[2024-06-01 06:03:31] [INFO ] Found NUPN structural information;
[2024-06-01 06:03:31] [INFO ] Parsed PT model containing 2030 places and 2020 transitions and 24060 arcs in 382 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 13 ms.
Initial state reduction rules removed 3 formulas.
FORMULA RwMutex-PT-r0010w1000-CTLFireability-2023-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RwMutex-PT-r0010w1000-CTLFireability-2023-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RwMutex-PT-r0010w1000-CTLFireability-2023-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 96 out of 2030 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 2030/2030 places, 2020/2020 transitions.
Applied a total of 0 rules in 283 ms. Remains 2030 /2030 variables (removed 0) and now considering 2020/2020 (removed 0) transitions.
// Phase 1: matrix 2020 rows 2030 cols
[2024-06-01 06:03:32] [INFO ] Computed 1020 invariants in 349 ms
[2024-06-01 06:03:34] [INFO ] Implicit Places using invariants in 2618 ms returned [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 24, 35, 46, 57, 68, 79, 90, 112, 113, 124, 135, 146, 157, 168, 179, 190, 201, 212, 223, 224, 235, 246, 257, 268, 279, 290, 301, 312, 323, 334, 335, 346, 357, 368, 379, 390, 401, 412, 423, 434, 445, 446, 457, 468, 479, 490, 501, 512, 523, 534, 545, 556, 557, 568, 579, 601, 612, 623, 634, 645, 656, 667, 668, 690, 701, 712, 723, 734, 745, 756, 767, 779, 790, 801, 812, 823, 834, 845, 856, 867, 878, 889, 890, 901, 912, 923, 934, 945, 956, 967, 978, 989, 1001, 1012, 1023, 1034, 1045, 1056, 1067, 1078, 1089, 1100, 1111, 1112, 1113, 1124, 1135, 1148, 1149, 1150, 1151, 1152, 1153, 1154, 1155, 1156, 1157, 1158, 1159, 1160, 1161, 1162, 1163, 1164, 1165, 1166, 1167, 1168, 1169, 1170, 1171, 1172, 1173, 1174, 1175, 1176, 1177, 1178, 1179, 1180, 1181, 1182, 1183, 1184, 1185, 1186, 1187, 1188, 1189, 1190, 1191, 1193, 1194, 1195, 1196, 1197, 1198, 1199, 1200, 1201, 1203, 1204, 1205, 1206, 1207, 1208, 1209, 1210, 1211, 1212, 1213, 1214, 1215, 1216, 1217, 1218, 1219, 1220, 1221, 1222, 1223, 1224, 1225, 1226, 1227, 1228, 1229, 1230, 1231, 1232, 1233, 1234, 1235, 1236, 1237, 1238, 1239, 1240, 1241, 1242, 1243, 1244, 1245, 1246, 1247, 1248, 1249, 1250, 1251, 1252, 1254, 1255, 1256, 1257, 1258, 1259, 1260, 1261, 1262, 1263, 1264, 1265, 1266, 1267, 1268, 1269, 1270, 1271, 1272, 1273, 1274, 1275, 1276, 1277, 1278, 1279, 1280, 1281, 1282, 1283, 1284, 1285, 1286, 1287, 1288, 1289, 1290, 1291, 1292, 1293, 1294, 1295, 1296, 1297, 1298, 1299, 1300, 1301, 1302, 1304, 1305, 1306, 1307, 1308, 1309, 1310, 1311, 1312, 1313, 1314, 1315, 1316, 1317, 1318, 1319, 1320, 1321, 1322, 1323, 1324, 1325, 1326, 1327, 1328, 1329, 1330, 1331, 1332, 1333, 1334, 1335, 1336, 1337, 1338, 1339, 1340, 1341, 1342, 1343, 1344, 1345, 1346, 1347, 1348, 1349, 1350, 1351, 1352, 1353, 1354, 1355, 1356, 1358, 1359, 1360, 1361, 1362, 1363, 1365, 1366, 1367, 1368, 1369, 1370, 1371, 1372, 1373, 1374, 1375, 1376, 1377, 1378, 1379, 1380, 1381, 1383, 1384, 1385, 1386, 1387, 1388, 1389, 1390, 1391, 1392, 1393, 1394, 1395, 1396, 1397, 1398, 1399, 1400, 1401, 1402, 1403, 1404, 1405, 1406, 1407, 1408, 1409, 1410, 1411, 1412, 1413, 1414, 1415, 1416, 1418, 1419, 1420, 1421, 1422, 1423, 1424, 1425, 1426, 1427, 1428, 1429, 1430, 1431, 1432, 1433, 1434, 1435, 1436, 1437, 1438, 1439, 1440, 1441, 1442, 1443, 1444, 1445, 1446, 1447, 1448, 1449, 1450, 1451, 1452, 1453, 1454, 1455, 1456, 1457, 1458, 1459, 1460, 1461, 1462, 1463, 1464, 1465, 1466, 1467, 1468, 1469, 1470, 1471, 1472, 1473, 1474, 1475, 1476, 1477, 1478, 1479, 1480, 1481, 1482, 1483, 1485, 1486, 1487, 1488, 1489, 1490, 1491, 1492, 1493, 1494, 1495, 1496, 1497, 1498, 1499, 1500, 1501, 1502, 1503, 1504, 1505, 1506, 1507, 1508, 1510, 1511, 1512, 1513, 1514, 1515, 1516, 1517, 1518, 1519, 1520, 1521, 1522, 1523, 1524, 1525, 1526, 1527, 1528, 1529, 1530, 1531, 1532, 1533, 1534, 1535, 1536, 1537, 1539, 1541, 1542, 1543, 1545, 1546, 1547, 1548, 1549, 1550, 1551, 1552, 1553, 1555, 1556, 1557, 1558, 1559, 1560, 1561, 1562, 1563, 1564, 1565, 1566, 1567, 1568, 1569, 1570, 1571, 1572, 1573, 1574, 1575, 1576, 1577, 1578, 1579, 1580, 1581, 1582, 1583, 1584, 1585, 1586, 1588, 1589, 1590, 1591, 1592, 1593, 1594, 1595, 1596, 1597, 1598, 1599, 1600, 1601, 1602, 1603, 1604, 1605, 1606, 1607, 1608, 1609, 1610, 1611, 1612, 1614, 1615, 1616, 1617, 1618, 1619, 1620, 1621, 1622, 1623, 1624, 1625, 1626, 1627, 1628, 1629, 1630, 1631, 1633, 1634, 1635, 1636, 1637, 1638, 1639, 1640, 1641, 1642, 1643, 1644, 1645, 1646, 1647, 1648, 1649, 1650, 1651, 1652, 1653, 1654, 1655, 1656, 1657, 1658, 1659, 1660, 1661, 1662, 1663, 1664, 1665, 1666, 1667, 1668, 1669, 1670, 1671, 1672, 1673, 1674, 1675, 1676, 1677, 1678, 1679, 1680, 1681, 1682, 1683, 1684, 1685, 1686, 1687, 1688, 1689, 1690, 1691, 1692, 1693, 1695, 1696, 1697, 1698, 1699, 1700, 1701, 1702, 1703, 1704, 1705, 1706, 1707, 1708, 1709, 1711, 1712, 1713, 1714, 1715, 1717, 1718, 1719, 1720, 1721, 1722, 1723, 1724, 1725, 1726, 1727, 1728, 1729, 1730, 1731, 1732, 1733, 1734, 1735, 1736, 1737, 1738, 1739, 1740, 1741, 1742, 1743, 1744, 1745, 1746, 1748, 1749, 1750, 1751, 1753, 1754, 1755, 1756, 1757, 1758, 1759, 1760, 1761, 1762, 1763, 1764, 1765, 1766, 1767, 1768, 1769, 1770, 1771, 1772, 1773, 1774, 1775, 1776, 1777, 1778, 1779, 1780, 1781, 1782, 1783, 1784, 1785, 1786, 1787, 1788, 1789, 1790, 1791, 1792, 1793, 1794, 1795, 1796, 1797, 1798, 1799, 1800, 1801, 1802, 1803, 1804, 1805, 1806, 1807, 1808, 1809, 1810, 1811, 1812, 1813, 1814, 1815, 1816, 1818, 1819, 1820, 1821, 1822, 1823, 1824, 1825, 1826, 1827, 1828, 1829, 1830, 1831, 1832, 1833, 1834, 1836, 1837, 1838, 1839, 1840, 1841, 1843, 1844, 1845, 1846, 1847, 1848, 1849, 1850, 1851, 1852, 1853, 1854, 1855, 1856, 1857, 1858, 1859, 1860, 1862, 1863, 1864, 1865, 1866, 1867, 1868, 1869, 1870, 1872, 1873, 1874, 1875, 1876, 1877, 1878, 1879, 1880, 1881, 1882, 1883, 1884, 1885, 1886, 1887, 1888, 1889, 1890, 1891, 1892, 1894, 1895, 1896, 1897, 1898, 1900, 1901, 1902, 1904, 1905, 1906, 1907, 1908, 1909, 1910, 1911, 1912, 1913, 1914, 1915, 1917, 1918, 1919, 1920, 1921, 1922, 1923, 1924, 1925, 1926, 1927, 1928, 1929, 1930, 1931, 1932, 1933, 1934, 1935, 1936, 1937, 1939, 1940, 1941, 1942, 1943, 1944, 1945, 1946, 1947, 1948, 1949, 1950, 1951, 1952, 1953, 1954, 1955, 1956, 1957, 1958, 1959, 1960, 1961, 1962, 1963, 1964, 1965, 1966, 1967, 1968, 1969, 1970, 1971, 1972, 1973, 1974, 1975, 1976, 1977, 1978, 1979, 1980, 1981, 1982, 1983, 1984, 1985, 1986, 1987, 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010, 2011, 2013, 2014, 2015, 2016, 2017, 2018, 2019, 2020, 2021, 2023, 2024, 2025, 2026, 2027, 2028, 2029]
Discarding 969 places :
Implicit Place search using SMT only with invariants took 2751 ms to find 969 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 1061/2030 places, 2020/2020 transitions.
Discarding 917 places :
Symmetric choice reduction at 0 with 917 rule applications. Total rules 917 place count 144 transition count 1103
Iterating global reduction 0 with 917 rules applied. Total rules applied 1834 place count 144 transition count 1103
Ensure Unique test removed 917 transitions
Reduce isomorphic transitions removed 917 transitions.
Iterating post reduction 0 with 917 rules applied. Total rules applied 2751 place count 144 transition count 186
Applied a total of 2751 rules in 80 ms. Remains 144 /1061 variables (removed 917) and now considering 186/2020 (removed 1834) transitions.
// Phase 1: matrix 186 rows 144 cols
[2024-06-01 06:03:35] [INFO ] Computed 51 invariants in 5 ms
[2024-06-01 06:03:35] [INFO ] Implicit Places using invariants in 63 ms returned []
[2024-06-01 06:03:35] [INFO ] Invariant cache hit.
[2024-06-01 06:03:35] [INFO ] Implicit Places using invariants and state equation in 107 ms returned []
Implicit Place search using SMT with State Equation took 172 ms to find 0 implicit places.
Starting structural reductions in LTL mode, iteration 2 : 144/2030 places, 186/2020 transitions.
Finished structural reductions in LTL mode , in 2 iterations and 3306 ms. Remains : 144/2030 places, 186/2020 transitions.
Support contains 96 out of 144 places after structural reductions.
[2024-06-01 06:03:35] [INFO ] Flatten gal took : 97 ms
[2024-06-01 06:03:35] [INFO ] Flatten gal took : 37 ms
[2024-06-01 06:03:35] [INFO ] Input system was already deterministic with 186 transitions.
Support contains 95 out of 144 places (down from 96) after GAL structural reductions.
RANDOM walk for 40000 steps (8 resets) in 2706 ms. (14 steps per ms) remains 7/68 properties
BEST_FIRST walk for 40004 steps (8 resets) in 163 ms. (243 steps per ms) remains 7/7 properties
BEST_FIRST walk for 40003 steps (8 resets) in 237 ms. (168 steps per ms) remains 7/7 properties
BEST_FIRST walk for 40004 steps (8 resets) in 95 ms. (416 steps per ms) remains 7/7 properties
BEST_FIRST walk for 40004 steps (8 resets) in 126 ms. (314 steps per ms) remains 7/7 properties
BEST_FIRST walk for 40004 steps (8 resets) in 83 ms. (476 steps per ms) remains 7/7 properties
BEST_FIRST walk for 40004 steps (8 resets) in 112 ms. (354 steps per ms) remains 7/7 properties
BEST_FIRST walk for 40004 steps (8 resets) in 100 ms. (396 steps per ms) remains 7/7 properties
[2024-06-01 06:03:37] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/26 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 7 unsolved
Problem AtomicPropp7 is UNSAT
Problem AtomicPropp10 is UNSAT
Problem AtomicPropp22 is UNSAT
Problem AtomicPropp30 is UNSAT
Problem AtomicPropp44 is UNSAT
Problem AtomicPropp61 is UNSAT
Problem AtomicPropp63 is UNSAT
After SMT solving in domain Real declared 112/330 variables, and 19 constraints, problems are : Problem set: 7 solved, 0 unsolved in 333 ms.
Refiners :[Positive P Invariants (semi-flows): 19/51 constraints, State Equation: 0/144 constraints, PredecessorRefiner: 7/7 constraints, Known Traps: 0/0 constraints]
After SMT, in 455ms problems are : Problem set: 7 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 7 atomic propositions for a total of 13 simplifications.
FORMULA RwMutex-PT-r0010w1000-CTLFireability-2024-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RwMutex-PT-r0010w1000-CTLFireability-2023-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 06:03:37] [INFO ] Flatten gal took : 25 ms
[2024-06-01 06:03:37] [INFO ] Flatten gal took : 26 ms
[2024-06-01 06:03:37] [INFO ] Input system was already deterministic with 186 transitions.
Support contains 72 out of 144 places (down from 73) after GAL structural reductions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 144/144 places, 186/186 transitions.
Discarding 40 places :
Symmetric choice reduction at 0 with 40 rule applications. Total rules 40 place count 104 transition count 146
Iterating global reduction 0 with 40 rules applied. Total rules applied 80 place count 104 transition count 146
Ensure Unique test removed 40 transitions
Reduce isomorphic transitions removed 40 transitions.
Iterating post reduction 0 with 40 rules applied. Total rules applied 120 place count 104 transition count 106
Applied a total of 120 rules in 4 ms. Remains 104 /144 variables (removed 40) and now considering 106/186 (removed 80) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 104/144 places, 106/186 transitions.
[2024-06-01 06:03:37] [INFO ] Flatten gal took : 14 ms
[2024-06-01 06:03:37] [INFO ] Flatten gal took : 15 ms
[2024-06-01 06:03:37] [INFO ] Input system was already deterministic with 106 transitions.
Starting structural reductions in LTL mode, iteration 0 : 144/144 places, 186/186 transitions.
Discarding 43 places :
Symmetric choice reduction at 0 with 43 rule applications. Total rules 43 place count 101 transition count 143
Iterating global reduction 0 with 43 rules applied. Total rules applied 86 place count 101 transition count 143
Ensure Unique test removed 43 transitions
Reduce isomorphic transitions removed 43 transitions.
Iterating post reduction 0 with 43 rules applied. Total rules applied 129 place count 101 transition count 100
Applied a total of 129 rules in 4 ms. Remains 101 /144 variables (removed 43) and now considering 100/186 (removed 86) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 101/144 places, 100/186 transitions.
[2024-06-01 06:03:37] [INFO ] Flatten gal took : 10 ms
[2024-06-01 06:03:37] [INFO ] Flatten gal took : 9 ms
[2024-06-01 06:03:37] [INFO ] Input system was already deterministic with 100 transitions.
Starting structural reductions in LTL mode, iteration 0 : 144/144 places, 186/186 transitions.
Discarding 43 places :
Symmetric choice reduction at 0 with 43 rule applications. Total rules 43 place count 101 transition count 143
Iterating global reduction 0 with 43 rules applied. Total rules applied 86 place count 101 transition count 143
Ensure Unique test removed 43 transitions
Reduce isomorphic transitions removed 43 transitions.
Iterating post reduction 0 with 43 rules applied. Total rules applied 129 place count 101 transition count 100
Applied a total of 129 rules in 3 ms. Remains 101 /144 variables (removed 43) and now considering 100/186 (removed 86) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 101/144 places, 100/186 transitions.
[2024-06-01 06:03:37] [INFO ] Flatten gal took : 9 ms
[2024-06-01 06:03:37] [INFO ] Flatten gal took : 9 ms
[2024-06-01 06:03:37] [INFO ] Input system was already deterministic with 100 transitions.
Starting structural reductions in LTL mode, iteration 0 : 144/144 places, 186/186 transitions.
Discarding 34 places :
Symmetric choice reduction at 0 with 34 rule applications. Total rules 34 place count 110 transition count 152
Iterating global reduction 0 with 34 rules applied. Total rules applied 68 place count 110 transition count 152
Ensure Unique test removed 34 transitions
Reduce isomorphic transitions removed 34 transitions.
Iterating post reduction 0 with 34 rules applied. Total rules applied 102 place count 110 transition count 118
Applied a total of 102 rules in 4 ms. Remains 110 /144 variables (removed 34) and now considering 118/186 (removed 68) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 110/144 places, 118/186 transitions.
[2024-06-01 06:03:37] [INFO ] Flatten gal took : 10 ms
[2024-06-01 06:03:37] [INFO ] Flatten gal took : 11 ms
[2024-06-01 06:03:37] [INFO ] Input system was already deterministic with 118 transitions.
Starting structural reductions in LTL mode, iteration 0 : 144/144 places, 186/186 transitions.
Discarding 42 places :
Symmetric choice reduction at 0 with 42 rule applications. Total rules 42 place count 102 transition count 144
Iterating global reduction 0 with 42 rules applied. Total rules applied 84 place count 102 transition count 144
Ensure Unique test removed 42 transitions
Reduce isomorphic transitions removed 42 transitions.
Iterating post reduction 0 with 42 rules applied. Total rules applied 126 place count 102 transition count 102
Applied a total of 126 rules in 4 ms. Remains 102 /144 variables (removed 42) and now considering 102/186 (removed 84) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 102/144 places, 102/186 transitions.
[2024-06-01 06:03:37] [INFO ] Flatten gal took : 9 ms
[2024-06-01 06:03:37] [INFO ] Flatten gal took : 9 ms
[2024-06-01 06:03:37] [INFO ] Input system was already deterministic with 102 transitions.
Starting structural reductions in LTL mode, iteration 0 : 144/144 places, 186/186 transitions.
Discarding 41 places :
Symmetric choice reduction at 0 with 41 rule applications. Total rules 41 place count 103 transition count 145
Iterating global reduction 0 with 41 rules applied. Total rules applied 82 place count 103 transition count 145
Ensure Unique test removed 41 transitions
Reduce isomorphic transitions removed 41 transitions.
Iterating post reduction 0 with 41 rules applied. Total rules applied 123 place count 103 transition count 104
Applied a total of 123 rules in 3 ms. Remains 103 /144 variables (removed 41) and now considering 104/186 (removed 82) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 103/144 places, 104/186 transitions.
[2024-06-01 06:03:37] [INFO ] Flatten gal took : 8 ms
[2024-06-01 06:03:37] [INFO ] Flatten gal took : 12 ms
[2024-06-01 06:03:37] [INFO ] Input system was already deterministic with 104 transitions.
Starting structural reductions in LTL mode, iteration 0 : 144/144 places, 186/186 transitions.
Discarding 40 places :
Symmetric choice reduction at 0 with 40 rule applications. Total rules 40 place count 104 transition count 146
Iterating global reduction 0 with 40 rules applied. Total rules applied 80 place count 104 transition count 146
Ensure Unique test removed 40 transitions
Reduce isomorphic transitions removed 40 transitions.
Iterating post reduction 0 with 40 rules applied. Total rules applied 120 place count 104 transition count 106
Applied a total of 120 rules in 4 ms. Remains 104 /144 variables (removed 40) and now considering 106/186 (removed 80) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 104/144 places, 106/186 transitions.
[2024-06-01 06:03:37] [INFO ] Flatten gal took : 9 ms
[2024-06-01 06:03:37] [INFO ] Flatten gal took : 8 ms
[2024-06-01 06:03:37] [INFO ] Input system was already deterministic with 106 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 144/144 places, 186/186 transitions.
Discarding 42 places :
Symmetric choice reduction at 0 with 42 rule applications. Total rules 42 place count 102 transition count 144
Iterating global reduction 0 with 42 rules applied. Total rules applied 84 place count 102 transition count 144
Ensure Unique test removed 42 transitions
Reduce isomorphic transitions removed 42 transitions.
Iterating post reduction 0 with 42 rules applied. Total rules applied 126 place count 102 transition count 102
Applied a total of 126 rules in 16 ms. Remains 102 /144 variables (removed 42) and now considering 102/186 (removed 84) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 17 ms. Remains : 102/144 places, 102/186 transitions.
[2024-06-01 06:03:37] [INFO ] Flatten gal took : 8 ms
[2024-06-01 06:03:37] [INFO ] Flatten gal took : 8 ms
[2024-06-01 06:03:37] [INFO ] Input system was already deterministic with 102 transitions.
Starting structural reductions in LTL mode, iteration 0 : 144/144 places, 186/186 transitions.
Discarding 42 places :
Symmetric choice reduction at 0 with 42 rule applications. Total rules 42 place count 102 transition count 144
Iterating global reduction 0 with 42 rules applied. Total rules applied 84 place count 102 transition count 144
Ensure Unique test removed 42 transitions
Reduce isomorphic transitions removed 42 transitions.
Iterating post reduction 0 with 42 rules applied. Total rules applied 126 place count 102 transition count 102
Applied a total of 126 rules in 4 ms. Remains 102 /144 variables (removed 42) and now considering 102/186 (removed 84) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 102/144 places, 102/186 transitions.
[2024-06-01 06:03:38] [INFO ] Flatten gal took : 21 ms
[2024-06-01 06:03:38] [INFO ] Flatten gal took : 8 ms
[2024-06-01 06:03:38] [INFO ] Input system was already deterministic with 102 transitions.
Starting structural reductions in LTL mode, iteration 0 : 144/144 places, 186/186 transitions.
Discarding 39 places :
Symmetric choice reduction at 0 with 39 rule applications. Total rules 39 place count 105 transition count 147
Iterating global reduction 0 with 39 rules applied. Total rules applied 78 place count 105 transition count 147
Ensure Unique test removed 39 transitions
Reduce isomorphic transitions removed 39 transitions.
Iterating post reduction 0 with 39 rules applied. Total rules applied 117 place count 105 transition count 108
Applied a total of 117 rules in 4 ms. Remains 105 /144 variables (removed 39) and now considering 108/186 (removed 78) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 105/144 places, 108/186 transitions.
[2024-06-01 06:03:38] [INFO ] Flatten gal took : 23 ms
[2024-06-01 06:03:38] [INFO ] Flatten gal took : 10 ms
[2024-06-01 06:03:38] [INFO ] Input system was already deterministic with 108 transitions.
Starting structural reductions in LTL mode, iteration 0 : 144/144 places, 186/186 transitions.
Discarding 37 places :
Symmetric choice reduction at 0 with 37 rule applications. Total rules 37 place count 107 transition count 149
Iterating global reduction 0 with 37 rules applied. Total rules applied 74 place count 107 transition count 149
Ensure Unique test removed 37 transitions
Reduce isomorphic transitions removed 37 transitions.
Iterating post reduction 0 with 37 rules applied. Total rules applied 111 place count 107 transition count 112
Applied a total of 111 rules in 7 ms. Remains 107 /144 variables (removed 37) and now considering 112/186 (removed 74) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 107/144 places, 112/186 transitions.
[2024-06-01 06:03:38] [INFO ] Flatten gal took : 8 ms
[2024-06-01 06:03:38] [INFO ] Flatten gal took : 8 ms
[2024-06-01 06:03:38] [INFO ] Input system was already deterministic with 112 transitions.
[2024-06-01 06:03:38] [INFO ] Flatten gal took : 21 ms
[2024-06-01 06:03:38] [INFO ] Flatten gal took : 15 ms
[2024-06-01 06:03:38] [INFO ] Export to MCC of 11 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2024-06-01 06:03:38] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 144 places, 186 transitions and 1948 arcs took 3 ms.
Total runtime 6921 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : RwMutex-PT-r0010w1000-CTLFireability-2024-00
Could not compute solution for formula : RwMutex-PT-r0010w1000-CTLFireability-2024-01
Could not compute solution for formula : RwMutex-PT-r0010w1000-CTLFireability-2024-02
Could not compute solution for formula : RwMutex-PT-r0010w1000-CTLFireability-2024-03
Could not compute solution for formula : RwMutex-PT-r0010w1000-CTLFireability-2024-04
Could not compute solution for formula : RwMutex-PT-r0010w1000-CTLFireability-2024-05
Could not compute solution for formula : RwMutex-PT-r0010w1000-CTLFireability-2024-06
Could not compute solution for formula : RwMutex-PT-r0010w1000-CTLFireability-2024-07
Could not compute solution for formula : RwMutex-PT-r0010w1000-CTLFireability-2024-08
Could not compute solution for formula : RwMutex-PT-r0010w1000-CTLFireability-2024-09
Could not compute solution for formula : RwMutex-PT-r0010w1000-CTLFireability-2024-10

BK_STOP 1717221818695

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name RwMutex-PT-r0010w1000-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/506/ctl_0_
ctl formula name RwMutex-PT-r0010w1000-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/506/ctl_1_
ctl formula name RwMutex-PT-r0010w1000-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/506/ctl_2_
ctl formula name RwMutex-PT-r0010w1000-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/506/ctl_3_
ctl formula name RwMutex-PT-r0010w1000-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/506/ctl_4_
ctl formula name RwMutex-PT-r0010w1000-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/506/ctl_5_
ctl formula name RwMutex-PT-r0010w1000-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/506/ctl_6_
ctl formula name RwMutex-PT-r0010w1000-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/506/ctl_7_
ctl formula name RwMutex-PT-r0010w1000-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/506/ctl_8_
ctl formula name RwMutex-PT-r0010w1000-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/506/ctl_9_
ctl formula name RwMutex-PT-r0010w1000-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/506/ctl_10_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RwMutex-PT-r0010w1000"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is RwMutex-PT-r0010w1000, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r524-tall-171679080000298"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RwMutex-PT-r0010w1000.tgz
mv RwMutex-PT-r0010w1000 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;