Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r524-tall-171679080000266.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is RwMutex-PT-r0010w0020, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r524-tall-171679080000266
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 456K
-rw-r--r-- 1 mcc users 7.6K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 86K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.5K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 41K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.3K Apr 23 07:49 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Apr 23 07:49 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Apr 23 07:49 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 23 07:49 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.5K Apr 13 06:38 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 74K Apr 13 06:38 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.7K Apr 13 06:37 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 78K Apr 13 06:37 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 23 07:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 23 07:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 11 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 44K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-2024-00
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-2024-01
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-2024-02
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-2024-03
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-2024-04
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-2024-05
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-2024-06
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-2024-07
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-2024-08
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-2024-09
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-2024-10
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-2024-11
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-2023-12
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-2023-13
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-2023-14
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717221735184

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RwMutex-PT-r0010w0020
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 06:02:16] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 06:02:16] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 06:02:16] [INFO ] Load time of PNML (sax parser for PT used): 70 ms
[2024-06-01 06:02:16] [INFO ] Transformed 70 places.
[2024-06-01 06:02:16] [INFO ] Transformed 60 transitions.
[2024-06-01 06:02:16] [INFO ] Found NUPN structural information;
[2024-06-01 06:02:16] [INFO ] Parsed PT model containing 70 places and 60 transitions and 540 arcs in 205 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 12 ms.
Initial state reduction rules removed 4 formulas.
FORMULA RwMutex-PT-r0010w0020-CTLFireability-2024-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RwMutex-PT-r0010w0020-CTLFireability-2024-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RwMutex-PT-r0010w0020-CTLFireability-2024-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RwMutex-PT-r0010w0020-CTLFireability-2024-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 51 out of 70 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 70/70 places, 60/60 transitions.
Applied a total of 0 rules in 8 ms. Remains 70 /70 variables (removed 0) and now considering 60/60 (removed 0) transitions.
// Phase 1: matrix 60 rows 70 cols
[2024-06-01 06:02:16] [INFO ] Computed 40 invariants in 9 ms
[2024-06-01 06:02:16] [INFO ] Implicit Places using invariants in 186 ms returned [8, 10, 14, 17, 19, 20, 33, 44, 69]
Discarding 9 places :
Implicit Place search using SMT only with invariants took 217 ms to find 9 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 61/70 places, 60/60 transitions.
Applied a total of 0 rules in 1 ms. Remains 61 /61 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 248 ms. Remains : 61/70 places, 60/60 transitions.
Support contains 51 out of 61 places after structural reductions.
[2024-06-01 06:02:17] [INFO ] Flatten gal took : 37 ms
[2024-06-01 06:02:17] [INFO ] Flatten gal took : 15 ms
[2024-06-01 06:02:17] [INFO ] Input system was already deterministic with 60 transitions.
Reduction of identical properties reduced properties to check from 44 to 41
RANDOM walk for 40000 steps (8 resets) in 2090 ms. (19 steps per ms) remains 2/41 properties
BEST_FIRST walk for 40004 steps (8 resets) in 208 ms. (191 steps per ms) remains 2/2 properties
BEST_FIRST walk for 40004 steps (8 resets) in 278 ms. (143 steps per ms) remains 2/2 properties
// Phase 1: matrix 60 rows 61 cols
[2024-06-01 06:02:18] [INFO ] Computed 31 invariants in 10 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/16 variables, 16/16 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/16 variables, 1/17 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/16 variables, 0/17 constraints. Problems are: Problem set: 0 solved, 2 unsolved
Problem AtomicPropp29 is UNSAT
Problem AtomicPropp39 is UNSAT
After SMT solving in domain Real declared 44/121 variables, and 30 constraints, problems are : Problem set: 2 solved, 0 unsolved in 89 ms.
Refiners :[Domain max(s): 16/61 constraints, Positive P Invariants (semi-flows): 14/31 constraints, State Equation: 0/61 constraints, PredecessorRefiner: 2/2 constraints, Known Traps: 0/0 constraints]
After SMT, in 145ms problems are : Problem set: 2 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 2 atomic propositions for a total of 12 simplifications.
[2024-06-01 06:02:18] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2024-06-01 06:02:18] [INFO ] Flatten gal took : 12 ms
FORMULA RwMutex-PT-r0010w0020-CTLFireability-2024-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 06:02:18] [INFO ] Flatten gal took : 11 ms
[2024-06-01 06:02:18] [INFO ] Input system was already deterministic with 60 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 61/61 places, 60/60 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 59 transition count 58
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 59 transition count 58
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 6 place count 59 transition count 56
Applied a total of 6 rules in 11 ms. Remains 59 /61 variables (removed 2) and now considering 56/60 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 59/61 places, 56/60 transitions.
[2024-06-01 06:02:18] [INFO ] Flatten gal took : 8 ms
[2024-06-01 06:02:18] [INFO ] Flatten gal took : 8 ms
[2024-06-01 06:02:18] [INFO ] Input system was already deterministic with 56 transitions.
Starting structural reductions in LTL mode, iteration 0 : 61/61 places, 60/60 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 56 transition count 55
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 56 transition count 55
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 15 place count 56 transition count 50
Applied a total of 15 rules in 4 ms. Remains 56 /61 variables (removed 5) and now considering 50/60 (removed 10) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 56/61 places, 50/60 transitions.
[2024-06-01 06:02:18] [INFO ] Flatten gal took : 7 ms
[2024-06-01 06:02:18] [INFO ] Flatten gal took : 6 ms
[2024-06-01 06:02:18] [INFO ] Input system was already deterministic with 50 transitions.
Starting structural reductions in LTL mode, iteration 0 : 61/61 places, 60/60 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 56 transition count 55
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 56 transition count 55
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 15 place count 56 transition count 50
Applied a total of 15 rules in 4 ms. Remains 56 /61 variables (removed 5) and now considering 50/60 (removed 10) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 56/61 places, 50/60 transitions.
[2024-06-01 06:02:18] [INFO ] Flatten gal took : 7 ms
[2024-06-01 06:02:18] [INFO ] Flatten gal took : 7 ms
[2024-06-01 06:02:18] [INFO ] Input system was already deterministic with 50 transitions.
Starting structural reductions in LTL mode, iteration 0 : 61/61 places, 60/60 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 56 transition count 55
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 56 transition count 55
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 15 place count 56 transition count 50
Applied a total of 15 rules in 3 ms. Remains 56 /61 variables (removed 5) and now considering 50/60 (removed 10) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 56/61 places, 50/60 transitions.
[2024-06-01 06:02:18] [INFO ] Flatten gal took : 7 ms
[2024-06-01 06:02:18] [INFO ] Flatten gal took : 7 ms
[2024-06-01 06:02:18] [INFO ] Input system was already deterministic with 50 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 61/61 places, 60/60 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 56 transition count 55
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 56 transition count 55
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 15 place count 56 transition count 50
Applied a total of 15 rules in 9 ms. Remains 56 /61 variables (removed 5) and now considering 50/60 (removed 10) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 56/61 places, 50/60 transitions.
[2024-06-01 06:02:18] [INFO ] Flatten gal took : 7 ms
[2024-06-01 06:02:18] [INFO ] Flatten gal took : 7 ms
[2024-06-01 06:02:18] [INFO ] Input system was already deterministic with 50 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 61/61 places, 60/60 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 56 transition count 55
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 56 transition count 55
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 15 place count 56 transition count 50
Applied a total of 15 rules in 7 ms. Remains 56 /61 variables (removed 5) and now considering 50/60 (removed 10) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 56/61 places, 50/60 transitions.
[2024-06-01 06:02:18] [INFO ] Flatten gal took : 6 ms
[2024-06-01 06:02:18] [INFO ] Flatten gal took : 5 ms
[2024-06-01 06:02:18] [INFO ] Input system was already deterministic with 50 transitions.
Starting structural reductions in LTL mode, iteration 0 : 61/61 places, 60/60 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 59 transition count 58
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 59 transition count 58
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 6 place count 59 transition count 56
Applied a total of 6 rules in 3 ms. Remains 59 /61 variables (removed 2) and now considering 56/60 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 59/61 places, 56/60 transitions.
[2024-06-01 06:02:18] [INFO ] Flatten gal took : 7 ms
[2024-06-01 06:02:18] [INFO ] Flatten gal took : 7 ms
[2024-06-01 06:02:18] [INFO ] Input system was already deterministic with 56 transitions.
Starting structural reductions in LTL mode, iteration 0 : 61/61 places, 60/60 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 56 transition count 55
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 56 transition count 55
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 15 place count 56 transition count 50
Applied a total of 15 rules in 2 ms. Remains 56 /61 variables (removed 5) and now considering 50/60 (removed 10) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 56/61 places, 50/60 transitions.
[2024-06-01 06:02:18] [INFO ] Flatten gal took : 6 ms
[2024-06-01 06:02:18] [INFO ] Flatten gal took : 6 ms
[2024-06-01 06:02:18] [INFO ] Input system was already deterministic with 50 transitions.
Starting structural reductions in LTL mode, iteration 0 : 61/61 places, 60/60 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 57 transition count 56
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 57 transition count 56
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 12 place count 57 transition count 52
Applied a total of 12 rules in 3 ms. Remains 57 /61 variables (removed 4) and now considering 52/60 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 57/61 places, 52/60 transitions.
[2024-06-01 06:02:18] [INFO ] Flatten gal took : 5 ms
[2024-06-01 06:02:18] [INFO ] Flatten gal took : 5 ms
[2024-06-01 06:02:18] [INFO ] Input system was already deterministic with 52 transitions.
Starting structural reductions in LTL mode, iteration 0 : 61/61 places, 60/60 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 59 transition count 58
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 59 transition count 58
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 6 place count 59 transition count 56
Applied a total of 6 rules in 2 ms. Remains 59 /61 variables (removed 2) and now considering 56/60 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 59/61 places, 56/60 transitions.
[2024-06-01 06:02:18] [INFO ] Flatten gal took : 6 ms
[2024-06-01 06:02:18] [INFO ] Flatten gal took : 6 ms
[2024-06-01 06:02:18] [INFO ] Input system was already deterministic with 56 transitions.
Starting structural reductions in LTL mode, iteration 0 : 61/61 places, 60/60 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 57 transition count 56
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 57 transition count 56
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 12 place count 57 transition count 52
Applied a total of 12 rules in 2 ms. Remains 57 /61 variables (removed 4) and now considering 52/60 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 57/61 places, 52/60 transitions.
[2024-06-01 06:02:18] [INFO ] Flatten gal took : 4 ms
[2024-06-01 06:02:18] [INFO ] Flatten gal took : 4 ms
[2024-06-01 06:02:18] [INFO ] Input system was already deterministic with 52 transitions.
[2024-06-01 06:02:18] [INFO ] Flatten gal took : 5 ms
[2024-06-01 06:02:18] [INFO ] Flatten gal took : 6 ms
[2024-06-01 06:02:18] [INFO ] Export to MCC of 11 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms.
[2024-06-01 06:02:18] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 61 places, 60 transitions and 522 arcs took 3 ms.
Total runtime 2271 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : RwMutex-PT-r0010w0020-CTLFireability-2024-01
Could not compute solution for formula : RwMutex-PT-r0010w0020-CTLFireability-2024-02
Could not compute solution for formula : RwMutex-PT-r0010w0020-CTLFireability-2024-03
Could not compute solution for formula : RwMutex-PT-r0010w0020-CTLFireability-2024-06
Could not compute solution for formula : RwMutex-PT-r0010w0020-CTLFireability-2024-08
Could not compute solution for formula : RwMutex-PT-r0010w0020-CTLFireability-2024-09
Could not compute solution for formula : RwMutex-PT-r0010w0020-CTLFireability-2024-10
Could not compute solution for formula : RwMutex-PT-r0010w0020-CTLFireability-2023-12
Could not compute solution for formula : RwMutex-PT-r0010w0020-CTLFireability-2023-13
Could not compute solution for formula : RwMutex-PT-r0010w0020-CTLFireability-2023-14
Could not compute solution for formula : RwMutex-PT-r0010w0020-CTLFireability-2023-15

BK_STOP 1717221738989

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ perl -pe 's/.*\.//g'
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name RwMutex-PT-r0010w0020-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/492/ctl_0_
ctl formula name RwMutex-PT-r0010w0020-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/492/ctl_1_
ctl formula name RwMutex-PT-r0010w0020-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/492/ctl_2_
ctl formula name RwMutex-PT-r0010w0020-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/492/ctl_3_
ctl formula name RwMutex-PT-r0010w0020-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/492/ctl_4_
ctl formula name RwMutex-PT-r0010w0020-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/492/ctl_5_
ctl formula name RwMutex-PT-r0010w0020-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/492/ctl_6_
ctl formula name RwMutex-PT-r0010w0020-CTLFireability-2023-12
ctl formula formula --ctl=/tmp/492/ctl_7_
ctl formula name RwMutex-PT-r0010w0020-CTLFireability-2023-13
ctl formula formula --ctl=/tmp/492/ctl_8_
ctl formula name RwMutex-PT-r0010w0020-CTLFireability-2023-14
ctl formula formula --ctl=/tmp/492/ctl_9_
ctl formula name RwMutex-PT-r0010w0020-CTLFireability-2023-15
ctl formula formula --ctl=/tmp/492/ctl_10_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RwMutex-PT-r0010w0020"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is RwMutex-PT-r0010w0020, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r524-tall-171679080000266"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RwMutex-PT-r0010w0020.tgz
mv RwMutex-PT-r0010w0020 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;