fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r520-tall-171662338700501
Last Updated
July 7, 2024

About the Execution of LTSMin+red for Railroad-PT-050

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
294.691 1983.00 5004.00 21.90 0 0 1 0 1 1 0 1 1 1 1 0 0 0 1 1 normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r520-tall-171662338700501.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is Railroad-PT-050, examination is UpperBounds
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r520-tall-171662338700501
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.8M
-rw-r--r-- 1 mcc users 8.9K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 89K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.0K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 4.4K Apr 23 07:46 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Apr 23 07:46 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K May 19 07:29 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 19 18:55 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Apr 12 14:03 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 94K Apr 12 14:03 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.9K Apr 12 13:58 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 75K Apr 12 13:58 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 23 07:46 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 23 07:46 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 1.4M May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of positive values
NUM_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Railroad-PT-050-UpperBounds-00
FORMULA_NAME Railroad-PT-050-UpperBounds-01
FORMULA_NAME Railroad-PT-050-UpperBounds-02
FORMULA_NAME Railroad-PT-050-UpperBounds-03
FORMULA_NAME Railroad-PT-050-UpperBounds-04
FORMULA_NAME Railroad-PT-050-UpperBounds-05
FORMULA_NAME Railroad-PT-050-UpperBounds-06
FORMULA_NAME Railroad-PT-050-UpperBounds-07
FORMULA_NAME Railroad-PT-050-UpperBounds-08
FORMULA_NAME Railroad-PT-050-UpperBounds-09
FORMULA_NAME Railroad-PT-050-UpperBounds-10
FORMULA_NAME Railroad-PT-050-UpperBounds-11
FORMULA_NAME Railroad-PT-050-UpperBounds-12
FORMULA_NAME Railroad-PT-050-UpperBounds-13
FORMULA_NAME Railroad-PT-050-UpperBounds-14
FORMULA_NAME Railroad-PT-050-UpperBounds-15

=== Now, execution of the tool begins

BK_START 1717261272203

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=UpperBounds
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Railroad-PT-050
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 17:01:13] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, UpperBounds, -timeout, 360, -rebuildPNML]
[2024-06-01 17:01:13] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 17:01:13] [INFO ] Load time of PNML (sax parser for PT used): 201 ms
[2024-06-01 17:01:13] [INFO ] Transformed 518 places.
[2024-06-01 17:01:13] [INFO ] Transformed 2756 transitions.
[2024-06-01 17:01:13] [INFO ] Found NUPN structural information;
[2024-06-01 17:01:13] [INFO ] Parsed PT model containing 518 places and 2756 transitions and 16378 arcs in 311 ms.
Parsed 16 properties from file /home/mcc/execution/UpperBounds.xml in 7 ms.
Deduced a syphon composed of 151 places in 31 ms
Reduce places removed 151 places and 50 transitions.
FORMULA Railroad-PT-050-UpperBounds-00 0 TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Railroad-PT-050-UpperBounds-01 0 TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Railroad-PT-050-UpperBounds-03 0 TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Railroad-PT-050-UpperBounds-06 0 TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Railroad-PT-050-UpperBounds-11 0 TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Railroad-PT-050-UpperBounds-12 0 TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Railroad-PT-050-UpperBounds-13 0 TECHNIQUES TOPOLOGICAL INITIAL_STATE
Current structural bounds on expressions (Initiallly, because the net is safe) : Max Seen:[0, 1, 1, 0, 1, 0, 0, 0, 0] Max Struct:[1, 1, 1, 1, 1, 1, 1, 1, 1]
FORMULA Railroad-PT-050-UpperBounds-08 1 TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Railroad-PT-050-UpperBounds-05 1 TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Railroad-PT-050-UpperBounds-04 1 TECHNIQUES TOPOLOGICAL INITIAL_STATE
Current structural bounds on expressions (Before main loop) : Max Seen:[0, 0, 0, 0, 0, 0] Max Struct:[1, 1, 1, 1, 1, 1]
// Phase 1: matrix 2706 rows 367 cols
[2024-06-01 17:01:13] [INFO ] Invariants computation overflowed in 55 ms
Current structural bounds on expressions (after invariants) : Max Seen:[0, 0, 0, 0, 0, 0] Max Struct:[1, 1, 1, 1, 1, 1]
RANDOM walk for 10000 steps (2 resets) in 155 ms. (64 steps per ms)
FORMULA Railroad-PT-050-UpperBounds-15 1 TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
FORMULA Railroad-PT-050-UpperBounds-14 1 TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
FORMULA Railroad-PT-050-UpperBounds-10 1 TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
FORMULA Railroad-PT-050-UpperBounds-09 1 TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
FORMULA Railroad-PT-050-UpperBounds-07 1 TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
FORMULA Railroad-PT-050-UpperBounds-02 1 TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
BEST_FIRST walk for 10001 steps (2 resets) in 25 ms. (384 steps per ms)
Current structural bounds on expressions (after WALK) : Max Seen:[] Max Struct:[]
RANDOM walk for 0 steps (0 resets) in 5 ms. (0 steps per ms) remains 0/0 properties
Finished probabilistic random walk after 0 steps, run visited all 0 properties in 0 ms. (steps per millisecond=0 )
Current structural bounds on expressions (After reachability solving 0 queries.) : Max Seen:[] Max Struct:[]
All properties solved without resorting to model-checking.
Total runtime 730 ms.
ITS solved all properties within timeout

BK_STOP 1717261274186

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination UpperBounds -timeout 360 -rebuildPNML

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Railroad-PT-050"
export BK_EXAMINATION="UpperBounds"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is Railroad-PT-050, examination is UpperBounds"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r520-tall-171662338700501"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Railroad-PT-050.tgz
mv Railroad-PT-050 execution
cd execution
if [ "UpperBounds" = "ReachabilityDeadlock" ] || [ "UpperBounds" = "UpperBounds" ] || [ "UpperBounds" = "QuasiLiveness" ] || [ "UpperBounds" = "StableMarking" ] || [ "UpperBounds" = "Liveness" ] || [ "UpperBounds" = "OneSafe" ] || [ "UpperBounds" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "UpperBounds" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "UpperBounds" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "UpperBounds.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property UpperBounds.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "UpperBounds.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' UpperBounds.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "UpperBounds" = "ReachabilityDeadlock" ] || [ "UpperBounds" = "QuasiLiveness" ] || [ "UpperBounds" = "StableMarking" ] || [ "UpperBounds" = "Liveness" ] || [ "UpperBounds" = "OneSafe" ] ; then
echo "FORMULA_NAME UpperBounds"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;