fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r520-tall-171662338400362
Last Updated
July 7, 2024

About the Execution of LTSMin+red for RERS2020-PT-pb105

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16124.151 208949.00 294897.00 1020.60 [undef] Cannot compute

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r520-tall-171662338400362.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is RERS2020-PT-pb105, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r520-tall-171662338400362
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 87M
-rw-r--r-- 1 mcc users 6.8K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 70K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.8K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 65K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K May 19 07:13 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K May 19 16:21 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 19 07:28 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 19 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K May 14 13:22 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 108K May 14 13:22 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.0K May 14 13:22 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 57K May 14 13:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K May 19 07:15 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 19 15:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 6 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 86M May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RERS2020-PT-pb105-CTLFireability-2024-00
FORMULA_NAME RERS2020-PT-pb105-CTLFireability-2024-01
FORMULA_NAME RERS2020-PT-pb105-CTLFireability-2024-02
FORMULA_NAME RERS2020-PT-pb105-CTLFireability-2024-03
FORMULA_NAME RERS2020-PT-pb105-CTLFireability-2024-04
FORMULA_NAME RERS2020-PT-pb105-CTLFireability-2024-05
FORMULA_NAME RERS2020-PT-pb105-CTLFireability-2024-06
FORMULA_NAME RERS2020-PT-pb105-CTLFireability-2024-07
FORMULA_NAME RERS2020-PT-pb105-CTLFireability-2024-08
FORMULA_NAME RERS2020-PT-pb105-CTLFireability-2024-09
FORMULA_NAME RERS2020-PT-pb105-CTLFireability-2024-10
FORMULA_NAME RERS2020-PT-pb105-CTLFireability-2024-11
FORMULA_NAME RERS2020-PT-pb105-CTLFireability-2023-12
FORMULA_NAME RERS2020-PT-pb105-CTLFireability-2023-13
FORMULA_NAME RERS2020-PT-pb105-CTLFireability-2023-14
FORMULA_NAME RERS2020-PT-pb105-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717254574561

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RERS2020-PT-pb105
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 15:09:35] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 15:09:35] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 15:09:38] [INFO ] Load time of PNML (sax parser for PT used): 2597 ms
[2024-06-01 15:09:38] [INFO ] Transformed 1982 places.
[2024-06-01 15:09:38] [INFO ] Transformed 153412 transitions.
[2024-06-01 15:09:38] [INFO ] Found NUPN structural information;
[2024-06-01 15:09:38] [INFO ] Parsed PT model containing 1982 places and 153412 transitions and 610156 arcs in 3189 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 42 ms.
Ensure Unique test removed 3773 transitions
Reduce redundant transitions removed 3773 transitions.
Support contains 261 out of 1982 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1982/1982 places, 149639/149639 transitions.
Ensure Unique test removed 10 places
Reduce places removed 11 places and 0 transitions.
Iterating post reduction 0 with 11 rules applied. Total rules applied 11 place count 1971 transition count 149639
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 14 place count 1968 transition count 149588
Iterating global reduction 1 with 3 rules applied. Total rules applied 17 place count 1968 transition count 149588
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 20 place count 1968 transition count 149585
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 21 place count 1967 transition count 149583
Iterating global reduction 2 with 1 rules applied. Total rules applied 22 place count 1967 transition count 149583
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 23 place count 1967 transition count 149582
Applied a total of 23 rules in 1542 ms. Remains 1967 /1982 variables (removed 15) and now considering 149582/149639 (removed 57) transitions.
[2024-06-01 15:09:41] [INFO ] Flow matrix only has 105319 transitions (discarded 44263 similar events)
// Phase 1: matrix 105319 rows 1967 cols
[2024-06-01 15:09:42] [INFO ] Computed 10 invariants in 610 ms
[2024-06-01 15:09:54] [INFO ] Implicit Places using invariants in 12528 ms returned []
Implicit Place search using SMT only with invariants took 12561 ms to find 0 implicit places.
Running 149581 sub problems to find dead transitions.
[2024-06-01 15:09:55] [INFO ] Flow matrix only has 105319 transitions (discarded 44263 similar events)
[2024-06-01 15:09:55] [INFO ] Invariant cache hit.
[2024-06-01 15:10:02] [INFO ] State equation strengthened by 5248 read => feed constraints.
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : RERS2020-PT-pb105-CTLFireability-2024-00
Could not compute solution for formula : RERS2020-PT-pb105-CTLFireability-2024-01
Could not compute solution for formula : RERS2020-PT-pb105-CTLFireability-2024-02
Could not compute solution for formula : RERS2020-PT-pb105-CTLFireability-2024-03
Could not compute solution for formula : RERS2020-PT-pb105-CTLFireability-2024-04
Could not compute solution for formula : RERS2020-PT-pb105-CTLFireability-2024-05
Could not compute solution for formula : RERS2020-PT-pb105-CTLFireability-2024-06
Could not compute solution for formula : RERS2020-PT-pb105-CTLFireability-2024-07
Could not compute solution for formula : RERS2020-PT-pb105-CTLFireability-2024-08
Could not compute solution for formula : RERS2020-PT-pb105-CTLFireability-2024-09
Could not compute solution for formula : RERS2020-PT-pb105-CTLFireability-2024-10
Could not compute solution for formula : RERS2020-PT-pb105-CTLFireability-2024-11
Could not compute solution for formula : RERS2020-PT-pb105-CTLFireability-2023-12
Could not compute solution for formula : RERS2020-PT-pb105-CTLFireability-2023-13
Could not compute solution for formula : RERS2020-PT-pb105-CTLFireability-2023-14
Could not compute solution for formula : RERS2020-PT-pb105-CTLFireability-2023-15

BK_STOP 1717254783510

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name RERS2020-PT-pb105-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/495/ctl_0_
ctl formula name RERS2020-PT-pb105-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/495/ctl_1_
ctl formula name RERS2020-PT-pb105-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/495/ctl_2_
ctl formula name RERS2020-PT-pb105-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/495/ctl_3_
ctl formula name RERS2020-PT-pb105-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/495/ctl_4_
ctl formula name RERS2020-PT-pb105-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/495/ctl_5_
ctl formula name RERS2020-PT-pb105-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/495/ctl_6_
ctl formula name RERS2020-PT-pb105-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/495/ctl_7_
ctl formula name RERS2020-PT-pb105-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/495/ctl_8_
ctl formula name RERS2020-PT-pb105-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/495/ctl_9_
ctl formula name RERS2020-PT-pb105-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/495/ctl_10_
ctl formula name RERS2020-PT-pb105-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/495/ctl_11_
ctl formula name RERS2020-PT-pb105-CTLFireability-2023-12
ctl formula formula --ctl=/tmp/495/ctl_12_
ctl formula name RERS2020-PT-pb105-CTLFireability-2023-13
ctl formula formula --ctl=/tmp/495/ctl_13_
ctl formula name RERS2020-PT-pb105-CTLFireability-2023-14
ctl formula formula --ctl=/tmp/495/ctl_14_
ctl formula name RERS2020-PT-pb105-CTLFireability-2023-15
ctl formula formula --ctl=/tmp/495/ctl_15_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RERS2020-PT-pb105"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is RERS2020-PT-pb105, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r520-tall-171662338400362"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RERS2020-PT-pb105.tgz
mv RERS2020-PT-pb105 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;