fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r520-tall-171662337700058
Last Updated
July 7, 2024

About the Execution of LTSMin+red for QuasiCertifProtocol-PT-02

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
287.388 3611.00 7995.00 50.40 T??????????????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r520-tall-171662337700058.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is QuasiCertifProtocol-PT-02, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r520-tall-171662337700058
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 520K
-rw-r--r-- 1 mcc users 9.0K Apr 13 03:45 CTLCardinality.txt
-rw-r--r-- 1 mcc users 88K Apr 13 03:45 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Apr 13 03:44 CTLFireability.txt
-rw-r--r-- 1 mcc users 41K Apr 13 03:44 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.8K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Apr 23 07:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Apr 23 07:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Apr 23 07:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 23 07:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 16K Apr 13 03:47 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 158K Apr 13 03:47 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Apr 13 03:46 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 31K Apr 13 03:46 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Apr 23 07:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.3K Apr 23 07:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 58K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-2024-00
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-2024-01
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-2024-02
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-2024-03
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-2024-04
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-2024-05
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-2024-06
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-2024-07
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-2024-08
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-2024-09
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-2024-10
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-2024-11
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-2024-12
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-2024-13
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-2024-14
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717219676970

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=QuasiCertifProtocol-PT-02
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 05:27:58] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 05:27:58] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 05:27:58] [INFO ] Load time of PNML (sax parser for PT used): 60 ms
[2024-06-01 05:27:58] [INFO ] Transformed 86 places.
[2024-06-01 05:27:58] [INFO ] Transformed 56 transitions.
[2024-06-01 05:27:58] [INFO ] Found NUPN structural information;
[2024-06-01 05:27:58] [INFO ] Parsed PT model containing 86 places and 56 transitions and 223 arcs in 157 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 12 ms.
Support contains 70 out of 86 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 86/86 places, 56/56 transitions.
Reduce places removed 10 places and 0 transitions.
Iterating post reduction 0 with 10 rules applied. Total rules applied 10 place count 76 transition count 56
Applied a total of 10 rules in 24 ms. Remains 76 /86 variables (removed 10) and now considering 56/56 (removed 0) transitions.
// Phase 1: matrix 56 rows 76 cols
[2024-06-01 05:27:58] [INFO ] Computed 22 invariants in 9 ms
[2024-06-01 05:27:58] [INFO ] Implicit Places using invariants in 166 ms returned []
[2024-06-01 05:27:58] [INFO ] Invariant cache hit.
[2024-06-01 05:27:58] [INFO ] Implicit Places using invariants and state equation in 78 ms returned [43]
Discarding 1 places :
Implicit Place search using SMT with State Equation took 276 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 75/86 places, 56/56 transitions.
Applied a total of 0 rules in 1 ms. Remains 75 /75 variables (removed 0) and now considering 56/56 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 317 ms. Remains : 75/86 places, 56/56 transitions.
Support contains 70 out of 75 places after structural reductions.
[2024-06-01 05:27:58] [INFO ] Flatten gal took : 24 ms
[2024-06-01 05:27:58] [INFO ] Flatten gal took : 12 ms
[2024-06-01 05:27:58] [INFO ] Input system was already deterministic with 56 transitions.
Reduction of identical properties reduced properties to check from 39 to 38
RANDOM walk for 40000 steps (6567 resets) in 1675 ms. (23 steps per ms) remains 22/38 properties
BEST_FIRST walk for 4004 steps (96 resets) in 55 ms. (71 steps per ms) remains 22/22 properties
BEST_FIRST walk for 4003 steps (220 resets) in 17 ms. (222 steps per ms) remains 22/22 properties
BEST_FIRST walk for 4002 steps (220 resets) in 34 ms. (114 steps per ms) remains 22/22 properties
BEST_FIRST walk for 4002 steps (226 resets) in 19 ms. (200 steps per ms) remains 22/22 properties
BEST_FIRST walk for 4003 steps (215 resets) in 26 ms. (148 steps per ms) remains 22/22 properties
BEST_FIRST walk for 4004 steps (93 resets) in 25 ms. (154 steps per ms) remains 2/22 properties
// Phase 1: matrix 56 rows 75 cols
[2024-06-01 05:27:59] [INFO ] Computed 21 invariants in 13 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/27 variables, 4/4 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/27 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 2 (OVERLAPS) 6/33 variables, 4/8 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/33 variables, 0/8 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 4 (OVERLAPS) 49/82 variables, 33/41 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/82 variables, 0/41 constraints. Problems are: Problem set: 0 solved, 2 unsolved
Problem AtomicPropp0 is UNSAT
Problem AtomicPropp6 is UNSAT
After SMT solving in domain Real declared 131/131 variables, and 83 constraints, problems are : Problem set: 2 solved, 0 unsolved in 106 ms.
Refiners :[Generalized P Invariants (flows): 8/21 constraints, State Equation: 75/75 constraints, PredecessorRefiner: 2/2 constraints, Known Traps: 0/0 constraints]
After SMT, in 150ms problems are : Problem set: 2 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 2 atomic propositions for a total of 16 simplifications.
FORMULA QuasiCertifProtocol-PT-02-CTLFireability-2024-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 05:27:59] [INFO ] Flatten gal took : 14 ms
[2024-06-01 05:27:59] [INFO ] Flatten gal took : 7 ms
[2024-06-01 05:27:59] [INFO ] Input system was already deterministic with 56 transitions.
Computed a total of 75 stabilizing places and 56 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 75 transition count 56
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Starting structural reductions in LTL mode, iteration 0 : 75/75 places, 56/56 transitions.
Applied a total of 0 rules in 3 ms. Remains 75 /75 variables (removed 0) and now considering 56/56 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 75/75 places, 56/56 transitions.
[2024-06-01 05:27:59] [INFO ] Flatten gal took : 4 ms
[2024-06-01 05:27:59] [INFO ] Flatten gal took : 4 ms
[2024-06-01 05:27:59] [INFO ] Input system was already deterministic with 56 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 75/75 places, 56/56 transitions.
Graph (complete) has 133 edges and 75 vertex of which 23 are kept as prefixes of interest. Removing 52 places using SCC suffix rule.1 ms
Discarding 52 places :
Also discarding 22 output transitions
Drop transitions (Output transitions of discarded places.) removed 22 transitions
Reduce places removed 1 places and 1 transitions.
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 0 with 14 rules applied. Total rules applied 15 place count 22 transition count 19
Partial Post-agglomeration rule applied 1 times.
Drop transitions (Partial Post agglomeration) removed 1 transitions
Iterating global reduction 1 with 1 rules applied. Total rules applied 16 place count 22 transition count 19
Applied a total of 16 rules in 14 ms. Remains 22 /75 variables (removed 53) and now considering 19/56 (removed 37) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 14 ms. Remains : 22/75 places, 19/56 transitions.
[2024-06-01 05:27:59] [INFO ] Flatten gal took : 2 ms
[2024-06-01 05:27:59] [INFO ] Flatten gal took : 2 ms
[2024-06-01 05:27:59] [INFO ] Input system was already deterministic with 19 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 75/75 places, 56/56 transitions.
Graph (complete) has 133 edges and 75 vertex of which 71 are kept as prefixes of interest. Removing 4 places using SCC suffix rule.1 ms
Discarding 4 places :
Also discarding 2 output transitions
Drop transitions (Output transitions of discarded places.) removed 2 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 5 ms. Remains 70 /75 variables (removed 5) and now considering 53/56 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 70/75 places, 53/56 transitions.
[2024-06-01 05:27:59] [INFO ] Flatten gal took : 4 ms
[2024-06-01 05:27:59] [INFO ] Flatten gal took : 4 ms
[2024-06-01 05:27:59] [INFO ] Input system was already deterministic with 53 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 75/75 places, 56/56 transitions.
Graph (complete) has 133 edges and 75 vertex of which 71 are kept as prefixes of interest. Removing 4 places using SCC suffix rule.0 ms
Discarding 4 places :
Also discarding 2 output transitions
Drop transitions (Output transitions of discarded places.) removed 2 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 3 ms. Remains 70 /75 variables (removed 5) and now considering 53/56 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 70/75 places, 53/56 transitions.
[2024-06-01 05:27:59] [INFO ] Flatten gal took : 4 ms
[2024-06-01 05:27:59] [INFO ] Flatten gal took : 4 ms
[2024-06-01 05:27:59] [INFO ] Input system was already deterministic with 53 transitions.
Starting structural reductions in LTL mode, iteration 0 : 75/75 places, 56/56 transitions.
Applied a total of 0 rules in 0 ms. Remains 75 /75 variables (removed 0) and now considering 56/56 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 75/75 places, 56/56 transitions.
[2024-06-01 05:27:59] [INFO ] Flatten gal took : 4 ms
[2024-06-01 05:27:59] [INFO ] Flatten gal took : 5 ms
[2024-06-01 05:27:59] [INFO ] Input system was already deterministic with 56 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 75/75 places, 56/56 transitions.
Graph (complete) has 133 edges and 75 vertex of which 19 are kept as prefixes of interest. Removing 56 places using SCC suffix rule.0 ms
Discarding 56 places :
Also discarding 24 output transitions
Drop transitions (Output transitions of discarded places.) removed 24 transitions
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 0 with 14 rules applied. Total rules applied 15 place count 19 transition count 18
Applied a total of 15 rules in 2 ms. Remains 19 /75 variables (removed 56) and now considering 18/56 (removed 38) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 19/75 places, 18/56 transitions.
[2024-06-01 05:27:59] [INFO ] Flatten gal took : 1 ms
[2024-06-01 05:27:59] [INFO ] Flatten gal took : 1 ms
[2024-06-01 05:27:59] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 75/75 places, 56/56 transitions.
Applied a total of 0 rules in 1 ms. Remains 75 /75 variables (removed 0) and now considering 56/56 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 75/75 places, 56/56 transitions.
[2024-06-01 05:28:00] [INFO ] Flatten gal took : 4 ms
[2024-06-01 05:28:00] [INFO ] Flatten gal took : 4 ms
[2024-06-01 05:28:00] [INFO ] Input system was already deterministic with 56 transitions.
Starting structural reductions in LTL mode, iteration 0 : 75/75 places, 56/56 transitions.
Applied a total of 0 rules in 1 ms. Remains 75 /75 variables (removed 0) and now considering 56/56 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 75/75 places, 56/56 transitions.
[2024-06-01 05:28:00] [INFO ] Flatten gal took : 4 ms
[2024-06-01 05:28:00] [INFO ] Flatten gal took : 4 ms
[2024-06-01 05:28:00] [INFO ] Input system was already deterministic with 56 transitions.
Starting structural reductions in LTL mode, iteration 0 : 75/75 places, 56/56 transitions.
Applied a total of 0 rules in 2 ms. Remains 75 /75 variables (removed 0) and now considering 56/56 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 75/75 places, 56/56 transitions.
[2024-06-01 05:28:00] [INFO ] Flatten gal took : 3 ms
[2024-06-01 05:28:00] [INFO ] Flatten gal took : 3 ms
[2024-06-01 05:28:00] [INFO ] Input system was already deterministic with 56 transitions.
Starting structural reductions in LTL mode, iteration 0 : 75/75 places, 56/56 transitions.
Applied a total of 0 rules in 2 ms. Remains 75 /75 variables (removed 0) and now considering 56/56 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 75/75 places, 56/56 transitions.
[2024-06-01 05:28:00] [INFO ] Flatten gal took : 3 ms
[2024-06-01 05:28:00] [INFO ] Flatten gal took : 4 ms
[2024-06-01 05:28:00] [INFO ] Input system was already deterministic with 56 transitions.
Starting structural reductions in LTL mode, iteration 0 : 75/75 places, 56/56 transitions.
Applied a total of 0 rules in 2 ms. Remains 75 /75 variables (removed 0) and now considering 56/56 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 75/75 places, 56/56 transitions.
[2024-06-01 05:28:00] [INFO ] Flatten gal took : 3 ms
[2024-06-01 05:28:00] [INFO ] Flatten gal took : 4 ms
[2024-06-01 05:28:00] [INFO ] Input system was already deterministic with 56 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 75/75 places, 56/56 transitions.
Graph (complete) has 133 edges and 75 vertex of which 71 are kept as prefixes of interest. Removing 4 places using SCC suffix rule.1 ms
Discarding 4 places :
Also discarding 2 output transitions
Drop transitions (Output transitions of discarded places.) removed 2 transitions
Applied a total of 1 rules in 4 ms. Remains 71 /75 variables (removed 4) and now considering 54/56 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 71/75 places, 54/56 transitions.
[2024-06-01 05:28:00] [INFO ] Flatten gal took : 3 ms
[2024-06-01 05:28:00] [INFO ] Flatten gal took : 3 ms
[2024-06-01 05:28:00] [INFO ] Input system was already deterministic with 54 transitions.
Starting structural reductions in LTL mode, iteration 0 : 75/75 places, 56/56 transitions.
Applied a total of 0 rules in 1 ms. Remains 75 /75 variables (removed 0) and now considering 56/56 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 75/75 places, 56/56 transitions.
[2024-06-01 05:28:00] [INFO ] Flatten gal took : 3 ms
[2024-06-01 05:28:00] [INFO ] Flatten gal took : 3 ms
[2024-06-01 05:28:00] [INFO ] Input system was already deterministic with 56 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 75/75 places, 56/56 transitions.
Graph (complete) has 133 edges and 75 vertex of which 71 are kept as prefixes of interest. Removing 4 places using SCC suffix rule.1 ms
Discarding 4 places :
Also discarding 2 output transitions
Drop transitions (Output transitions of discarded places.) removed 2 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 4 ms. Remains 70 /75 variables (removed 5) and now considering 53/56 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 70/75 places, 53/56 transitions.
[2024-06-01 05:28:00] [INFO ] Flatten gal took : 3 ms
[2024-06-01 05:28:00] [INFO ] Flatten gal took : 4 ms
[2024-06-01 05:28:00] [INFO ] Input system was already deterministic with 53 transitions.
Starting structural reductions in LTL mode, iteration 0 : 75/75 places, 56/56 transitions.
Applied a total of 0 rules in 2 ms. Remains 75 /75 variables (removed 0) and now considering 56/56 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 75/75 places, 56/56 transitions.
[2024-06-01 05:28:00] [INFO ] Flatten gal took : 3 ms
[2024-06-01 05:28:00] [INFO ] Flatten gal took : 4 ms
[2024-06-01 05:28:00] [INFO ] Input system was already deterministic with 56 transitions.
[2024-06-01 05:28:00] [INFO ] Flatten gal took : 4 ms
[2024-06-01 05:28:00] [INFO ] Flatten gal took : 5 ms
[2024-06-01 05:28:00] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2024-06-01 05:28:00] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 75 places, 56 transitions and 189 arcs took 3 ms.
Total runtime 2018 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : QuasiCertifProtocol-PT-02-CTLFireability-2024-01
Could not compute solution for formula : QuasiCertifProtocol-PT-02-CTLFireability-2024-02
Could not compute solution for formula : QuasiCertifProtocol-PT-02-CTLFireability-2024-03
Could not compute solution for formula : QuasiCertifProtocol-PT-02-CTLFireability-2024-04
Could not compute solution for formula : QuasiCertifProtocol-PT-02-CTLFireability-2024-05
Could not compute solution for formula : QuasiCertifProtocol-PT-02-CTLFireability-2024-06
Could not compute solution for formula : QuasiCertifProtocol-PT-02-CTLFireability-2024-07
Could not compute solution for formula : QuasiCertifProtocol-PT-02-CTLFireability-2024-08
Could not compute solution for formula : QuasiCertifProtocol-PT-02-CTLFireability-2024-09
Could not compute solution for formula : QuasiCertifProtocol-PT-02-CTLFireability-2024-10
Could not compute solution for formula : QuasiCertifProtocol-PT-02-CTLFireability-2024-11
Could not compute solution for formula : QuasiCertifProtocol-PT-02-CTLFireability-2024-12
Could not compute solution for formula : QuasiCertifProtocol-PT-02-CTLFireability-2024-13
Could not compute solution for formula : QuasiCertifProtocol-PT-02-CTLFireability-2024-14
Could not compute solution for formula : QuasiCertifProtocol-PT-02-CTLFireability-2024-15

BK_STOP 1717219680581

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name QuasiCertifProtocol-PT-02-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/496/ctl_0_
ctl formula name QuasiCertifProtocol-PT-02-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/496/ctl_1_
ctl formula name QuasiCertifProtocol-PT-02-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/496/ctl_2_
ctl formula name QuasiCertifProtocol-PT-02-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/496/ctl_3_
ctl formula name QuasiCertifProtocol-PT-02-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/496/ctl_4_
ctl formula name QuasiCertifProtocol-PT-02-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/496/ctl_5_
ctl formula name QuasiCertifProtocol-PT-02-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/496/ctl_6_
ctl formula name QuasiCertifProtocol-PT-02-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/496/ctl_7_
ctl formula name QuasiCertifProtocol-PT-02-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/496/ctl_8_
ctl formula name QuasiCertifProtocol-PT-02-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/496/ctl_9_
ctl formula name QuasiCertifProtocol-PT-02-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/496/ctl_10_
ctl formula name QuasiCertifProtocol-PT-02-CTLFireability-2024-12
ctl formula formula --ctl=/tmp/496/ctl_11_
ctl formula name QuasiCertifProtocol-PT-02-CTLFireability-2024-13
ctl formula formula --ctl=/tmp/496/ctl_12_
ctl formula name QuasiCertifProtocol-PT-02-CTLFireability-2024-14
ctl formula formula --ctl=/tmp/496/ctl_13_
ctl formula name QuasiCertifProtocol-PT-02-CTLFireability-2024-15
ctl formula formula --ctl=/tmp/496/ctl_14_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="QuasiCertifProtocol-PT-02"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is QuasiCertifProtocol-PT-02, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r520-tall-171662337700058"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/QuasiCertifProtocol-PT-02.tgz
mv QuasiCertifProtocol-PT-02 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;