fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r516-tajo-171654446200010
Last Updated
July 7, 2024

About the Execution of LTSMin+red for PhilosophersDyn-COL-10

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
0.000 316368.00 0.00 0.00 ????T???????FF?? normal

Execution Chart

Sorry, for this execution, no execution chart could be reported.

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2024-input.r516-tajo-171654446200010.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2024-input.qcow2' backing_fmt='qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.....................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is PhilosophersDyn-COL-10, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r516-tajo-171654446200010
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 512K
-rw-r--r-- 1 mcc users 6.8K Apr 11 14:42 CTLCardinality.txt
-rw-r--r-- 1 mcc users 65K Apr 11 14:42 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Apr 11 14:39 CTLFireability.txt
-rw-r--r-- 1 mcc users 46K Apr 11 14:39 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Apr 23 07:43 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Apr 23 07:43 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Apr 23 07:43 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 23 07:43 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Apr 11 15:15 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 144K Apr 11 15:15 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.8K Apr 11 15:11 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 80K Apr 11 15:11 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 23 07:43 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 23 07:43 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_pt
-rw-r--r-- 1 mcc users 3 May 18 16:43 instance
-rw-r--r-- 1 mcc users 5 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 32K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PhilosophersDyn-COL-10-CTLFireability-2024-00
FORMULA_NAME PhilosophersDyn-COL-10-CTLFireability-2024-01
FORMULA_NAME PhilosophersDyn-COL-10-CTLFireability-2024-02
FORMULA_NAME PhilosophersDyn-COL-10-CTLFireability-2024-03
FORMULA_NAME PhilosophersDyn-COL-10-CTLFireability-2024-04
FORMULA_NAME PhilosophersDyn-COL-10-CTLFireability-2024-05
FORMULA_NAME PhilosophersDyn-COL-10-CTLFireability-2024-06
FORMULA_NAME PhilosophersDyn-COL-10-CTLFireability-2024-07
FORMULA_NAME PhilosophersDyn-COL-10-CTLFireability-2024-08
FORMULA_NAME PhilosophersDyn-COL-10-CTLFireability-2024-09
FORMULA_NAME PhilosophersDyn-COL-10-CTLFireability-2024-10
FORMULA_NAME PhilosophersDyn-COL-10-CTLFireability-2024-11
FORMULA_NAME PhilosophersDyn-COL-10-CTLFireability-2024-12
FORMULA_NAME PhilosophersDyn-COL-10-CTLFireability-2024-13
FORMULA_NAME PhilosophersDyn-COL-10-CTLFireability-2024-14
FORMULA_NAME PhilosophersDyn-COL-10-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717247643528

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=PhilosophersDyn-COL-10
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 13:14:05] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 13:14:05] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 13:14:05] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2024-06-01 13:14:05] [WARNING] Using fallBack plugin, rng conformance not checked
[2024-06-01 13:14:06] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 886 ms
[2024-06-01 13:14:06] [INFO ] Imported 8 HL places and 7 HL transitions for a total of 170 PT places and 2320.0 transition bindings in 20 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 16 ms.
[2024-06-01 13:14:06] [INFO ] Built PT skeleton of HLPN with 8 places and 7 transitions 33 arcs in 5 ms.
[2024-06-01 13:14:06] [INFO ] Skeletonized 9 HLPN properties in 3 ms. Removed 7 properties that had guard overlaps.
Computed a total of 0 stabilizing places and 0 stable transitions
Remains 9 properties that can be checked using skeleton over-approximation.
Computed a total of 0 stabilizing places and 0 stable transitions
Reduction of identical properties reduced properties to check from 8 to 7
RANDOM walk for 11554 steps (810 resets) in 334 ms. (34 steps per ms) remains 0/7 properties
[2024-06-01 13:14:06] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2024-06-01 13:14:06] [INFO ] Flatten gal took : 19 ms
FORMULA PhilosophersDyn-COL-10-CTLFireability-2024-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 13:14:06] [INFO ] Flatten gal took : 4 ms
Domain [Philosopher(10), Philosopher(10)] of place Neighbourhood breaks symmetries in sort Philosopher
[2024-06-01 13:14:06] [INFO ] Unfolded HLPN to a Petri net with 170 places and 2310 transitions 18190 arcs in 117 ms.
[2024-06-01 13:14:06] [INFO ] Unfolded 15 HLPN properties in 12 ms.
[2024-06-01 13:14:06] [INFO ] Reduced 89 identical enabling conditions.
[2024-06-01 13:14:06] [INFO ] Reduced 89 identical enabling conditions.
[2024-06-01 13:14:06] [INFO ] Reduced 89 identical enabling conditions.
[2024-06-01 13:14:06] [INFO ] Reduced 89 identical enabling conditions.
[2024-06-01 13:14:06] [INFO ] Reduced 89 identical enabling conditions.
[2024-06-01 13:14:06] [INFO ] Reduced 89 identical enabling conditions.
[2024-06-01 13:14:06] [INFO ] Reduced 89 identical enabling conditions.
[2024-06-01 13:14:06] [INFO ] Reduced 89 identical enabling conditions.
[2024-06-01 13:14:06] [INFO ] Reduced 89 identical enabling conditions.
[2024-06-01 13:14:06] [INFO ] Reduced 89 identical enabling conditions.
[2024-06-01 13:14:06] [INFO ] Reduced 89 identical enabling conditions.
Ensure Unique test removed 45 transitions
Reduce redundant transitions removed 45 transitions.
Support contains 170 out of 170 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 170/170 places, 2265/2265 transitions.
Applied a total of 0 rules in 41 ms. Remains 170 /170 variables (removed 0) and now considering 2265/2265 (removed 0) transitions.
Running 2220 sub problems to find dead transitions.
[2024-06-01 13:14:07] [INFO ] Flow matrix only has 1905 transitions (discarded 360 similar events)
// Phase 1: matrix 1905 rows 170 cols
[2024-06-01 13:14:07] [INFO ] Computed 39 invariants in 99 ms
[2024-06-01 13:14:08] [INFO ] State equation strengthened by 1030 read => feed constraints.
Problem TDEAD100 is UNSAT
Problem TDEAD111 is UNSAT
Problem TDEAD122 is UNSAT
Problem TDEAD133 is UNSAT
Problem TDEAD144 is UNSAT
Problem TDEAD200 is UNSAT
Problem TDEAD211 is UNSAT
Problem TDEAD222 is UNSAT
Problem TDEAD233 is UNSAT
Problem TDEAD244 is UNSAT
Problem TDEAD300 is UNSAT
Problem TDEAD311 is UNSAT
Problem TDEAD322 is UNSAT
Problem TDEAD333 is UNSAT
Problem TDEAD344 is UNSAT
Problem TDEAD400 is UNSAT
Problem TDEAD411 is UNSAT
Problem TDEAD422 is UNSAT
Problem TDEAD433 is UNSAT
Problem TDEAD444 is UNSAT
Problem TDEAD500 is UNSAT
Problem TDEAD511 is UNSAT
Problem TDEAD522 is UNSAT
Problem TDEAD533 is UNSAT
Problem TDEAD544 is UNSAT
Problem TDEAD550 is UNSAT
Problem TDEAD560 is UNSAT
Problem TDEAD570 is UNSAT
Problem TDEAD580 is UNSAT
Problem TDEAD590 is UNSAT
Problem TDEAD600 is UNSAT
Problem TDEAD610 is UNSAT
Problem TDEAD611 is UNSAT
Problem TDEAD620 is UNSAT
Problem TDEAD622 is UNSAT
Problem TDEAD630 is UNSAT
Problem TDEAD633 is UNSAT
Problem TDEAD640 is UNSAT
Problem TDEAD644 is UNSAT
Problem TDEAD651 is UNSAT
Problem TDEAD661 is UNSAT
Problem TDEAD671 is UNSAT
Problem TDEAD681 is UNSAT
Problem TDEAD691 is UNSAT
Problem TDEAD700 is UNSAT
Problem TDEAD701 is UNSAT
Problem TDEAD711 is UNSAT
Problem TDEAD721 is UNSAT
Problem TDEAD722 is UNSAT
Problem TDEAD731 is UNSAT
Problem TDEAD733 is UNSAT
Problem TDEAD741 is UNSAT
Problem TDEAD744 is UNSAT
Problem TDEAD752 is UNSAT
Problem TDEAD762 is UNSAT
Problem TDEAD772 is UNSAT
Problem TDEAD782 is UNSAT
Problem TDEAD792 is UNSAT
Problem TDEAD800 is UNSAT
Problem TDEAD802 is UNSAT
Problem TDEAD811 is UNSAT
Problem TDEAD812 is UNSAT
Problem TDEAD822 is UNSAT
Problem TDEAD832 is UNSAT
Problem TDEAD833 is UNSAT
Problem TDEAD842 is UNSAT
Problem TDEAD844 is UNSAT
Problem TDEAD853 is UNSAT
Problem TDEAD863 is UNSAT
Problem TDEAD873 is UNSAT
Problem TDEAD883 is UNSAT
Problem TDEAD893 is UNSAT
Problem TDEAD900 is UNSAT
Problem TDEAD903 is UNSAT
Problem TDEAD911 is UNSAT
Problem TDEAD913 is UNSAT
Problem TDEAD922 is UNSAT
Problem TDEAD923 is UNSAT
Problem TDEAD933 is UNSAT
Problem TDEAD943 is UNSAT
Problem TDEAD944 is UNSAT
Problem TDEAD954 is UNSAT
Problem TDEAD964 is UNSAT
Problem TDEAD974 is UNSAT
Problem TDEAD984 is UNSAT
Problem TDEAD994 is UNSAT
Problem TDEAD1000 is UNSAT
Problem TDEAD1004 is UNSAT
Problem TDEAD1011 is UNSAT
Problem TDEAD1014 is UNSAT
Problem TDEAD1022 is UNSAT
Problem TDEAD1024 is UNSAT
Problem TDEAD1033 is UNSAT
Problem TDEAD1034 is UNSAT
Problem TDEAD1044 is UNSAT
Problem TDEAD1100 is UNSAT
Problem TDEAD1111 is UNSAT
Problem TDEAD1122 is UNSAT
Problem TDEAD1133 is UNSAT
Problem TDEAD1144 is UNSAT
Problem TDEAD1200 is UNSAT
Problem TDEAD1211 is UNSAT
Problem TDEAD1222 is UNSAT
Problem TDEAD1233 is UNSAT
Problem TDEAD1244 is UNSAT
Problem TDEAD1300 is UNSAT
Problem TDEAD1311 is UNSAT
Problem TDEAD1322 is UNSAT
Problem TDEAD1333 is UNSAT
Problem TDEAD1344 is UNSAT
Problem TDEAD1400 is UNSAT
Problem TDEAD1411 is UNSAT
Problem TDEAD1422 is UNSAT
Problem TDEAD1433 is UNSAT
Problem TDEAD1444 is UNSAT
Problem TDEAD1500 is UNSAT
Problem TDEAD1511 is UNSAT
Problem TDEAD1522 is UNSAT
Problem TDEAD1533 is UNSAT
Problem TDEAD1544 is UNSAT
Problem TDEAD1550 is UNSAT
Problem TDEAD1560 is UNSAT
Problem TDEAD1570 is UNSAT
Problem TDEAD1580 is UNSAT
Problem TDEAD1590 is UNSAT
Problem TDEAD1600 is UNSAT
Problem TDEAD1610 is UNSAT
Problem TDEAD1611 is UNSAT
Problem TDEAD1620 is UNSAT
Problem TDEAD1622 is UNSAT
Problem TDEAD1630 is UNSAT
Problem TDEAD1633 is UNSAT
Problem TDEAD1640 is UNSAT
Problem TDEAD1644 is UNSAT
Problem TDEAD1651 is UNSAT
Problem TDEAD1661 is UNSAT
Problem TDEAD1671 is UNSAT
Problem TDEAD1681 is UNSAT
Problem TDEAD1691 is UNSAT
Problem TDEAD1700 is UNSAT
Problem TDEAD1701 is UNSAT
Problem TDEAD1711 is UNSAT
Problem TDEAD1721 is UNSAT
Problem TDEAD1722 is UNSAT
Problem TDEAD1731 is UNSAT
Problem TDEAD1733 is UNSAT
Problem TDEAD1741 is UNSAT
Problem TDEAD1744 is UNSAT
Problem TDEAD1752 is UNSAT
Problem TDEAD1762 is UNSAT
Problem TDEAD1772 is UNSAT
Problem TDEAD1782 is UNSAT
Problem TDEAD1792 is UNSAT
Problem TDEAD1800 is UNSAT
Problem TDEAD1802 is UNSAT
Problem TDEAD1811 is UNSAT
Problem TDEAD1812 is UNSAT
Problem TDEAD1822 is UNSAT
Problem TDEAD1832 is UNSAT
Problem TDEAD1833 is UNSAT
Problem TDEAD1842 is UNSAT
Problem TDEAD1844 is UNSAT
Problem TDEAD1853 is UNSAT
Problem TDEAD1863 is UNSAT
Problem TDEAD1873 is UNSAT
Problem TDEAD1883 is UNSAT
Problem TDEAD1893 is UNSAT
Problem TDEAD1900 is UNSAT
Problem TDEAD1903 is UNSAT
Problem TDEAD1911 is UNSAT
Problem TDEAD1913 is UNSAT
Problem TDEAD1922 is UNSAT
Problem TDEAD1923 is UNSAT
Problem TDEAD1933 is UNSAT
Problem TDEAD1943 is UNSAT
Problem TDEAD1944 is UNSAT
Problem TDEAD1954 is UNSAT
Problem TDEAD1964 is UNSAT
Problem TDEAD1974 is UNSAT
Problem TDEAD1984 is UNSAT
Problem TDEAD1994 is UNSAT
Problem TDEAD2000 is UNSAT
Problem TDEAD2004 is UNSAT
Problem TDEAD2011 is UNSAT
Problem TDEAD2014 is UNSAT
Problem TDEAD2022 is UNSAT
Problem TDEAD2024 is UNSAT
Problem TDEAD2033 is UNSAT
Problem TDEAD2034 is UNSAT
Problem TDEAD2044 is UNSAT
At refinement iteration 0 (INCLUDED_ONLY) 0/170 variables, 30/30 constraints. Problems are: Problem set: 190 solved, 2030 unsolved
Problem TDEAD45 is UNSAT
Problem TDEAD55 is UNSAT
Problem TDEAD56 is UNSAT
Problem TDEAD65 is UNSAT
Problem TDEAD67 is UNSAT
Problem TDEAD75 is UNSAT
Problem TDEAD78 is UNSAT
Problem TDEAD85 is UNSAT
Problem TDEAD89 is UNSAT
Problem TDEAD95 is UNSAT
Problem TDEAD105 is UNSAT
Problem TDEAD115 is UNSAT
Problem TDEAD125 is UNSAT
Problem TDEAD135 is UNSAT
Problem TDEAD145 is UNSAT
Problem TDEAD146 is UNSAT
Problem TDEAD156 is UNSAT
Problem TDEAD166 is UNSAT
Problem TDEAD167 is UNSAT
Problem TDEAD176 is UNSAT
Problem TDEAD178 is UNSAT
Problem TDEAD186 is UNSAT
Problem TDEAD189 is UNSAT
Problem TDEAD196 is UNSAT
Problem TDEAD206 is UNSAT
Problem TDEAD216 is UNSAT
Problem TDEAD226 is UNSAT
Problem TDEAD236 is UNSAT
Problem TDEAD245 is UNSAT
Problem TDEAD247 is UNSAT
Problem TDEAD256 is UNSAT
Problem TDEAD257 is UNSAT
Problem TDEAD267 is UNSAT
Problem TDEAD277 is UNSAT
Problem TDEAD278 is UNSAT
Problem TDEAD287 is UNSAT
Problem TDEAD289 is UNSAT
Problem TDEAD297 is UNSAT
Problem TDEAD307 is UNSAT
Problem TDEAD317 is UNSAT
Problem TDEAD327 is UNSAT
Problem TDEAD337 is UNSAT
Problem TDEAD345 is UNSAT
Problem TDEAD348 is UNSAT
Problem TDEAD356 is UNSAT
Problem TDEAD358 is UNSAT
Problem TDEAD367 is UNSAT
Problem TDEAD368 is UNSAT
Problem TDEAD378 is UNSAT
Problem TDEAD388 is UNSAT
Problem TDEAD389 is UNSAT
Problem TDEAD398 is UNSAT
Problem TDEAD408 is UNSAT
Problem TDEAD418 is UNSAT
Problem TDEAD428 is UNSAT
Problem TDEAD438 is UNSAT
Problem TDEAD445 is UNSAT
Problem TDEAD449 is UNSAT
Problem TDEAD456 is UNSAT
Problem TDEAD459 is UNSAT
Problem TDEAD467 is UNSAT
Problem TDEAD469 is UNSAT
Problem TDEAD478 is UNSAT
Problem TDEAD479 is UNSAT
Problem TDEAD489 is UNSAT
Problem TDEAD499 is UNSAT
Problem TDEAD509 is UNSAT
Problem TDEAD519 is UNSAT
Problem TDEAD529 is UNSAT
Problem TDEAD539 is UNSAT
Problem TDEAD545 is UNSAT
Problem TDEAD556 is UNSAT
Problem TDEAD567 is UNSAT
Problem TDEAD578 is UNSAT
Problem TDEAD589 is UNSAT
Problem TDEAD645 is UNSAT
Problem TDEAD656 is UNSAT
Problem TDEAD667 is UNSAT
Problem TDEAD678 is UNSAT
Problem TDEAD689 is UNSAT
Problem TDEAD745 is UNSAT
Problem TDEAD756 is UNSAT
Problem TDEAD767 is UNSAT
Problem TDEAD778 is UNSAT
Problem TDEAD789 is UNSAT
Problem TDEAD845 is UNSAT
Problem TDEAD856 is UNSAT
Problem TDEAD867 is UNSAT
Problem TDEAD878 is UNSAT
Problem TDEAD889 is UNSAT
Problem TDEAD945 is UNSAT
Problem TDEAD956 is UNSAT
Problem TDEAD967 is UNSAT
Problem TDEAD978 is UNSAT
Problem TDEAD989 is UNSAT
Problem TDEAD1045 is UNSAT
Problem TDEAD1055 is UNSAT
Problem TDEAD1056 is UNSAT
Problem TDEAD1065 is UNSAT
Problem TDEAD1067 is UNSAT
Problem TDEAD1075 is UNSAT
Problem TDEAD1078 is UNSAT
Problem TDEAD1085 is UNSAT
Problem TDEAD1089 is UNSAT
Problem TDEAD1095 is UNSAT
Problem TDEAD1105 is UNSAT
Problem TDEAD1115 is UNSAT
Problem TDEAD1125 is UNSAT
Problem TDEAD1135 is UNSAT
Problem TDEAD1145 is UNSAT
Problem TDEAD1146 is UNSAT
Problem TDEAD1156 is UNSAT
Problem TDEAD1166 is UNSAT
Problem TDEAD1167 is UNSAT
Problem TDEAD1176 is UNSAT
Problem TDEAD1178 is UNSAT
Problem TDEAD1186 is UNSAT
Problem TDEAD1189 is UNSAT
Problem TDEAD1196 is UNSAT
Problem TDEAD1206 is UNSAT
Problem TDEAD1216 is UNSAT
Problem TDEAD1226 is UNSAT
Problem TDEAD1236 is UNSAT
Problem TDEAD1245 is UNSAT
Problem TDEAD1247 is UNSAT
Problem TDEAD1256 is UNSAT
Problem TDEAD1257 is UNSAT
Problem TDEAD1267 is UNSAT
Problem TDEAD1277 is UNSAT
Problem TDEAD1278 is UNSAT
Problem TDEAD1287 is UNSAT
Problem TDEAD1289 is UNSAT
Problem TDEAD1297 is UNSAT
Problem TDEAD1307 is UNSAT
Problem TDEAD1317 is UNSAT
Problem TDEAD1327 is UNSAT
Problem TDEAD1337 is UNSAT
Problem TDEAD1345 is UNSAT
Problem TDEAD1348 is UNSAT
Problem TDEAD1356 is UNSAT
Problem TDEAD1358 is UNSAT
Problem TDEAD1367 is UNSAT
Problem TDEAD1368 is UNSAT
Problem TDEAD1378 is UNSAT
Problem TDEAD1388 is UNSAT
Problem TDEAD1389 is UNSAT
Problem TDEAD1398 is UNSAT
Problem TDEAD1408 is UNSAT
Problem TDEAD1418 is UNSAT
Problem TDEAD1428 is UNSAT
Problem TDEAD1438 is UNSAT
Problem TDEAD1445 is UNSAT
Problem TDEAD1449 is UNSAT
Problem TDEAD1456 is UNSAT
Problem TDEAD1459 is UNSAT
Problem TDEAD1467 is UNSAT
Problem TDEAD1469 is UNSAT
Problem TDEAD1478 is UNSAT
Problem TDEAD1479 is UNSAT
Problem TDEAD1489 is UNSAT
Problem TDEAD1499 is UNSAT
Problem TDEAD1509 is UNSAT
Problem TDEAD1519 is UNSAT
Problem TDEAD1529 is UNSAT
Problem TDEAD1539 is UNSAT
Problem TDEAD1545 is UNSAT
Problem TDEAD1556 is UNSAT
Problem TDEAD1567 is UNSAT
Problem TDEAD1578 is UNSAT
Problem TDEAD1589 is UNSAT
Problem TDEAD1645 is UNSAT
Problem TDEAD1656 is UNSAT
Problem TDEAD1667 is UNSAT
Problem TDEAD1678 is UNSAT
Problem TDEAD1689 is UNSAT
Problem TDEAD1745 is UNSAT
Problem TDEAD1756 is UNSAT
Problem TDEAD1767 is UNSAT
Problem TDEAD1778 is UNSAT
Problem TDEAD1789 is UNSAT
Problem TDEAD1845 is UNSAT
Problem TDEAD1856 is UNSAT
Problem TDEAD1867 is UNSAT
Problem TDEAD1878 is UNSAT
Problem TDEAD1889 is UNSAT
Problem TDEAD1945 is UNSAT
Problem TDEAD1956 is UNSAT
Problem TDEAD1967 is UNSAT
Problem TDEAD1978 is UNSAT
Problem TDEAD1989 is UNSAT
At refinement iteration 1 (INCLUDED_ONLY) 0/170 variables, 9/39 constraints. Problems are: Problem set: 380 solved, 1840 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/170 variables, 0/39 constraints. Problems are: Problem set: 380 solved, 1840 unsolved
At refinement iteration 3 (OVERLAPS) 1905/2075 variables, 170/209 constraints. Problems are: Problem set: 380 solved, 1840 unsolved
SMT process timed out in 34930ms, After SMT, problems are : Problem set: 380 solved, 1840 unsolved
Search for dead transitions found 380 dead transitions in 34990ms
Found 380 dead transitions using SMT.
Drop transitions (Dead Transitions using SMT only with invariants) removed 380 transitions
Dead transitions reduction (with SMT) triggered by suspicious arc values removed 380 transitions.
// Phase 1: matrix 1885 rows 170 cols
[2024-06-01 13:14:42] [INFO ] Computed 39 invariants in 32 ms
[2024-06-01 13:14:42] [INFO ] Implicit Places using invariants in 118 ms returned []
[2024-06-01 13:14:42] [INFO ] Invariant cache hit.
[2024-06-01 13:14:43] [INFO ] State equation strengthened by 1010 read => feed constraints.
[2024-06-01 13:14:44] [INFO ] Implicit Places using invariants and state equation in 1921 ms returned []
Implicit Place search using SMT with State Equation took 2051 ms to find 0 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 170/170 places, 1885/2265 transitions.
Applied a total of 0 rules in 23 ms. Remains 170 /170 variables (removed 0) and now considering 1885/1885 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 37170 ms. Remains : 170/170 places, 1885/2265 transitions.
Support contains 170 out of 170 places after structural reductions.
[2024-06-01 13:14:45] [INFO ] Flatten gal took : 483 ms
[2024-06-01 13:14:49] [INFO ] Flatten gal took : 519 ms
[2024-06-01 13:14:53] [INFO ] Input system was already deterministic with 1885 transitions.
Reduction of identical properties reduced properties to check from 24 to 18
RANDOM walk for 40000 steps (4770 resets) in 1961 ms. (20 steps per ms) remains 3/18 properties
BEST_FIRST walk for 40004 steps (552 resets) in 1054 ms. (37 steps per ms) remains 3/3 properties
BEST_FIRST walk for 40004 steps (485 resets) in 709 ms. (56 steps per ms) remains 3/3 properties
BEST_FIRST walk for 40003 steps (484 resets) in 155 ms. (256 steps per ms) remains 3/3 properties
[2024-06-01 13:14:55] [INFO ] Invariant cache hit.
[2024-06-01 13:14:55] [INFO ] State equation strengthened by 1010 read => feed constraints.
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/170 variables, 9/9 constraints. Problems are: Problem set: 0 solved, 3 unsolved
Problem AtomicPropp7 is UNSAT
Problem AtomicPropp14 is UNSAT
Problem AtomicPropp20 is UNSAT
After SMT solving in domain Real declared 170/2055 variables, and 39 constraints, problems are : Problem set: 3 solved, 0 unsolved in 453 ms.
Refiners :[Positive P Invariants (semi-flows): 9/9 constraints, Generalized P Invariants (flows): 30/30 constraints, State Equation: 0/170 constraints, ReadFeed: 0/1010 constraints, PredecessorRefiner: 0/0 constraints, Known Traps: 0/0 constraints]
After SMT, in 793ms problems are : Problem set: 3 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 3 atomic propositions for a total of 15 simplifications.
[2024-06-01 13:14:56] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2024-06-01 13:14:56] [INFO ] Flatten gal took : 538 ms
FORMULA PhilosophersDyn-COL-10-CTLFireability-2024-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 13:15:00] [INFO ] Flatten gal took : 460 ms
[2024-06-01 13:15:04] [INFO ] Input system was already deterministic with 1885 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 170/170 places, 1885/1885 transitions.
Applied a total of 0 rules in 6 ms. Remains 170 /170 variables (removed 0) and now considering 1885/1885 (removed 0) transitions.
Running 1840 sub problems to find dead transitions.
[2024-06-01 13:15:04] [INFO ] Invariant cache hit.
[2024-06-01 13:15:04] [INFO ] State equation strengthened by 1010 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/170 variables, 9/9 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/170 variables, 30/39 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/170 variables, 0/39 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
At refinement iteration 3 (OVERLAPS) 1885/2055 variables, 170/209 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
SMT process timed out in 34836ms, After SMT, problems are : Problem set: 0 solved, 1840 unsolved
Search for dead transitions found 0 dead transitions in 34882ms
Finished structural reductions in LTL mode , in 1 iterations and 34909 ms. Remains : 170/170 places, 1885/1885 transitions.
[2024-06-01 13:15:39] [INFO ] Flatten gal took : 135 ms
[2024-06-01 13:15:40] [INFO ] Flatten gal took : 165 ms
[2024-06-01 13:15:40] [INFO ] Input system was already deterministic with 1885 transitions.
Starting structural reductions in LTL mode, iteration 0 : 170/170 places, 1885/1885 transitions.
Applied a total of 0 rules in 53 ms. Remains 170 /170 variables (removed 0) and now considering 1885/1885 (removed 0) transitions.
Running 1840 sub problems to find dead transitions.
[2024-06-01 13:15:40] [INFO ] Invariant cache hit.
[2024-06-01 13:15:40] [INFO ] State equation strengthened by 1010 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/170 variables, 9/9 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/170 variables, 30/39 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/170 variables, 0/39 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
Error getting values : (error "ParserException while parsing response: (timeout
org.smtlib.IParser$ParserException: Unbalanced parentheses at end of input")
At refinement iteration 3 (OVERLAPS) 1885/2055 variables, 170/209 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
SMT process timed out in 33669ms, After SMT, problems are : Problem set: 0 solved, 1840 unsolved
Search for dead transitions found 0 dead transitions in 33711ms
Finished structural reductions in LTL mode , in 1 iterations and 33784 ms. Remains : 170/170 places, 1885/1885 transitions.
[2024-06-01 13:16:14] [INFO ] Flatten gal took : 75 ms
[2024-06-01 13:16:14] [INFO ] Flatten gal took : 84 ms
[2024-06-01 13:16:14] [INFO ] Input system was already deterministic with 1885 transitions.
Starting structural reductions in LTL mode, iteration 0 : 170/170 places, 1885/1885 transitions.
Applied a total of 0 rules in 6 ms. Remains 170 /170 variables (removed 0) and now considering 1885/1885 (removed 0) transitions.
Running 1840 sub problems to find dead transitions.
[2024-06-01 13:16:14] [INFO ] Invariant cache hit.
[2024-06-01 13:16:14] [INFO ] State equation strengthened by 1010 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/170 variables, 9/9 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/170 variables, 30/39 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/170 variables, 0/39 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
At refinement iteration 3 (OVERLAPS) 1885/2055 variables, 170/209 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
SMT process timed out in 33955ms, After SMT, problems are : Problem set: 0 solved, 1840 unsolved
Search for dead transitions found 0 dead transitions in 33975ms
Finished structural reductions in LTL mode , in 1 iterations and 33986 ms. Remains : 170/170 places, 1885/1885 transitions.
[2024-06-01 13:16:48] [INFO ] Flatten gal took : 82 ms
[2024-06-01 13:16:48] [INFO ] Flatten gal took : 140 ms
[2024-06-01 13:16:48] [INFO ] Input system was already deterministic with 1885 transitions.
Starting structural reductions in LTL mode, iteration 0 : 170/170 places, 1885/1885 transitions.
Applied a total of 0 rules in 22 ms. Remains 170 /170 variables (removed 0) and now considering 1885/1885 (removed 0) transitions.
Running 1840 sub problems to find dead transitions.
[2024-06-01 13:16:49] [INFO ] Invariant cache hit.
[2024-06-01 13:16:49] [INFO ] State equation strengthened by 1010 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/170 variables, 9/9 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/170 variables, 30/39 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/170 variables, 0/39 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
At refinement iteration 3 (OVERLAPS) 1885/2055 variables, 170/209 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
SMT process timed out in 34160ms, After SMT, problems are : Problem set: 0 solved, 1840 unsolved
Search for dead transitions found 0 dead transitions in 34180ms
Finished structural reductions in LTL mode , in 1 iterations and 34210 ms. Remains : 170/170 places, 1885/1885 transitions.
[2024-06-01 13:17:23] [INFO ] Flatten gal took : 137 ms
[2024-06-01 13:17:23] [INFO ] Flatten gal took : 162 ms
[2024-06-01 13:17:23] [INFO ] Input system was already deterministic with 1885 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 170/170 places, 1885/1885 transitions.
Applied a total of 0 rules in 187 ms. Remains 170 /170 variables (removed 0) and now considering 1885/1885 (removed 0) transitions.
Running 1840 sub problems to find dead transitions.
[2024-06-01 13:17:24] [INFO ] Invariant cache hit.
[2024-06-01 13:17:24] [INFO ] State equation strengthened by 1010 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/170 variables, 9/9 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/170 variables, 30/39 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/170 variables, 0/39 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
At refinement iteration 3 (OVERLAPS) 1885/2055 variables, 170/209 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
SMT process timed out in 32597ms, After SMT, problems are : Problem set: 0 solved, 1840 unsolved
Search for dead transitions found 0 dead transitions in 32615ms
Finished structural reductions in SI_CTL mode , in 1 iterations and 32806 ms. Remains : 170/170 places, 1885/1885 transitions.
[2024-06-01 13:17:56] [INFO ] Flatten gal took : 123 ms
[2024-06-01 13:17:57] [INFO ] Flatten gal took : 126 ms
[2024-06-01 13:17:57] [INFO ] Input system was already deterministic with 1885 transitions.
RANDOM walk for 928 steps (108 resets) in 24 ms. (37 steps per ms) remains 0/1 properties
FORMULA PhilosophersDyn-COL-10-CTLFireability-2024-04 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 170/170 places, 1885/1885 transitions.
Applied a total of 0 rules in 7 ms. Remains 170 /170 variables (removed 0) and now considering 1885/1885 (removed 0) transitions.
Running 1840 sub problems to find dead transitions.
[2024-06-01 13:17:57] [INFO ] Invariant cache hit.
[2024-06-01 13:17:57] [INFO ] State equation strengthened by 1010 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/170 variables, 9/9 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/170 variables, 30/39 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/170 variables, 0/39 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
Error getting values : (error "ParserException while parsing response: (timeout
org.smtlib.IParser$ParserException: Unbalanced parentheses at end of input")
At refinement iteration 3 (OVERLAPS) 1885/2055 variables, 170/209 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
SMT process timed out in 35689ms, After SMT, problems are : Problem set: 0 solved, 1840 unsolved
Search for dead transitions found 0 dead transitions in 35721ms
Finished structural reductions in LTL mode , in 1 iterations and 35736 ms. Remains : 170/170 places, 1885/1885 transitions.
[2024-06-01 13:18:33] [INFO ] Flatten gal took : 119 ms
[2024-06-01 13:18:33] [INFO ] Flatten gal took : 138 ms
[2024-06-01 13:18:33] [INFO ] Input system was already deterministic with 1885 transitions.
Starting structural reductions in LTL mode, iteration 0 : 170/170 places, 1885/1885 transitions.
Applied a total of 0 rules in 8 ms. Remains 170 /170 variables (removed 0) and now considering 1885/1885 (removed 0) transitions.
Running 1840 sub problems to find dead transitions.
[2024-06-01 13:18:33] [INFO ] Invariant cache hit.
[2024-06-01 13:18:33] [INFO ] State equation strengthened by 1010 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/170 variables, 9/9 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/170 variables, 30/39 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/170 variables, 0/39 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
At refinement iteration 3 (OVERLAPS) 1885/2055 variables, 170/209 constraints. Problems are: Problem set: 0 solved, 1840 unsolved
SMT process timed out in 34241ms, After SMT, problems are : Problem set: 0 solved, 1840 unsolved
Search for dead transitions found 0 dead transitions in 34263ms
Finished structural reductions in LTL mode , in 1 iterations and 34276 ms. Remains : 170/170 places, 1885/1885 transitions.
[2024-06-01 13:19:08] [INFO ] Flatten gal took : 86 ms
[2024-06-01 13:19:08] [INFO ] Flatten gal took : 99 ms
[2024-06-01 13:19:08] [INFO ] Input system was already deterministic with 1885 transitions.
Starting structural reductions in LTL mode, iteration 0 : 170/170 places, 1885/1885 transitions.
Applied a total of 0 rules in 6 ms. Remains 170 /170 variables (removed 0) and now considering 1885/1885 (removed 0) transitions.
Running 1840 sub problems to find dead transitions.
[2024-06-01 13:19:08] [INFO ] Invariant cache hit.
[2024-06-01 13:19:08] [INFO ] State equation strengthened by 1010 read => feed constraints.
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : PhilosophersDyn-COL-10-CTLFireability-2024-00
Could not compute solution for formula : PhilosophersDyn-COL-10-CTLFireability-2024-01
Could not compute solution for formula : PhilosophersDyn-COL-10-CTLFireability-2024-02
Could not compute solution for formula : PhilosophersDyn-COL-10-CTLFireability-2024-03
Could not compute solution for formula : PhilosophersDyn-COL-10-CTLFireability-2024-04
Could not compute solution for formula : PhilosophersDyn-COL-10-CTLFireability-2024-05
Could not compute solution for formula : PhilosophersDyn-COL-10-CTLFireability-2024-06
Could not compute solution for formula : PhilosophersDyn-COL-10-CTLFireability-2024-07
Could not compute solution for formula : PhilosophersDyn-COL-10-CTLFireability-2024-08
Could not compute solution for formula : PhilosophersDyn-COL-10-CTLFireability-2024-09
Could not compute solution for formula : PhilosophersDyn-COL-10-CTLFireability-2024-10
Could not compute solution for formula : PhilosophersDyn-COL-10-CTLFireability-2024-11
Could not compute solution for formula : PhilosophersDyn-COL-10-CTLFireability-2024-12
Could not compute solution for formula : PhilosophersDyn-COL-10-CTLFireability-2024-13
Could not compute solution for formula : PhilosophersDyn-COL-10-CTLFireability-2024-14
Could not compute solution for formula : PhilosophersDyn-COL-10-CTLFireability-2024-15

BK_STOP 1717247959896

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name PhilosophersDyn-COL-10-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/581/ctl_0_
ctl formula name PhilosophersDyn-COL-10-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/581/ctl_1_
ctl formula name PhilosophersDyn-COL-10-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/581/ctl_2_
ctl formula name PhilosophersDyn-COL-10-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/581/ctl_3_
ctl formula name PhilosophersDyn-COL-10-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/581/ctl_4_
ctl formula name PhilosophersDyn-COL-10-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/581/ctl_5_
ctl formula name PhilosophersDyn-COL-10-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/581/ctl_6_
ctl formula name PhilosophersDyn-COL-10-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/581/ctl_7_
ctl formula name PhilosophersDyn-COL-10-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/581/ctl_8_
ctl formula name PhilosophersDyn-COL-10-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/581/ctl_9_
ctl formula name PhilosophersDyn-COL-10-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/581/ctl_10_
ctl formula name PhilosophersDyn-COL-10-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/581/ctl_11_
ctl formula name PhilosophersDyn-COL-10-CTLFireability-2024-12
ctl formula formula --ctl=/tmp/581/ctl_12_
ctl formula name PhilosophersDyn-COL-10-CTLFireability-2024-13
ctl formula formula --ctl=/tmp/581/ctl_13_
ctl formula name PhilosophersDyn-COL-10-CTLFireability-2024-14
ctl formula formula --ctl=/tmp/581/ctl_14_
ctl formula name PhilosophersDyn-COL-10-CTLFireability-2024-15
ctl formula formula --ctl=/tmp/581/ctl_15_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PhilosophersDyn-COL-10"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is PhilosophersDyn-COL-10, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r516-tajo-171654446200010"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/PhilosophersDyn-COL-10.tgz
mv PhilosophersDyn-COL-10 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;