fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r512-smll-171654407100194
Last Updated
July 7, 2024

About the Execution of LTSMin+red for PermAdmissibility-PT-50

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
820.563 74496.00 107562.00 341.70 ????F??????????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r512-smll-171654407100194.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is PermAdmissibility-PT-50, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r512-smll-171654407100194
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.7M
-rw-r--r-- 1 mcc users 9.3K Apr 12 09:07 CTLCardinality.txt
-rw-r--r-- 1 mcc users 81K Apr 12 09:07 CTLCardinality.xml
-rw-r--r-- 1 mcc users 56K Apr 12 09:05 CTLFireability.txt
-rw-r--r-- 1 mcc users 296K Apr 12 09:05 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 5.3K Apr 23 07:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 33K Apr 23 07:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 13K Apr 23 07:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 53K Apr 23 07:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Apr 12 09:15 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 108K Apr 12 09:15 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 98K Apr 12 09:14 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 501K Apr 12 09:14 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Apr 23 07:42 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.6K Apr 23 07:42 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 340K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-PT-50-CTLFireability-2024-00
FORMULA_NAME PermAdmissibility-PT-50-CTLFireability-2024-01
FORMULA_NAME PermAdmissibility-PT-50-CTLFireability-2024-02
FORMULA_NAME PermAdmissibility-PT-50-CTLFireability-2024-03
FORMULA_NAME PermAdmissibility-PT-50-CTLFireability-2024-04
FORMULA_NAME PermAdmissibility-PT-50-CTLFireability-2024-05
FORMULA_NAME PermAdmissibility-PT-50-CTLFireability-2024-06
FORMULA_NAME PermAdmissibility-PT-50-CTLFireability-2024-07
FORMULA_NAME PermAdmissibility-PT-50-CTLFireability-2024-08
FORMULA_NAME PermAdmissibility-PT-50-CTLFireability-2024-09
FORMULA_NAME PermAdmissibility-PT-50-CTLFireability-2024-10
FORMULA_NAME PermAdmissibility-PT-50-CTLFireability-2024-11
FORMULA_NAME PermAdmissibility-PT-50-CTLFireability-2024-12
FORMULA_NAME PermAdmissibility-PT-50-CTLFireability-2024-13
FORMULA_NAME PermAdmissibility-PT-50-CTLFireability-2024-14
FORMULA_NAME PermAdmissibility-PT-50-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717256791070

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=PermAdmissibility-PT-50
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 15:46:33] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 15:46:33] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 15:46:34] [INFO ] Load time of PNML (sax parser for PT used): 348 ms
[2024-06-01 15:46:34] [INFO ] Transformed 168 places.
[2024-06-01 15:46:34] [INFO ] Transformed 592 transitions.
[2024-06-01 15:46:34] [INFO ] Parsed PT model containing 168 places and 592 transitions and 3456 arcs in 593 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 68 ms.
Support contains 104 out of 168 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 168/168 places, 592/592 transitions.
Reduce places removed 64 places and 0 transitions.
Iterating post reduction 0 with 64 rules applied. Total rules applied 64 place count 104 transition count 592
Applied a total of 64 rules in 61 ms. Remains 104 /168 variables (removed 64) and now considering 592/592 (removed 0) transitions.
// Phase 1: matrix 592 rows 104 cols
[2024-06-01 15:46:34] [INFO ] Computed 16 invariants in 67 ms
[2024-06-01 15:46:35] [INFO ] Implicit Places using invariants in 441 ms returned []
[2024-06-01 15:46:35] [INFO ] Invariant cache hit.
[2024-06-01 15:46:35] [INFO ] Implicit Places using invariants and state equation in 542 ms returned []
Implicit Place search using SMT with State Equation took 1060 ms to find 0 implicit places.
Running 588 sub problems to find dead transitions.
[2024-06-01 15:46:35] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/103 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/103 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 2 (OVERLAPS) 1/104 variables, 13/16 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/104 variables, 0/16 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 4 (OVERLAPS) 592/696 variables, 104/120 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/696 variables, 0/120 constraints. Problems are: Problem set: 0 solved, 588 unsolved
Error getting values : (error "ParserException while parsing response: ((s0 1.0)
(s1 0.0)
(s2 1.0)
(s3 1.0)
(s4 1.0)
(s5 1.0)
(s6 0.0)
(s7 1.0)
(s8 1.0)
(s9 2.0)
(s10 1.0)
(s11 1.0)
(s12 2.0)
(s13 1.0)
(s14 1.0)
(s15 0.0)
(s16 1.0)
(s17 0.0)
(s18 1.0)
(s19 1.0)
(s20 1.0)
(s21 1.0)
(s22 1.0)
(s23 1.0)
(s24 1.0)
(s25 1.0)
(s26 1.0)
(s27 1.0)
(s28 1.0)
(s29 1.0)
(s30 0.0)
(s31 1.0)
(s32 4.0)
(s33 2.0)
(s34 1.0)
(s35 3.0)
(s36 1.0)
(s37 1.0)
(s38 1.0)
(s39 1.0)
(s40 1.0)
(s41 1.0)
(s42 4.0)
(s43 1.0)
(s44 8.0)
(s45 1.0)
(s46 1.0)
(s47 26.0)
(s48 1.0)
(s49 37.0)
(s50 1.0)
(s51 8.0)
(s52 36.0)
(s53 1.0)
(s54 1.0)
(s55 1.0)
(s56 1.0)
(s57 1.0)
(s58 30.0)
(s59 1.0)
(s60 2.0)
(s61 1.0)
(s62 1.0)
(s63 1.0)
(s64 1.0)
(s65 1.0)
(s66 40.0)
(s67 1.0)
(s68 1.0)
(s69 1.0)
(s70 39.0)
(s71 1.0)
(s72 timeout
org.smtlib.IParser$ParserException: Unbalanced parentheses at end of input")
At refinement iteration 6 (OVERLAPS) 0/696 variables, 0/120 constraints. Problems are: Problem set: 0 solved, 588 unsolved
No progress, stopping.
After SMT solving in domain Real declared 696/696 variables, and 120 constraints, problems are : Problem set: 0 solved, 588 unsolved in 30064 ms.
Refiners :[Generalized P Invariants (flows): 16/16 constraints, State Equation: 104/104 constraints, PredecessorRefiner: 588/588 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 588 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/103 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/103 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 2 (OVERLAPS) 1/104 variables, 13/16 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/104 variables, 0/16 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 4 (OVERLAPS) 592/696 variables, 104/120 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/696 variables, 588/708 constraints. Problems are: Problem set: 0 solved, 588 unsolved
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 696/696 variables, and 708 constraints, problems are : Problem set: 0 solved, 588 unsolved in 30037 ms.
Refiners :[Generalized P Invariants (flows): 16/16 constraints, State Equation: 104/104 constraints, PredecessorRefiner: 588/588 constraints, Known Traps: 0/0 constraints]
After SMT, in 62455ms problems are : Problem set: 0 solved, 588 unsolved
Search for dead transitions found 0 dead transitions in 62526ms
Starting structural reductions in LTL mode, iteration 1 : 104/168 places, 592/592 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 63708 ms. Remains : 104/168 places, 592/592 transitions.
Support contains 104 out of 104 places after structural reductions.
[2024-06-01 15:47:39] [INFO ] Flatten gal took : 295 ms
[2024-06-01 15:47:39] [INFO ] Flatten gal took : 111 ms
[2024-06-01 15:47:40] [INFO ] Input system was already deterministic with 592 transitions.
Reduction of identical properties reduced properties to check from 70 to 68
RANDOM walk for 40060 steps (48 resets) in 1254 ms. (31 steps per ms) remains 9/68 properties
BEST_FIRST walk for 40004 steps (8 resets) in 3479 ms. (11 steps per ms) remains 5/9 properties
BEST_FIRST walk for 40004 steps (8 resets) in 517 ms. (77 steps per ms) remains 3/5 properties
BEST_FIRST walk for 40004 steps (8 resets) in 136 ms. (292 steps per ms) remains 1/3 properties
BEST_FIRST walk for 6160 steps (0 resets) in 17 ms. (342 steps per ms) remains 0/1 properties
[2024-06-01 15:47:41] [INFO ] Flatten gal took : 68 ms
[2024-06-01 15:47:42] [INFO ] Flatten gal took : 73 ms
[2024-06-01 15:47:42] [INFO ] Input system was already deterministic with 592 transitions.
Computed a total of 104 stabilizing places and 592 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 104 transition count 592
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 2 formulas.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Applied a total of 0 rules in 12 ms. Remains 104 /104 variables (removed 0) and now considering 592/592 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12 ms. Remains : 104/104 places, 592/592 transitions.
[2024-06-01 15:47:42] [INFO ] Flatten gal took : 34 ms
[2024-06-01 15:47:42] [INFO ] Flatten gal took : 37 ms
[2024-06-01 15:47:42] [INFO ] Input system was already deterministic with 592 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 26 places :
Symmetric choice reduction at 0 with 26 rule applications. Total rules 26 place count 78 transition count 344
Iterating global reduction 0 with 26 rules applied. Total rules applied 52 place count 78 transition count 344
Applied a total of 52 rules in 26 ms. Remains 78 /104 variables (removed 26) and now considering 344/592 (removed 248) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 26 ms. Remains : 78/104 places, 344/592 transitions.
[2024-06-01 15:47:42] [INFO ] Flatten gal took : 19 ms
[2024-06-01 15:47:42] [INFO ] Flatten gal took : 21 ms
[2024-06-01 15:47:42] [INFO ] Input system was already deterministic with 344 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Graph (complete) has 975 edges and 104 vertex of which 86 are kept as prefixes of interest. Removing 18 places using SCC suffix rule.6 ms
Discarding 18 places :
Also discarding 128 output transitions
Drop transitions (Output transitions of discarded places.) removed 128 transitions
Applied a total of 1 rules in 48 ms. Remains 86 /104 variables (removed 18) and now considering 464/592 (removed 128) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 48 ms. Remains : 86/104 places, 464/592 transitions.
[2024-06-01 15:47:42] [INFO ] Flatten gal took : 23 ms
[2024-06-01 15:47:42] [INFO ] Flatten gal took : 28 ms
[2024-06-01 15:47:42] [INFO ] Input system was already deterministic with 464 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 26 places :
Symmetric choice reduction at 0 with 26 rule applications. Total rules 26 place count 78 transition count 344
Iterating global reduction 0 with 26 rules applied. Total rules applied 52 place count 78 transition count 344
Applied a total of 52 rules in 7 ms. Remains 78 /104 variables (removed 26) and now considering 344/592 (removed 248) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 78/104 places, 344/592 transitions.
[2024-06-01 15:47:42] [INFO ] Flatten gal took : 17 ms
[2024-06-01 15:47:42] [INFO ] Flatten gal took : 18 ms
[2024-06-01 15:47:43] [INFO ] Input system was already deterministic with 344 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Graph (complete) has 975 edges and 104 vertex of which 0 are kept as prefixes of interest. Removing 104 places using SCC suffix rule.3 ms
Discarding 104 places :
Also discarding 592 output transitions
Drop transitions (Output transitions of discarded places.) removed 592 transitions
Applied a total of 1 rules in 5 ms. Remains 0 /104 variables (removed 104) and now considering 0/592 (removed 592) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 0/104 places, 0/592 transitions.
[2024-06-01 15:47:43] [INFO ] Removed 1 GAL types that were empty due to variable simplifications.
petri,
[2024-06-01 15:47:43] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2024-06-01 15:47:43] [INFO ] Flatten gal took : 2 ms
FORMULA PermAdmissibility-PT-50-CTLFireability-2024-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 15:47:43] [INFO ] Flatten gal took : 0 ms
[2024-06-01 15:47:43] [INFO ] Input system was already deterministic with 0 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 13 places :
Symmetric choice reduction at 0 with 13 rule applications. Total rules 13 place count 91 transition count 468
Iterating global reduction 0 with 13 rules applied. Total rules applied 26 place count 91 transition count 468
Applied a total of 26 rules in 6 ms. Remains 91 /104 variables (removed 13) and now considering 468/592 (removed 124) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 91/104 places, 468/592 transitions.
[2024-06-01 15:47:43] [INFO ] Flatten gal took : 35 ms
[2024-06-01 15:47:43] [INFO ] Flatten gal took : 39 ms
[2024-06-01 15:47:43] [INFO ] Input system was already deterministic with 468 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Graph (complete) has 975 edges and 104 vertex of which 86 are kept as prefixes of interest. Removing 18 places using SCC suffix rule.4 ms
Discarding 18 places :
Also discarding 128 output transitions
Drop transitions (Output transitions of discarded places.) removed 128 transitions
Applied a total of 1 rules in 33 ms. Remains 86 /104 variables (removed 18) and now considering 464/592 (removed 128) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 33 ms. Remains : 86/104 places, 464/592 transitions.
[2024-06-01 15:47:43] [INFO ] Flatten gal took : 22 ms
[2024-06-01 15:47:43] [INFO ] Flatten gal took : 25 ms
[2024-06-01 15:47:43] [INFO ] Input system was already deterministic with 464 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Applied a total of 0 rules in 4 ms. Remains 104 /104 variables (removed 0) and now considering 592/592 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 104/104 places, 592/592 transitions.
[2024-06-01 15:47:43] [INFO ] Flatten gal took : 31 ms
[2024-06-01 15:47:43] [INFO ] Flatten gal took : 36 ms
[2024-06-01 15:47:43] [INFO ] Input system was already deterministic with 592 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 26 places :
Symmetric choice reduction at 0 with 26 rule applications. Total rules 26 place count 78 transition count 344
Iterating global reduction 0 with 26 rules applied. Total rules applied 52 place count 78 transition count 344
Discarding 22 places :
Symmetric choice reduction at 0 with 22 rule applications. Total rules 74 place count 56 transition count 122
Iterating global reduction 0 with 22 rules applied. Total rules applied 96 place count 56 transition count 122
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 99 place count 53 transition count 98
Iterating global reduction 0 with 3 rules applied. Total rules applied 102 place count 53 transition count 98
Applied a total of 102 rules in 19 ms. Remains 53 /104 variables (removed 51) and now considering 98/592 (removed 494) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 19 ms. Remains : 53/104 places, 98/592 transitions.
[2024-06-01 15:47:43] [INFO ] Flatten gal took : 6 ms
[2024-06-01 15:47:43] [INFO ] Flatten gal took : 7 ms
[2024-06-01 15:47:43] [INFO ] Input system was already deterministic with 98 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 20 places :
Symmetric choice reduction at 0 with 20 rule applications. Total rules 20 place count 84 transition count 372
Iterating global reduction 0 with 20 rules applied. Total rules applied 40 place count 84 transition count 372
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 46 place count 78 transition count 284
Iterating global reduction 0 with 6 rules applied. Total rules applied 52 place count 78 transition count 284
Applied a total of 52 rules in 27 ms. Remains 78 /104 variables (removed 26) and now considering 284/592 (removed 308) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 27 ms. Remains : 78/104 places, 284/592 transitions.
[2024-06-01 15:47:43] [INFO ] Flatten gal took : 15 ms
[2024-06-01 15:47:43] [INFO ] Flatten gal took : 17 ms
[2024-06-01 15:47:43] [INFO ] Input system was already deterministic with 284 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Graph (complete) has 975 edges and 104 vertex of which 50 are kept as prefixes of interest. Removing 54 places using SCC suffix rule.3 ms
Discarding 54 places :
Also discarding 384 output transitions
Drop transitions (Output transitions of discarded places.) removed 384 transitions
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 13 place count 38 transition count 88
Iterating global reduction 0 with 12 rules applied. Total rules applied 25 place count 38 transition count 88
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 30 place count 33 transition count 54
Iterating global reduction 0 with 5 rules applied. Total rules applied 35 place count 33 transition count 54
Applied a total of 35 rules in 10 ms. Remains 33 /104 variables (removed 71) and now considering 54/592 (removed 538) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 33/104 places, 54/592 transitions.
[2024-06-01 15:47:43] [INFO ] Flatten gal took : 3 ms
[2024-06-01 15:47:43] [INFO ] Flatten gal took : 3 ms
[2024-06-01 15:47:43] [INFO ] Input system was already deterministic with 54 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 17 places :
Symmetric choice reduction at 0 with 17 rule applications. Total rules 17 place count 87 transition count 394
Iterating global reduction 0 with 17 rules applied. Total rules applied 34 place count 87 transition count 394
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 38 place count 83 transition count 334
Iterating global reduction 0 with 4 rules applied. Total rules applied 42 place count 83 transition count 334
Applied a total of 42 rules in 8 ms. Remains 83 /104 variables (removed 21) and now considering 334/592 (removed 258) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 83/104 places, 334/592 transitions.
[2024-06-01 15:47:43] [INFO ] Flatten gal took : 17 ms
[2024-06-01 15:47:43] [INFO ] Flatten gal took : 18 ms
[2024-06-01 15:47:43] [INFO ] Input system was already deterministic with 334 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 24 places :
Symmetric choice reduction at 0 with 24 rule applications. Total rules 24 place count 80 transition count 352
Iterating global reduction 0 with 24 rules applied. Total rules applied 48 place count 80 transition count 352
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 58 place count 70 transition count 220
Iterating global reduction 0 with 10 rules applied. Total rules applied 68 place count 70 transition count 220
Applied a total of 68 rules in 6 ms. Remains 70 /104 variables (removed 34) and now considering 220/592 (removed 372) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 70/104 places, 220/592 transitions.
[2024-06-01 15:47:43] [INFO ] Flatten gal took : 12 ms
[2024-06-01 15:47:43] [INFO ] Flatten gal took : 13 ms
[2024-06-01 15:47:43] [INFO ] Input system was already deterministic with 220 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 24 places :
Symmetric choice reduction at 0 with 24 rule applications. Total rules 24 place count 80 transition count 352
Iterating global reduction 0 with 24 rules applied. Total rules applied 48 place count 80 transition count 352
Discarding 18 places :
Symmetric choice reduction at 0 with 18 rule applications. Total rules 66 place count 62 transition count 146
Iterating global reduction 0 with 18 rules applied. Total rules applied 84 place count 62 transition count 146
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 85 place count 61 transition count 138
Iterating global reduction 0 with 1 rules applied. Total rules applied 86 place count 61 transition count 138
Applied a total of 86 rules in 8 ms. Remains 61 /104 variables (removed 43) and now considering 138/592 (removed 454) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 61/104 places, 138/592 transitions.
[2024-06-01 15:47:43] [INFO ] Flatten gal took : 7 ms
[2024-06-01 15:47:43] [INFO ] Flatten gal took : 8 ms
[2024-06-01 15:47:43] [INFO ] Input system was already deterministic with 138 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 24 places :
Symmetric choice reduction at 0 with 24 rule applications. Total rules 24 place count 80 transition count 352
Iterating global reduction 0 with 24 rules applied. Total rules applied 48 place count 80 transition count 352
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 55 place count 73 transition count 258
Iterating global reduction 0 with 7 rules applied. Total rules applied 62 place count 73 transition count 258
Applied a total of 62 rules in 5 ms. Remains 73 /104 variables (removed 31) and now considering 258/592 (removed 334) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 73/104 places, 258/592 transitions.
[2024-06-01 15:47:43] [INFO ] Flatten gal took : 14 ms
[2024-06-01 15:47:43] [INFO ] Flatten gal took : 12 ms
[2024-06-01 15:47:44] [INFO ] Input system was already deterministic with 258 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Graph (complete) has 975 edges and 104 vertex of which 86 are kept as prefixes of interest. Removing 18 places using SCC suffix rule.3 ms
Discarding 18 places :
Also discarding 128 output transitions
Drop transitions (Output transitions of discarded places.) removed 128 transitions
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 12 place count 75 transition count 348
Iterating global reduction 0 with 11 rules applied. Total rules applied 23 place count 75 transition count 348
Discarding 16 places :
Symmetric choice reduction at 0 with 16 rule applications. Total rules 39 place count 59 transition count 156
Iterating global reduction 0 with 16 rules applied. Total rules applied 55 place count 59 transition count 156
Applied a total of 55 rules in 17 ms. Remains 59 /104 variables (removed 45) and now considering 156/592 (removed 436) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 17 ms. Remains : 59/104 places, 156/592 transitions.
[2024-06-01 15:47:44] [INFO ] Flatten gal took : 6 ms
[2024-06-01 15:47:44] [INFO ] Flatten gal took : 7 ms
[2024-06-01 15:47:44] [INFO ] Input system was already deterministic with 156 transitions.
[2024-06-01 15:47:44] [INFO ] Flatten gal took : 55 ms
[2024-06-01 15:47:44] [INFO ] Flatten gal took : 52 ms
[2024-06-01 15:47:44] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 50 ms.
[2024-06-01 15:47:44] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 104 places, 592 transitions and 2944 arcs took 15 ms.
Total runtime 71234 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : PermAdmissibility-PT-50-CTLFireability-2024-00
Could not compute solution for formula : PermAdmissibility-PT-50-CTLFireability-2024-01
Could not compute solution for formula : PermAdmissibility-PT-50-CTLFireability-2024-02
Could not compute solution for formula : PermAdmissibility-PT-50-CTLFireability-2024-03
Could not compute solution for formula : PermAdmissibility-PT-50-CTLFireability-2024-05
Could not compute solution for formula : PermAdmissibility-PT-50-CTLFireability-2024-06
Could not compute solution for formula : PermAdmissibility-PT-50-CTLFireability-2024-07
Could not compute solution for formula : PermAdmissibility-PT-50-CTLFireability-2024-08
Could not compute solution for formula : PermAdmissibility-PT-50-CTLFireability-2024-09
Could not compute solution for formula : PermAdmissibility-PT-50-CTLFireability-2024-10
Could not compute solution for formula : PermAdmissibility-PT-50-CTLFireability-2024-11
Could not compute solution for formula : PermAdmissibility-PT-50-CTLFireability-2024-12
Could not compute solution for formula : PermAdmissibility-PT-50-CTLFireability-2024-13
Could not compute solution for formula : PermAdmissibility-PT-50-CTLFireability-2024-14
Could not compute solution for formula : PermAdmissibility-PT-50-CTLFireability-2024-15

BK_STOP 1717256865566

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name PermAdmissibility-PT-50-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/524/ctl_0_
ctl formula name PermAdmissibility-PT-50-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/524/ctl_1_
ctl formula name PermAdmissibility-PT-50-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/524/ctl_2_
ctl formula name PermAdmissibility-PT-50-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/524/ctl_3_
ctl formula name PermAdmissibility-PT-50-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/524/ctl_4_
ctl formula name PermAdmissibility-PT-50-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/524/ctl_5_
ctl formula name PermAdmissibility-PT-50-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/524/ctl_6_
ctl formula name PermAdmissibility-PT-50-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/524/ctl_7_
ctl formula name PermAdmissibility-PT-50-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/524/ctl_8_
ctl formula name PermAdmissibility-PT-50-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/524/ctl_9_
ctl formula name PermAdmissibility-PT-50-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/524/ctl_10_
ctl formula name PermAdmissibility-PT-50-CTLFireability-2024-12
ctl formula formula --ctl=/tmp/524/ctl_11_
ctl formula name PermAdmissibility-PT-50-CTLFireability-2024-13
ctl formula formula --ctl=/tmp/524/ctl_12_
ctl formula name PermAdmissibility-PT-50-CTLFireability-2024-14
ctl formula formula --ctl=/tmp/524/ctl_13_
ctl formula name PermAdmissibility-PT-50-CTLFireability-2024-15
ctl formula formula --ctl=/tmp/524/ctl_14_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-PT-50"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is PermAdmissibility-PT-50, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r512-smll-171654407100194"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-PT-50.tgz
mv PermAdmissibility-PT-50 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;