Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r512-smll-171654407100178.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is PermAdmissibility-PT-10, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r512-smll-171654407100178
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.8M
-rw-r--r-- 1 mcc users 9.9K Apr 12 09:19 CTLCardinality.txt
-rw-r--r-- 1 mcc users 97K Apr 12 09:19 CTLCardinality.xml
-rw-r--r-- 1 mcc users 68K Apr 12 09:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 361K Apr 12 09:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 5.6K Apr 23 07:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 33K Apr 23 07:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 18K Apr 23 07:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 73K Apr 23 07:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 19K Apr 12 09:28 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 177K Apr 12 09:28 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 80K Apr 12 09:27 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 401K Apr 12 09:27 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Apr 23 07:42 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.3K Apr 23 07:42 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 340K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-PT-10-CTLFireability-2024-00
FORMULA_NAME PermAdmissibility-PT-10-CTLFireability-2024-01
FORMULA_NAME PermAdmissibility-PT-10-CTLFireability-2024-02
FORMULA_NAME PermAdmissibility-PT-10-CTLFireability-2024-03
FORMULA_NAME PermAdmissibility-PT-10-CTLFireability-2024-04
FORMULA_NAME PermAdmissibility-PT-10-CTLFireability-2024-05
FORMULA_NAME PermAdmissibility-PT-10-CTLFireability-2024-06
FORMULA_NAME PermAdmissibility-PT-10-CTLFireability-2024-07
FORMULA_NAME PermAdmissibility-PT-10-CTLFireability-2024-08
FORMULA_NAME PermAdmissibility-PT-10-CTLFireability-2024-09
FORMULA_NAME PermAdmissibility-PT-10-CTLFireability-2024-10
FORMULA_NAME PermAdmissibility-PT-10-CTLFireability-2024-11
FORMULA_NAME PermAdmissibility-PT-10-CTLFireability-2024-12
FORMULA_NAME PermAdmissibility-PT-10-CTLFireability-2024-13
FORMULA_NAME PermAdmissibility-PT-10-CTLFireability-2024-14
FORMULA_NAME PermAdmissibility-PT-10-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717255405830

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=PermAdmissibility-PT-10
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 15:23:28] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 15:23:28] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 15:23:28] [INFO ] Load time of PNML (sax parser for PT used): 256 ms
[2024-06-01 15:23:28] [INFO ] Transformed 168 places.
[2024-06-01 15:23:28] [INFO ] Transformed 592 transitions.
[2024-06-01 15:23:28] [INFO ] Parsed PT model containing 168 places and 592 transitions and 3456 arcs in 535 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 70 ms.
Support contains 104 out of 168 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 168/168 places, 592/592 transitions.
Reduce places removed 64 places and 0 transitions.
Iterating post reduction 0 with 64 rules applied. Total rules applied 64 place count 104 transition count 592
Applied a total of 64 rules in 86 ms. Remains 104 /168 variables (removed 64) and now considering 592/592 (removed 0) transitions.
// Phase 1: matrix 592 rows 104 cols
[2024-06-01 15:23:29] [INFO ] Computed 16 invariants in 70 ms
[2024-06-01 15:23:29] [INFO ] Implicit Places using invariants in 408 ms returned []
[2024-06-01 15:23:29] [INFO ] Invariant cache hit.
[2024-06-01 15:23:30] [INFO ] Implicit Places using invariants and state equation in 539 ms returned []
Implicit Place search using SMT with State Equation took 1013 ms to find 0 implicit places.
Running 588 sub problems to find dead transitions.
[2024-06-01 15:23:30] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/103 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/103 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 2 (OVERLAPS) 1/104 variables, 13/16 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/104 variables, 0/16 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 4 (OVERLAPS) 592/696 variables, 104/120 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/696 variables, 0/120 constraints. Problems are: Problem set: 0 solved, 588 unsolved
Error getting values : (error "ParserException while parsing response: (timeout
org.smtlib.IParser$ParserException: Unbalanced parentheses at end of input")
At refinement iteration 6 (OVERLAPS) 0/696 variables, 0/120 constraints. Problems are: Problem set: 0 solved, 588 unsolved
No progress, stopping.
After SMT solving in domain Real declared 696/696 variables, and 120 constraints, problems are : Problem set: 0 solved, 588 unsolved in 30071 ms.
Refiners :[Generalized P Invariants (flows): 16/16 constraints, State Equation: 104/104 constraints, PredecessorRefiner: 588/588 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 588 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/103 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/103 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 2 (OVERLAPS) 1/104 variables, 13/16 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/104 variables, 0/16 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 4 (OVERLAPS) 592/696 variables, 104/120 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/696 variables, 588/708 constraints. Problems are: Problem set: 0 solved, 588 unsolved
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 696/696 variables, and 708 constraints, problems are : Problem set: 0 solved, 588 unsolved in 30032 ms.
Refiners :[Generalized P Invariants (flows): 16/16 constraints, State Equation: 104/104 constraints, PredecessorRefiner: 588/588 constraints, Known Traps: 0/0 constraints]
After SMT, in 62819ms problems are : Problem set: 0 solved, 588 unsolved
Search for dead transitions found 0 dead transitions in 62886ms
Starting structural reductions in LTL mode, iteration 1 : 104/168 places, 592/592 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 64049 ms. Remains : 104/168 places, 592/592 transitions.
Support contains 104 out of 104 places after structural reductions.
[2024-06-01 15:24:33] [INFO ] Flatten gal took : 160 ms
[2024-06-01 15:24:34] [INFO ] Flatten gal took : 122 ms
[2024-06-01 15:24:34] [INFO ] Input system was already deterministic with 592 transitions.
Reduction of identical properties reduced properties to check from 67 to 65
RANDOM walk for 40018 steps (224 resets) in 2497 ms. (16 steps per ms) remains 4/65 properties
BEST_FIRST walk for 40004 steps (8 resets) in 2348 ms. (17 steps per ms) remains 1/4 properties
BEST_FIRST walk for 7891 steps (0 resets) in 28 ms. (272 steps per ms) remains 0/1 properties
[2024-06-01 15:24:36] [INFO ] Flatten gal took : 65 ms
[2024-06-01 15:24:36] [INFO ] Flatten gal took : 78 ms
[2024-06-01 15:24:37] [INFO ] Input system was already deterministic with 592 transitions.
Computed a total of 104 stabilizing places and 592 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 104 transition count 592
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 3 formulas.
FORMULA PermAdmissibility-PT-10-CTLFireability-2024-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Applied a total of 0 rules in 4 ms. Remains 104 /104 variables (removed 0) and now considering 592/592 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 104/104 places, 592/592 transitions.
[2024-06-01 15:24:37] [INFO ] Flatten gal took : 38 ms
[2024-06-01 15:24:37] [INFO ] Flatten gal took : 44 ms
[2024-06-01 15:24:37] [INFO ] Input system was already deterministic with 592 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 13 places :
Symmetric choice reduction at 0 with 13 rule applications. Total rules 13 place count 91 transition count 468
Iterating global reduction 0 with 13 rules applied. Total rules applied 26 place count 91 transition count 468
Applied a total of 26 rules in 17 ms. Remains 91 /104 variables (removed 13) and now considering 468/592 (removed 124) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 19 ms. Remains : 91/104 places, 468/592 transitions.
[2024-06-01 15:24:37] [INFO ] Flatten gal took : 23 ms
[2024-06-01 15:24:37] [INFO ] Flatten gal took : 26 ms
[2024-06-01 15:24:37] [INFO ] Input system was already deterministic with 468 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Applied a total of 0 rules in 3 ms. Remains 104 /104 variables (removed 0) and now considering 592/592 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 104/104 places, 592/592 transitions.
[2024-06-01 15:24:37] [INFO ] Flatten gal took : 31 ms
[2024-06-01 15:24:37] [INFO ] Flatten gal took : 54 ms
[2024-06-01 15:24:37] [INFO ] Input system was already deterministic with 592 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Applied a total of 0 rules in 3 ms. Remains 104 /104 variables (removed 0) and now considering 592/592 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 104/104 places, 592/592 transitions.
[2024-06-01 15:24:37] [INFO ] Flatten gal took : 38 ms
[2024-06-01 15:24:37] [INFO ] Flatten gal took : 41 ms
[2024-06-01 15:24:37] [INFO ] Input system was already deterministic with 592 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Graph (complete) has 975 edges and 104 vertex of which 68 are kept as prefixes of interest. Removing 36 places using SCC suffix rule.6 ms
Discarding 36 places :
Also discarding 256 output transitions
Drop transitions (Output transitions of discarded places.) removed 256 transitions
Applied a total of 1 rules in 34 ms. Remains 68 /104 variables (removed 36) and now considering 336/592 (removed 256) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 35 ms. Remains : 68/104 places, 336/592 transitions.
[2024-06-01 15:24:38] [INFO ] Flatten gal took : 14 ms
[2024-06-01 15:24:38] [INFO ] Flatten gal took : 16 ms
[2024-06-01 15:24:38] [INFO ] Input system was already deterministic with 336 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Graph (complete) has 975 edges and 104 vertex of which 32 are kept as prefixes of interest. Removing 72 places using SCC suffix rule.2 ms
Discarding 72 places :
Also discarding 512 output transitions
Drop transitions (Output transitions of discarded places.) removed 512 transitions
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 6 place count 27 transition count 52
Iterating global reduction 0 with 5 rules applied. Total rules applied 11 place count 27 transition count 52
Applied a total of 11 rules in 9 ms. Remains 27 /104 variables (removed 77) and now considering 52/592 (removed 540) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 27/104 places, 52/592 transitions.
[2024-06-01 15:24:38] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:24:38] [INFO ] Flatten gal took : 3 ms
[2024-06-01 15:24:38] [INFO ] Input system was already deterministic with 52 transitions.
RANDOM walk for 268 steps (0 resets) in 7 ms. (33 steps per ms) remains 0/1 properties
FORMULA PermAdmissibility-PT-10-CTLFireability-2024-05 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Applied a total of 0 rules in 39 ms. Remains 104 /104 variables (removed 0) and now considering 592/592 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 40 ms. Remains : 104/104 places, 592/592 transitions.
[2024-06-01 15:24:38] [INFO ] Flatten gal took : 30 ms
[2024-06-01 15:24:38] [INFO ] Flatten gal took : 33 ms
[2024-06-01 15:24:38] [INFO ] Input system was already deterministic with 592 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Applied a total of 0 rules in 3 ms. Remains 104 /104 variables (removed 0) and now considering 592/592 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 104/104 places, 592/592 transitions.
[2024-06-01 15:24:38] [INFO ] Flatten gal took : 26 ms
[2024-06-01 15:24:38] [INFO ] Flatten gal took : 30 ms
[2024-06-01 15:24:38] [INFO ] Input system was already deterministic with 592 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 21 places :
Symmetric choice reduction at 0 with 21 rule applications. Total rules 21 place count 83 transition count 364
Iterating global reduction 0 with 21 rules applied. Total rules applied 42 place count 83 transition count 364
Discarding 14 places :
Symmetric choice reduction at 0 with 14 rule applications. Total rules 56 place count 69 transition count 192
Iterating global reduction 0 with 14 rules applied. Total rules applied 70 place count 69 transition count 192
Applied a total of 70 rules in 17 ms. Remains 69 /104 variables (removed 35) and now considering 192/592 (removed 400) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 18 ms. Remains : 69/104 places, 192/592 transitions.
[2024-06-01 15:24:38] [INFO ] Flatten gal took : 9 ms
[2024-06-01 15:24:38] [INFO ] Flatten gal took : 9 ms
[2024-06-01 15:24:38] [INFO ] Input system was already deterministic with 192 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 20 places :
Symmetric choice reduction at 0 with 20 rule applications. Total rules 20 place count 84 transition count 372
Iterating global reduction 0 with 20 rules applied. Total rules applied 40 place count 84 transition count 372
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 52 place count 72 transition count 220
Iterating global reduction 0 with 12 rules applied. Total rules applied 64 place count 72 transition count 220
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 65 place count 71 transition count 212
Iterating global reduction 0 with 1 rules applied. Total rules applied 66 place count 71 transition count 212
Applied a total of 66 rules in 18 ms. Remains 71 /104 variables (removed 33) and now considering 212/592 (removed 380) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 20 ms. Remains : 71/104 places, 212/592 transitions.
[2024-06-01 15:24:38] [INFO ] Flatten gal took : 11 ms
[2024-06-01 15:24:38] [INFO ] Flatten gal took : 10 ms
[2024-06-01 15:24:38] [INFO ] Input system was already deterministic with 212 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Graph (complete) has 975 edges and 104 vertex of which 32 are kept as prefixes of interest. Removing 72 places using SCC suffix rule.3 ms
Discarding 72 places :
Also discarding 512 output transitions
Drop transitions (Output transitions of discarded places.) removed 512 transitions
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 6 place count 27 transition count 52
Iterating global reduction 0 with 5 rules applied. Total rules applied 11 place count 27 transition count 52
Applied a total of 11 rules in 8 ms. Remains 27 /104 variables (removed 77) and now considering 52/592 (removed 540) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 27/104 places, 52/592 transitions.
[2024-06-01 15:24:38] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:24:38] [INFO ] Flatten gal took : 2 ms
[2024-06-01 15:24:38] [INFO ] Input system was already deterministic with 52 transitions.
RANDOM walk for 1665 steps (16 resets) in 8 ms. (185 steps per ms) remains 0/1 properties
FORMULA PermAdmissibility-PT-10-CTLFireability-2024-11 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 20 places :
Symmetric choice reduction at 0 with 20 rule applications. Total rules 20 place count 84 transition count 372
Iterating global reduction 0 with 20 rules applied. Total rules applied 40 place count 84 transition count 372
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 51 place count 73 transition count 238
Iterating global reduction 0 with 11 rules applied. Total rules applied 62 place count 73 transition count 238
Applied a total of 62 rules in 8 ms. Remains 73 /104 variables (removed 31) and now considering 238/592 (removed 354) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 73/104 places, 238/592 transitions.
[2024-06-01 15:24:38] [INFO ] Flatten gal took : 10 ms
[2024-06-01 15:24:38] [INFO ] Flatten gal took : 12 ms
[2024-06-01 15:24:38] [INFO ] Input system was already deterministic with 238 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 17 places :
Symmetric choice reduction at 0 with 17 rule applications. Total rules 17 place count 87 transition count 398
Iterating global reduction 0 with 17 rules applied. Total rules applied 34 place count 87 transition count 398
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 38 place count 83 transition count 338
Iterating global reduction 0 with 4 rules applied. Total rules applied 42 place count 83 transition count 338
Applied a total of 42 rules in 8 ms. Remains 83 /104 variables (removed 21) and now considering 338/592 (removed 254) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 83/104 places, 338/592 transitions.
[2024-06-01 15:24:38] [INFO ] Flatten gal took : 14 ms
[2024-06-01 15:24:38] [INFO ] Flatten gal took : 16 ms
[2024-06-01 15:24:38] [INFO ] Input system was already deterministic with 338 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Graph (complete) has 975 edges and 104 vertex of which 50 are kept as prefixes of interest. Removing 54 places using SCC suffix rule.3 ms
Discarding 54 places :
Also discarding 384 output transitions
Drop transitions (Output transitions of discarded places.) removed 384 transitions
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 13 place count 38 transition count 88
Iterating global reduction 0 with 12 rules applied. Total rules applied 25 place count 38 transition count 88
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 30 place count 33 transition count 54
Iterating global reduction 0 with 5 rules applied. Total rules applied 35 place count 33 transition count 54
Applied a total of 35 rules in 10 ms. Remains 33 /104 variables (removed 71) and now considering 54/592 (removed 538) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 33/104 places, 54/592 transitions.
[2024-06-01 15:24:38] [INFO ] Flatten gal took : 3 ms
[2024-06-01 15:24:38] [INFO ] Flatten gal took : 3 ms
[2024-06-01 15:24:38] [INFO ] Input system was already deterministic with 54 transitions.
RANDOM walk for 6480 steps (56 resets) in 22 ms. (281 steps per ms) remains 0/1 properties
FORMULA PermAdmissibility-PT-10-CTLFireability-2024-14 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 18 places :
Symmetric choice reduction at 0 with 18 rule applications. Total rules 18 place count 86 transition count 392
Iterating global reduction 0 with 18 rules applied. Total rules applied 36 place count 86 transition count 392
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 48 place count 74 transition count 240
Iterating global reduction 0 with 12 rules applied. Total rules applied 60 place count 74 transition count 240
Applied a total of 60 rules in 7 ms. Remains 74 /104 variables (removed 30) and now considering 240/592 (removed 352) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 74/104 places, 240/592 transitions.
[2024-06-01 15:24:38] [INFO ] Flatten gal took : 11 ms
[2024-06-01 15:24:38] [INFO ] Flatten gal took : 12 ms
[2024-06-01 15:24:38] [INFO ] Input system was already deterministic with 240 transitions.
[2024-06-01 15:24:38] [INFO ] Flatten gal took : 57 ms
[2024-06-01 15:24:39] [INFO ] Flatten gal took : 57 ms
[2024-06-01 15:24:39] [INFO ] Export to MCC of 12 properties in file /home/mcc/execution/CTLFireability.sr.xml took 38 ms.
[2024-06-01 15:24:39] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 104 places, 592 transitions and 2944 arcs took 10 ms.
Total runtime 71436 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : PermAdmissibility-PT-10-CTLFireability-2024-00
Could not compute solution for formula : PermAdmissibility-PT-10-CTLFireability-2024-01
Could not compute solution for formula : PermAdmissibility-PT-10-CTLFireability-2024-02
Could not compute solution for formula : PermAdmissibility-PT-10-CTLFireability-2024-03
Could not compute solution for formula : PermAdmissibility-PT-10-CTLFireability-2024-04
Could not compute solution for formula : PermAdmissibility-PT-10-CTLFireability-2024-06
Could not compute solution for formula : PermAdmissibility-PT-10-CTLFireability-2024-07
Could not compute solution for formula : PermAdmissibility-PT-10-CTLFireability-2024-08
Could not compute solution for formula : PermAdmissibility-PT-10-CTLFireability-2024-10
Could not compute solution for formula : PermAdmissibility-PT-10-CTLFireability-2024-12
Could not compute solution for formula : PermAdmissibility-PT-10-CTLFireability-2024-13
Could not compute solution for formula : PermAdmissibility-PT-10-CTLFireability-2024-15

BK_STOP 1717255480115

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name PermAdmissibility-PT-10-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/528/ctl_0_
ctl formula name PermAdmissibility-PT-10-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/528/ctl_1_
ctl formula name PermAdmissibility-PT-10-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/528/ctl_2_
ctl formula name PermAdmissibility-PT-10-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/528/ctl_3_
ctl formula name PermAdmissibility-PT-10-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/528/ctl_4_
ctl formula name PermAdmissibility-PT-10-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/528/ctl_5_
ctl formula name PermAdmissibility-PT-10-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/528/ctl_6_
ctl formula name PermAdmissibility-PT-10-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/528/ctl_7_
ctl formula name PermAdmissibility-PT-10-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/528/ctl_8_
ctl formula name PermAdmissibility-PT-10-CTLFireability-2024-12
ctl formula formula --ctl=/tmp/528/ctl_9_
ctl formula name PermAdmissibility-PT-10-CTLFireability-2024-13
ctl formula formula --ctl=/tmp/528/ctl_10_
ctl formula name PermAdmissibility-PT-10-CTLFireability-2024-15
ctl formula formula --ctl=/tmp/528/ctl_11_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-PT-10"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is PermAdmissibility-PT-10, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r512-smll-171654407100178"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-PT-10.tgz
mv PermAdmissibility-PT-10 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;