fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r512-smll-171654407100170
Last Updated
July 7, 2024

About the Execution of LTSMin+red for PermAdmissibility-PT-05

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
982.819 71939.00 101188.00 351.90 ??TT?????????T?? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r512-smll-171654407100170.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is PermAdmissibility-PT-05, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r512-smll-171654407100170
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.8M
-rw-r--r-- 1 mcc users 11K Apr 12 09:13 CTLCardinality.txt
-rw-r--r-- 1 mcc users 106K Apr 12 09:13 CTLCardinality.xml
-rw-r--r-- 1 mcc users 57K Apr 12 09:10 CTLFireability.txt
-rw-r--r-- 1 mcc users 296K Apr 12 09:10 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.9K Apr 23 07:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 31K Apr 23 07:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 14K Apr 23 07:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 54K Apr 23 07:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Apr 12 09:24 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 130K Apr 12 09:24 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 115K Apr 12 09:22 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 590K Apr 12 09:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Apr 23 07:42 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.5K Apr 23 07:42 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 336K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-00
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-01
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-02
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-03
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-04
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-05
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-06
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-07
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-08
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-09
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-10
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-11
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-12
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-13
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-14
FORMULA_NAME PermAdmissibility-PT-05-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717255095414

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=PermAdmissibility-PT-05
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 15:18:17] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 15:18:17] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 15:18:17] [INFO ] Load time of PNML (sax parser for PT used): 209 ms
[2024-06-01 15:18:17] [INFO ] Transformed 168 places.
[2024-06-01 15:18:17] [INFO ] Transformed 592 transitions.
[2024-06-01 15:18:17] [INFO ] Parsed PT model containing 168 places and 592 transitions and 3456 arcs in 450 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 49 ms.
Support contains 104 out of 168 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 168/168 places, 592/592 transitions.
Reduce places removed 64 places and 0 transitions.
Iterating post reduction 0 with 64 rules applied. Total rules applied 64 place count 104 transition count 592
Applied a total of 64 rules in 41 ms. Remains 104 /168 variables (removed 64) and now considering 592/592 (removed 0) transitions.
// Phase 1: matrix 592 rows 104 cols
[2024-06-01 15:18:18] [INFO ] Computed 16 invariants in 54 ms
[2024-06-01 15:18:18] [INFO ] Implicit Places using invariants in 396 ms returned []
[2024-06-01 15:18:18] [INFO ] Invariant cache hit.
[2024-06-01 15:18:18] [INFO ] Implicit Places using invariants and state equation in 377 ms returned []
Implicit Place search using SMT with State Equation took 821 ms to find 0 implicit places.
Running 588 sub problems to find dead transitions.
[2024-06-01 15:18:18] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/103 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/103 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 2 (OVERLAPS) 1/104 variables, 13/16 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/104 variables, 0/16 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 4 (OVERLAPS) 592/696 variables, 104/120 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/696 variables, 0/120 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 6 (OVERLAPS) 0/696 variables, 0/120 constraints. Problems are: Problem set: 0 solved, 588 unsolved
No progress, stopping.
After SMT solving in domain Real declared 696/696 variables, and 120 constraints, problems are : Problem set: 0 solved, 588 unsolved in 28991 ms.
Refiners :[Generalized P Invariants (flows): 16/16 constraints, State Equation: 104/104 constraints, PredecessorRefiner: 588/588 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 588 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/103 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/103 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 2 (OVERLAPS) 1/104 variables, 13/16 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/104 variables, 0/16 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 4 (OVERLAPS) 592/696 variables, 104/120 constraints. Problems are: Problem set: 0 solved, 588 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/696 variables, 588/708 constraints. Problems are: Problem set: 0 solved, 588 unsolved
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 696/696 variables, and 708 constraints, problems are : Problem set: 0 solved, 588 unsolved in 30061 ms.
Refiners :[Generalized P Invariants (flows): 16/16 constraints, State Equation: 104/104 constraints, PredecessorRefiner: 588/588 constraints, Known Traps: 0/0 constraints]
After SMT, in 61222ms problems are : Problem set: 0 solved, 588 unsolved
Search for dead transitions found 0 dead transitions in 61263ms
Starting structural reductions in LTL mode, iteration 1 : 104/168 places, 592/592 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 62161 ms. Remains : 104/168 places, 592/592 transitions.
Support contains 104 out of 104 places after structural reductions.
[2024-06-01 15:19:20] [INFO ] Flatten gal took : 179 ms
[2024-06-01 15:19:21] [INFO ] Flatten gal took : 130 ms
[2024-06-01 15:19:21] [INFO ] Input system was already deterministic with 592 transitions.
Reduction of identical properties reduced properties to check from 60 to 59
RANDOM walk for 40006 steps (412 resets) in 4143 ms. (9 steps per ms) remains 3/59 properties
BEST_FIRST walk for 40003 steps (40 resets) in 1438 ms. (27 steps per ms) remains 2/3 properties
BEST_FIRST walk for 33930 steps (20 resets) in 124 ms. (271 steps per ms) remains 0/2 properties
[2024-06-01 15:19:23] [INFO ] Flatten gal took : 67 ms
[2024-06-01 15:19:23] [INFO ] Flatten gal took : 82 ms
[2024-06-01 15:19:24] [INFO ] Input system was already deterministic with 592 transitions.
Computed a total of 104 stabilizing places and 592 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 104 transition count 592
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 3 formulas.
FORMULA PermAdmissibility-PT-05-CTLFireability-2024-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA PermAdmissibility-PT-05-CTLFireability-2024-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 26 places :
Symmetric choice reduction at 0 with 26 rule applications. Total rules 26 place count 78 transition count 344
Iterating global reduction 0 with 26 rules applied. Total rules applied 52 place count 78 transition count 344
Applied a total of 52 rules in 31 ms. Remains 78 /104 variables (removed 26) and now considering 344/592 (removed 248) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 31 ms. Remains : 78/104 places, 344/592 transitions.
[2024-06-01 15:19:24] [INFO ] Flatten gal took : 41 ms
[2024-06-01 15:19:24] [INFO ] Flatten gal took : 45 ms
[2024-06-01 15:19:24] [INFO ] Input system was already deterministic with 344 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Applied a total of 0 rules in 4 ms. Remains 104 /104 variables (removed 0) and now considering 592/592 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 104/104 places, 592/592 transitions.
[2024-06-01 15:19:24] [INFO ] Flatten gal took : 53 ms
[2024-06-01 15:19:24] [INFO ] Flatten gal took : 64 ms
[2024-06-01 15:19:24] [INFO ] Input system was already deterministic with 592 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 13 places :
Symmetric choice reduction at 0 with 13 rule applications. Total rules 13 place count 91 transition count 468
Iterating global reduction 0 with 13 rules applied. Total rules applied 26 place count 91 transition count 468
Applied a total of 26 rules in 24 ms. Remains 91 /104 variables (removed 13) and now considering 468/592 (removed 124) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 25 ms. Remains : 91/104 places, 468/592 transitions.
[2024-06-01 15:19:25] [INFO ] Flatten gal took : 36 ms
[2024-06-01 15:19:25] [INFO ] Flatten gal took : 34 ms
[2024-06-01 15:19:25] [INFO ] Input system was already deterministic with 468 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Applied a total of 0 rules in 40 ms. Remains 104 /104 variables (removed 0) and now considering 592/592 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 41 ms. Remains : 104/104 places, 592/592 transitions.
[2024-06-01 15:19:25] [INFO ] Flatten gal took : 29 ms
[2024-06-01 15:19:25] [INFO ] Flatten gal took : 32 ms
[2024-06-01 15:19:25] [INFO ] Input system was already deterministic with 592 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Applied a total of 0 rules in 3 ms. Remains 104 /104 variables (removed 0) and now considering 592/592 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 104/104 places, 592/592 transitions.
[2024-06-01 15:19:25] [INFO ] Flatten gal took : 28 ms
[2024-06-01 15:19:25] [INFO ] Flatten gal took : 30 ms
[2024-06-01 15:19:25] [INFO ] Input system was already deterministic with 592 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 13 places :
Symmetric choice reduction at 0 with 13 rule applications. Total rules 13 place count 91 transition count 468
Iterating global reduction 0 with 13 rules applied. Total rules applied 26 place count 91 transition count 468
Applied a total of 26 rules in 7 ms. Remains 91 /104 variables (removed 13) and now considering 468/592 (removed 124) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 91/104 places, 468/592 transitions.
[2024-06-01 15:19:25] [INFO ] Flatten gal took : 20 ms
[2024-06-01 15:19:25] [INFO ] Flatten gal took : 23 ms
[2024-06-01 15:19:25] [INFO ] Input system was already deterministic with 468 transitions.
Support contains 17 out of 91 places (down from 51) after GAL structural reductions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Graph (complete) has 975 edges and 104 vertex of which 86 are kept as prefixes of interest. Removing 18 places using SCC suffix rule.5 ms
Discarding 18 places :
Also discarding 128 output transitions
Drop transitions (Output transitions of discarded places.) removed 128 transitions
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 12 place count 75 transition count 348
Iterating global reduction 0 with 11 rules applied. Total rules applied 23 place count 75 transition count 348
Discarding 22 places :
Symmetric choice reduction at 0 with 22 rule applications. Total rules 45 place count 53 transition count 118
Iterating global reduction 0 with 22 rules applied. Total rules applied 67 place count 53 transition count 118
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 70 place count 50 transition count 94
Iterating global reduction 0 with 3 rules applied. Total rules applied 73 place count 50 transition count 94
Applied a total of 73 rules in 41 ms. Remains 50 /104 variables (removed 54) and now considering 94/592 (removed 498) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 41 ms. Remains : 50/104 places, 94/592 transitions.
[2024-06-01 15:19:25] [INFO ] Flatten gal took : 5 ms
[2024-06-01 15:19:25] [INFO ] Flatten gal took : 6 ms
[2024-06-01 15:19:25] [INFO ] Input system was already deterministic with 94 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 15 places :
Symmetric choice reduction at 0 with 15 rule applications. Total rules 15 place count 89 transition count 408
Iterating global reduction 0 with 15 rules applied. Total rules applied 30 place count 89 transition count 408
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 35 place count 84 transition count 336
Iterating global reduction 0 with 5 rules applied. Total rules applied 40 place count 84 transition count 336
Applied a total of 40 rules in 28 ms. Remains 84 /104 variables (removed 20) and now considering 336/592 (removed 256) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 29 ms. Remains : 84/104 places, 336/592 transitions.
[2024-06-01 15:19:25] [INFO ] Flatten gal took : 15 ms
[2024-06-01 15:19:25] [INFO ] Flatten gal took : 18 ms
[2024-06-01 15:19:25] [INFO ] Input system was already deterministic with 336 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 20 places :
Symmetric choice reduction at 0 with 20 rule applications. Total rules 20 place count 84 transition count 372
Iterating global reduction 0 with 20 rules applied. Total rules applied 40 place count 84 transition count 372
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 52 place count 72 transition count 220
Iterating global reduction 0 with 12 rules applied. Total rules applied 64 place count 72 transition count 220
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 65 place count 71 transition count 212
Iterating global reduction 0 with 1 rules applied. Total rules applied 66 place count 71 transition count 212
Applied a total of 66 rules in 26 ms. Remains 71 /104 variables (removed 33) and now considering 212/592 (removed 380) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 26 ms. Remains : 71/104 places, 212/592 transitions.
[2024-06-01 15:19:25] [INFO ] Flatten gal took : 9 ms
[2024-06-01 15:19:25] [INFO ] Flatten gal took : 10 ms
[2024-06-01 15:19:25] [INFO ] Input system was already deterministic with 212 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 24 places :
Symmetric choice reduction at 0 with 24 rule applications. Total rules 24 place count 80 transition count 352
Iterating global reduction 0 with 24 rules applied. Total rules applied 48 place count 80 transition count 352
Discarding 15 places :
Symmetric choice reduction at 0 with 15 rule applications. Total rules 63 place count 65 transition count 174
Iterating global reduction 0 with 15 rules applied. Total rules applied 78 place count 65 transition count 174
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 79 place count 64 transition count 166
Iterating global reduction 0 with 1 rules applied. Total rules applied 80 place count 64 transition count 166
Applied a total of 80 rules in 8 ms. Remains 64 /104 variables (removed 40) and now considering 166/592 (removed 426) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 64/104 places, 166/592 transitions.
[2024-06-01 15:19:25] [INFO ] Flatten gal took : 7 ms
[2024-06-01 15:19:25] [INFO ] Flatten gal took : 8 ms
[2024-06-01 15:19:25] [INFO ] Input system was already deterministic with 166 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 22 places :
Symmetric choice reduction at 0 with 22 rule applications. Total rules 22 place count 82 transition count 360
Iterating global reduction 0 with 22 rules applied. Total rules applied 44 place count 82 transition count 360
Discarding 14 places :
Symmetric choice reduction at 0 with 14 rule applications. Total rules 58 place count 68 transition count 184
Iterating global reduction 0 with 14 rules applied. Total rules applied 72 place count 68 transition count 184
Applied a total of 72 rules in 7 ms. Remains 68 /104 variables (removed 36) and now considering 184/592 (removed 408) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 68/104 places, 184/592 transitions.
[2024-06-01 15:19:25] [INFO ] Flatten gal took : 7 ms
[2024-06-01 15:19:25] [INFO ] Flatten gal took : 8 ms
[2024-06-01 15:19:25] [INFO ] Input system was already deterministic with 184 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Graph (complete) has 975 edges and 104 vertex of which 86 are kept as prefixes of interest. Removing 18 places using SCC suffix rule.2 ms
Discarding 18 places :
Also discarding 128 output transitions
Drop transitions (Output transitions of discarded places.) removed 128 transitions
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 12 place count 75 transition count 348
Iterating global reduction 0 with 11 rules applied. Total rules applied 23 place count 75 transition count 348
Discarding 22 places :
Symmetric choice reduction at 0 with 22 rule applications. Total rules 45 place count 53 transition count 118
Iterating global reduction 0 with 22 rules applied. Total rules applied 67 place count 53 transition count 118
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 69 place count 51 transition count 102
Iterating global reduction 0 with 2 rules applied. Total rules applied 71 place count 51 transition count 102
Applied a total of 71 rules in 18 ms. Remains 51 /104 variables (removed 53) and now considering 102/592 (removed 490) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 18 ms. Remains : 51/104 places, 102/592 transitions.
[2024-06-01 15:19:26] [INFO ] Flatten gal took : 4 ms
[2024-06-01 15:19:26] [INFO ] Flatten gal took : 4 ms
[2024-06-01 15:19:26] [INFO ] Input system was already deterministic with 102 transitions.
RANDOM walk for 3101 steps (33 resets) in 11 ms. (258 steps per ms) remains 0/1 properties
FORMULA PermAdmissibility-PT-05-CTLFireability-2024-13 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 22 places :
Symmetric choice reduction at 0 with 22 rule applications. Total rules 22 place count 82 transition count 364
Iterating global reduction 0 with 22 rules applied. Total rules applied 44 place count 82 transition count 364
Discarding 15 places :
Symmetric choice reduction at 0 with 15 rule applications. Total rules 59 place count 67 transition count 186
Iterating global reduction 0 with 15 rules applied. Total rules applied 74 place count 67 transition count 186
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 75 place count 66 transition count 178
Iterating global reduction 0 with 1 rules applied. Total rules applied 76 place count 66 transition count 178
Applied a total of 76 rules in 8 ms. Remains 66 /104 variables (removed 38) and now considering 178/592 (removed 414) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 66/104 places, 178/592 transitions.
[2024-06-01 15:19:26] [INFO ] Flatten gal took : 7 ms
[2024-06-01 15:19:26] [INFO ] Flatten gal took : 8 ms
[2024-06-01 15:19:26] [INFO ] Input system was already deterministic with 178 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 11 place count 93 transition count 456
Iterating global reduction 0 with 11 rules applied. Total rules applied 22 place count 93 transition count 456
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 24 place count 91 transition count 426
Iterating global reduction 0 with 2 rules applied. Total rules applied 26 place count 91 transition count 426
Applied a total of 26 rules in 8 ms. Remains 91 /104 variables (removed 13) and now considering 426/592 (removed 166) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 91/104 places, 426/592 transitions.
[2024-06-01 15:19:26] [INFO ] Flatten gal took : 16 ms
[2024-06-01 15:19:26] [INFO ] Flatten gal took : 21 ms
[2024-06-01 15:19:26] [INFO ] Input system was already deterministic with 426 transitions.
[2024-06-01 15:19:26] [INFO ] Flatten gal took : 53 ms
[2024-06-01 15:19:26] [INFO ] Flatten gal took : 86 ms
[2024-06-01 15:19:26] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 36 ms.
[2024-06-01 15:19:26] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 104 places, 592 transitions and 2944 arcs took 6 ms.
Total runtime 69488 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : PermAdmissibility-PT-05-CTLFireability-2024-00
Could not compute solution for formula : PermAdmissibility-PT-05-CTLFireability-2024-01
Could not compute solution for formula : PermAdmissibility-PT-05-CTLFireability-2024-04
Could not compute solution for formula : PermAdmissibility-PT-05-CTLFireability-2024-05
Could not compute solution for formula : PermAdmissibility-PT-05-CTLFireability-2024-06
Could not compute solution for formula : PermAdmissibility-PT-05-CTLFireability-2024-07
Could not compute solution for formula : PermAdmissibility-PT-05-CTLFireability-2024-08
Could not compute solution for formula : PermAdmissibility-PT-05-CTLFireability-2024-09
Could not compute solution for formula : PermAdmissibility-PT-05-CTLFireability-2024-10
Could not compute solution for formula : PermAdmissibility-PT-05-CTLFireability-2024-11
Could not compute solution for formula : PermAdmissibility-PT-05-CTLFireability-2024-12
Could not compute solution for formula : PermAdmissibility-PT-05-CTLFireability-2024-14
Could not compute solution for formula : PermAdmissibility-PT-05-CTLFireability-2024-15

BK_STOP 1717255167353

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name PermAdmissibility-PT-05-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/523/ctl_0_
ctl formula name PermAdmissibility-PT-05-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/523/ctl_1_
ctl formula name PermAdmissibility-PT-05-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/523/ctl_2_
ctl formula name PermAdmissibility-PT-05-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/523/ctl_3_
ctl formula name PermAdmissibility-PT-05-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/523/ctl_4_
ctl formula name PermAdmissibility-PT-05-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/523/ctl_5_
ctl formula name PermAdmissibility-PT-05-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/523/ctl_6_
ctl formula name PermAdmissibility-PT-05-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/523/ctl_7_
ctl formula name PermAdmissibility-PT-05-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/523/ctl_8_
ctl formula name PermAdmissibility-PT-05-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/523/ctl_9_
ctl formula name PermAdmissibility-PT-05-CTLFireability-2024-12
ctl formula formula --ctl=/tmp/523/ctl_10_
ctl formula name PermAdmissibility-PT-05-CTLFireability-2024-14
ctl formula formula --ctl=/tmp/523/ctl_11_
ctl formula name PermAdmissibility-PT-05-CTLFireability-2024-15
ctl formula formula --ctl=/tmp/523/ctl_12_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-PT-05"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is PermAdmissibility-PT-05, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r512-smll-171654407100170"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-PT-05.tgz
mv PermAdmissibility-PT-05 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;