Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r512-smll-171654406900106.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is PermAdmissibility-COL-01, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r512-smll-171654406900106
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 584K
-rw-r--r-- 1 mcc users 9.6K Apr 12 09:14 CTLCardinality.txt
-rw-r--r-- 1 mcc users 111K Apr 12 09:14 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.6K Apr 12 09:12 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K Apr 12 09:12 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Apr 23 07:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 23 07:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Apr 23 07:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 23 07:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Apr 12 09:27 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 144K Apr 12 09:27 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.3K Apr 12 09:25 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 71K Apr 12 09:25 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 23 07:42 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 23 07:42 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_pt
-rw-r--r-- 1 mcc users 3 May 18 16:43 instance
-rw-r--r-- 1 mcc users 5 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 54K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-COL-01-CTLFireability-2024-00
FORMULA_NAME PermAdmissibility-COL-01-CTLFireability-2024-01
FORMULA_NAME PermAdmissibility-COL-01-CTLFireability-2024-02
FORMULA_NAME PermAdmissibility-COL-01-CTLFireability-2024-03
FORMULA_NAME PermAdmissibility-COL-01-CTLFireability-2024-04
FORMULA_NAME PermAdmissibility-COL-01-CTLFireability-2024-05
FORMULA_NAME PermAdmissibility-COL-01-CTLFireability-2024-06
FORMULA_NAME PermAdmissibility-COL-01-CTLFireability-2024-07
FORMULA_NAME PermAdmissibility-COL-01-CTLFireability-2024-08
FORMULA_NAME PermAdmissibility-COL-01-CTLFireability-2024-09
FORMULA_NAME PermAdmissibility-COL-01-CTLFireability-2024-10
FORMULA_NAME PermAdmissibility-COL-01-CTLFireability-2024-11
FORMULA_NAME PermAdmissibility-COL-01-CTLFireability-2024-12
FORMULA_NAME PermAdmissibility-COL-01-CTLFireability-2024-13
FORMULA_NAME PermAdmissibility-COL-01-CTLFireability-2024-14
FORMULA_NAME PermAdmissibility-COL-01-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717251154059

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=PermAdmissibility-COL-01
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 14:12:35] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 14:12:35] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 14:12:35] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2024-06-01 14:12:36] [WARNING] Using fallBack plugin, rng conformance not checked
[2024-06-01 14:12:36] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 985 ms
[2024-06-01 14:12:36] [INFO ] Imported 40 HL places and 16 HL transitions for a total of 208 PT places and 1024.0 transition bindings in 28 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 24 ms.
[2024-06-01 14:12:37] [INFO ] Built PT skeleton of HLPN with 40 places and 16 transitions 83 arcs in 5 ms.
[2024-06-01 14:12:37] [INFO ] Skeletonized 16 HLPN properties in 6 ms.
Computed a total of 40 stabilizing places and 16 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 40 transition count 16
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 9 formulas.
FORMULA PermAdmissibility-COL-01-CTLFireability-2024-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA PermAdmissibility-COL-01-CTLFireability-2024-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA PermAdmissibility-COL-01-CTLFireability-2024-14 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Remains 10 properties that can be checked using skeleton over-approximation.
Computed a total of 40 stabilizing places and 16 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 40 transition count 16
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Reduction of identical properties reduced properties to check from 14 to 12
RANDOM walk for 40000 steps (2352 resets) in 1008 ms. (39 steps per ms) remains 1/12 properties
BEST_FIRST walk for 40000 steps (2352 resets) in 629 ms. (63 steps per ms) remains 1/1 properties
// Phase 1: matrix 16 rows 40 cols
[2024-06-01 14:12:37] [INFO ] Computed 24 invariants in 14 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/6 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 1 unsolved
Problem AtomicPropp10 is UNSAT
After SMT solving in domain Real declared 28/56 variables, and 12 constraints, problems are : Problem set: 1 solved, 0 unsolved in 232 ms.
Refiners :[Generalized P Invariants (flows): 12/24 constraints, State Equation: 0/40 constraints, PredecessorRefiner: 1/1 constraints, Known Traps: 0/0 constraints]
After SMT, in 293ms problems are : Problem set: 1 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 1 atomic propositions for a total of 8 simplifications.
FORMULA PermAdmissibility-COL-01-CTLFireability-2024-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 14:12:38] [INFO ] Initial state reduction rules for CTL removed 2 formulas.
[2024-06-01 14:12:38] [INFO ] Flatten gal took : 28 ms
FORMULA PermAdmissibility-COL-01-CTLFireability-2024-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA PermAdmissibility-COL-01-CTLFireability-2024-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 14:12:38] [INFO ] Flatten gal took : 9 ms
Symmetric sort wr.t. initial and guards and successors and join/free detected :input
Symmetric sort wr.t. initial detected :input
Symmetric sort wr.t. initial and guards detected :input
Applying symmetric unfolding of full symmetric sort :input domain size was 8
[2024-06-01 14:12:38] [INFO ] Unfolded HLPN to a Petri net with 40 places and 16 transitions 83 arcs in 15 ms.
[2024-06-01 14:12:38] [INFO ] Unfolded 10 HLPN properties in 0 ms.
Support contains 32 out of 40 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 40/40 places, 16/16 transitions.
Reduce places removed 8 places and 0 transitions.
Iterating post reduction 0 with 8 rules applied. Total rules applied 8 place count 32 transition count 16
Applied a total of 8 rules in 28 ms. Remains 32 /40 variables (removed 8) and now considering 16/16 (removed 0) transitions.
// Phase 1: matrix 16 rows 32 cols
[2024-06-01 14:12:38] [INFO ] Computed 16 invariants in 7 ms
[2024-06-01 14:12:38] [INFO ] Implicit Places using invariants in 65 ms returned []
[2024-06-01 14:12:38] [INFO ] Invariant cache hit.
[2024-06-01 14:12:38] [INFO ] Implicit Places using invariants and state equation in 72 ms returned []
Implicit Place search using SMT with State Equation took 147 ms to find 0 implicit places.
Running 15 sub problems to find dead transitions.
[2024-06-01 14:12:38] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/31 variables, 12/12 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/31 variables, 0/12 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 2 (OVERLAPS) 1/32 variables, 4/16 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/32 variables, 0/16 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 4 (OVERLAPS) 16/48 variables, 32/48 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/48 variables, 0/48 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 6 (OVERLAPS) 0/48 variables, 0/48 constraints. Problems are: Problem set: 0 solved, 15 unsolved
No progress, stopping.
After SMT solving in domain Real declared 48/48 variables, and 48 constraints, problems are : Problem set: 0 solved, 15 unsolved in 395 ms.
Refiners :[Generalized P Invariants (flows): 16/16 constraints, State Equation: 32/32 constraints, PredecessorRefiner: 15/15 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 15 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/31 variables, 12/12 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/31 variables, 0/12 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 2 (OVERLAPS) 1/32 variables, 4/16 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/32 variables, 0/16 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 4 (OVERLAPS) 16/48 variables, 32/48 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/48 variables, 15/63 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/48 variables, 0/63 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 7 (OVERLAPS) 0/48 variables, 0/63 constraints. Problems are: Problem set: 0 solved, 15 unsolved
No progress, stopping.
After SMT solving in domain Int declared 48/48 variables, and 63 constraints, problems are : Problem set: 0 solved, 15 unsolved in 325 ms.
Refiners :[Generalized P Invariants (flows): 16/16 constraints, State Equation: 32/32 constraints, PredecessorRefiner: 15/15 constraints, Known Traps: 0/0 constraints]
After SMT, in 736ms problems are : Problem set: 0 solved, 15 unsolved
Search for dead transitions found 0 dead transitions in 738ms
Starting structural reductions in LTL mode, iteration 1 : 32/40 places, 16/16 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 932 ms. Remains : 32/40 places, 16/16 transitions.
Support contains 32 out of 32 places after structural reductions.
[2024-06-01 14:12:39] [INFO ] Flatten gal took : 7 ms
[2024-06-01 14:12:39] [INFO ] Flatten gal took : 8 ms
[2024-06-01 14:12:39] [INFO ] Input system was already deterministic with 16 transitions.
Reduction of identical properties reduced properties to check from 27 to 23
RANDOM walk for 40000 steps (2352 resets) in 1376 ms. (29 steps per ms) remains 5/23 properties
BEST_FIRST walk for 40000 steps (2352 resets) in 1135 ms. (35 steps per ms) remains 5/5 properties
BEST_FIRST walk for 40000 steps (2352 resets) in 688 ms. (58 steps per ms) remains 5/5 properties
BEST_FIRST walk for 40000 steps (2352 resets) in 200 ms. (199 steps per ms) remains 5/5 properties
BEST_FIRST walk for 40000 steps (2352 resets) in 169 ms. (235 steps per ms) remains 5/5 properties
BEST_FIRST walk for 40000 steps (2352 resets) in 200 ms. (199 steps per ms) remains 5/5 properties
[2024-06-01 14:12:40] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/22 variables, 5/5 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/22 variables, 0/5 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 2 (OVERLAPS) 10/32 variables, 11/16 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/32 variables, 0/16 constraints. Problems are: Problem set: 0 solved, 5 unsolved
Problem AtomicPropp0 is UNSAT
Problem AtomicPropp5 is UNSAT
Problem AtomicPropp20 is UNSAT
Problem AtomicPropp21 is UNSAT
Problem AtomicPropp22 is UNSAT
After SMT solving in domain Real declared 48/48 variables, and 48 constraints, problems are : Problem set: 5 solved, 0 unsolved in 96 ms.
Refiners :[Generalized P Invariants (flows): 16/16 constraints, State Equation: 32/32 constraints, PredecessorRefiner: 5/5 constraints, Known Traps: 0/0 constraints]
After SMT, in 105ms problems are : Problem set: 5 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 5 atomic propositions for a total of 10 simplifications.
FORMULA PermAdmissibility-COL-01-CTLFireability-2024-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 14:12:40] [INFO ] Flatten gal took : 5 ms
[2024-06-01 14:12:40] [INFO ] Flatten gal took : 6 ms
[2024-06-01 14:12:40] [INFO ] Input system was already deterministic with 16 transitions.
Computed a total of 32 stabilizing places and 16 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 32 transition count 16
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Applied a total of 0 rules in 1 ms. Remains 32 /32 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 32/32 places, 16/16 transitions.
[2024-06-01 14:12:40] [INFO ] Flatten gal took : 4 ms
[2024-06-01 14:12:40] [INFO ] Flatten gal took : 4 ms
[2024-06-01 14:12:40] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Graph (complete) has 81 edges and 32 vertex of which 12 are kept as prefixes of interest. Removing 20 places using SCC suffix rule.1 ms
Discarding 20 places :
Also discarding 10 output transitions
Drop transitions (Output transitions of discarded places.) removed 10 transitions
Ensure Unique test removed 2 places
Applied a total of 1 rules in 18 ms. Remains 10 /32 variables (removed 22) and now considering 6/16 (removed 10) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 19 ms. Remains : 10/32 places, 6/16 transitions.
[2024-06-01 14:12:40] [INFO ] Flatten gal took : 2 ms
[2024-06-01 14:12:40] [INFO ] Flatten gal took : 2 ms
[2024-06-01 14:12:40] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Ensure Unique test removed 2 places
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 30 transition count 16
Applied a total of 2 rules in 1 ms. Remains 30 /32 variables (removed 2) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 30/32 places, 16/16 transitions.
[2024-06-01 14:12:40] [INFO ] Flatten gal took : 4 ms
[2024-06-01 14:12:40] [INFO ] Flatten gal took : 4 ms
[2024-06-01 14:12:40] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 31 transition count 16
Applied a total of 1 rules in 1 ms. Remains 31 /32 variables (removed 1) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 31/32 places, 16/16 transitions.
[2024-06-01 14:12:40] [INFO ] Flatten gal took : 4 ms
[2024-06-01 14:12:40] [INFO ] Flatten gal took : 4 ms
[2024-06-01 14:12:40] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Ensure Unique test removed 2 places
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 30 transition count 16
Applied a total of 2 rules in 1 ms. Remains 30 /32 variables (removed 2) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 30/32 places, 16/16 transitions.
[2024-06-01 14:12:40] [INFO ] Flatten gal took : 3 ms
[2024-06-01 14:12:40] [INFO ] Flatten gal took : 3 ms
[2024-06-01 14:12:40] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Ensure Unique test removed 2 places
Applied a total of 0 rules in 2 ms. Remains 30 /32 variables (removed 2) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 30/32 places, 16/16 transitions.
[2024-06-01 14:12:40] [INFO ] Flatten gal took : 4 ms
[2024-06-01 14:12:40] [INFO ] Flatten gal took : 4 ms
[2024-06-01 14:12:40] [INFO ] Input system was already deterministic with 16 transitions.
RANDOM walk for 56 steps (0 resets) in 4 ms. (11 steps per ms) remains 0/1 properties
FORMULA PermAdmissibility-COL-01-CTLFireability-2024-09 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Graph (complete) has 81 edges and 32 vertex of which 28 are kept as prefixes of interest. Removing 4 places using SCC suffix rule.0 ms
Discarding 4 places :
Also discarding 2 output transitions
Drop transitions (Output transitions of discarded places.) removed 2 transitions
Ensure Unique test removed 1 places
Applied a total of 1 rules in 2 ms. Remains 27 /32 variables (removed 5) and now considering 14/16 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 27/32 places, 14/16 transitions.
[2024-06-01 14:12:40] [INFO ] Flatten gal took : 3 ms
[2024-06-01 14:12:40] [INFO ] Flatten gal took : 4 ms
[2024-06-01 14:12:40] [INFO ] Input system was already deterministic with 14 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 31 transition count 16
Applied a total of 1 rules in 1 ms. Remains 31 /32 variables (removed 1) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 31/32 places, 16/16 transitions.
[2024-06-01 14:12:40] [INFO ] Flatten gal took : 3 ms
[2024-06-01 14:12:40] [INFO ] Flatten gal took : 4 ms
[2024-06-01 14:12:40] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 31 transition count 16
Applied a total of 1 rules in 1 ms. Remains 31 /32 variables (removed 1) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 31/32 places, 16/16 transitions.
[2024-06-01 14:12:40] [INFO ] Flatten gal took : 3 ms
[2024-06-01 14:12:40] [INFO ] Flatten gal took : 3 ms
[2024-06-01 14:12:40] [INFO ] Input system was already deterministic with 16 transitions.
[2024-06-01 14:12:40] [INFO ] Flatten gal took : 4 ms
[2024-06-01 14:12:40] [INFO ] Flatten gal took : 4 ms
[2024-06-01 14:12:40] [INFO ] Export to MCC of 8 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2024-06-01 14:12:40] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 32 places, 16 transitions and 75 arcs took 5 ms.
Total runtime 4991 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : PermAdmissibility-COL-01-CTLFireability-2024-01
Could not compute solution for formula : PermAdmissibility-COL-01-CTLFireability-2024-02
Could not compute solution for formula : PermAdmissibility-COL-01-CTLFireability-2024-06
Could not compute solution for formula : PermAdmissibility-COL-01-CTLFireability-2024-07
Could not compute solution for formula : PermAdmissibility-COL-01-CTLFireability-2024-08
Could not compute solution for formula : PermAdmissibility-COL-01-CTLFireability-2024-10
Could not compute solution for formula : PermAdmissibility-COL-01-CTLFireability-2024-12
Could not compute solution for formula : PermAdmissibility-COL-01-CTLFireability-2024-15

BK_STOP 1717251161064

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name PermAdmissibility-COL-01-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/513/ctl_0_
ctl formula name PermAdmissibility-COL-01-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/513/ctl_1_
ctl formula name PermAdmissibility-COL-01-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/513/ctl_2_
ctl formula name PermAdmissibility-COL-01-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/513/ctl_3_
ctl formula name PermAdmissibility-COL-01-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/513/ctl_4_
ctl formula name PermAdmissibility-COL-01-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/513/ctl_5_
ctl formula name PermAdmissibility-COL-01-CTLFireability-2024-12
ctl formula formula --ctl=/tmp/513/ctl_6_
ctl formula name PermAdmissibility-COL-01-CTLFireability-2024-15
ctl formula formula --ctl=/tmp/513/ctl_7_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-COL-01"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is PermAdmissibility-COL-01, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r512-smll-171654406900106"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-COL-01.tgz
mv PermAdmissibility-COL-01 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;