Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r508-tall-171654351500394.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..............
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is NQueens-PT-30, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r508-tall-171654351500394
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.4M
-rw-r--r-- 1 mcc users 8.6K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 99K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Apr 23 07:40 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Apr 23 07:40 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K May 19 07:23 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 19 18:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 18K Apr 12 03:22 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 200K Apr 12 03:22 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Apr 12 03:19 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 86K Apr 12 03:19 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 23 07:40 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 23 07:40 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 759K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME NQueens-PT-30-CTLFireability-2024-00
FORMULA_NAME NQueens-PT-30-CTLFireability-2024-01
FORMULA_NAME NQueens-PT-30-CTLFireability-2024-02
FORMULA_NAME NQueens-PT-30-CTLFireability-2024-03
FORMULA_NAME NQueens-PT-30-CTLFireability-2024-04
FORMULA_NAME NQueens-PT-30-CTLFireability-2024-05
FORMULA_NAME NQueens-PT-30-CTLFireability-2024-06
FORMULA_NAME NQueens-PT-30-CTLFireability-2024-07
FORMULA_NAME NQueens-PT-30-CTLFireability-2024-08
FORMULA_NAME NQueens-PT-30-CTLFireability-2024-09
FORMULA_NAME NQueens-PT-30-CTLFireability-2024-10
FORMULA_NAME NQueens-PT-30-CTLFireability-2024-11
FORMULA_NAME NQueens-PT-30-CTLFireability-2023-12
FORMULA_NAME NQueens-PT-30-CTLFireability-2023-13
FORMULA_NAME NQueens-PT-30-CTLFireability-2023-14
FORMULA_NAME NQueens-PT-30-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717236943197

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=NQueens-PT-30
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 10:15:44] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 10:15:44] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 10:15:44] [INFO ] Load time of PNML (sax parser for PT used): 150 ms
[2024-06-01 10:15:44] [INFO ] Transformed 1080 places.
[2024-06-01 10:15:44] [INFO ] Transformed 900 transitions.
[2024-06-01 10:15:44] [INFO ] Found NUPN structural information;
[2024-06-01 10:15:44] [INFO ] Parsed PT model containing 1080 places and 900 transitions and 4500 arcs in 263 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 12 ms.
Reduce places removed 2 places and 0 transitions.
Support contains 146 out of 1078 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1078/1078 places, 900/900 transitions.
Reduce places removed 900 places and 0 transitions.
Iterating post reduction 0 with 900 rules applied. Total rules applied 900 place count 178 transition count 900
Applied a total of 900 rules in 37 ms. Remains 178 /1078 variables (removed 900) and now considering 900/900 (removed 0) transitions.
// Phase 1: matrix 900 rows 178 cols
[2024-06-01 10:15:44] [INFO ] Invariants computation overflowed in 182 ms
[2024-06-01 10:15:45] [INFO ] Implicit Places using invariants in 397 ms returned []
// Phase 1: matrix 900 rows 178 cols
[2024-06-01 10:15:45] [INFO ] Invariants computation overflowed in 137 ms
[2024-06-01 10:17:29] [INFO ] Performed 60/178 implicitness test of which 1 returned IMPLICIT in 63 seconds.
[2024-06-01 10:18:01] [INFO ] Performed 72/178 implicitness test of which 1 returned IMPLICIT in 95 seconds.
[2024-06-01 10:18:25] [INFO ] Implicit Places using invariants and state equation in 160154 ms returned [60]
Discarding 1 places :
Implicit Place search using SMT with State Equation took 160588 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 177/1078 places, 900/900 transitions.
Applied a total of 0 rules in 3 ms. Remains 177 /177 variables (removed 0) and now considering 900/900 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 160649 ms. Remains : 177/1078 places, 900/900 transitions.
Support contains 146 out of 177 places after structural reductions.
[2024-06-01 10:18:25] [INFO ] Flatten gal took : 127 ms
[2024-06-01 10:18:25] [INFO ] Flatten gal took : 99 ms
[2024-06-01 10:18:25] [INFO ] Input system was already deterministic with 900 transitions.
Support contains 145 out of 177 places (down from 146) after GAL structural reductions.
RANDOM walk for 561 steps (20 resets) in 211 ms. (2 steps per ms) remains 0/75 properties
[2024-06-01 10:18:26] [INFO ] Flatten gal took : 46 ms
[2024-06-01 10:18:26] [INFO ] Flatten gal took : 47 ms
[2024-06-01 10:18:26] [INFO ] Input system was already deterministic with 900 transitions.
Computed a total of 177 stabilizing places and 900 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 177 transition count 900
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 1 formulas.
Starting structural reductions in LTL mode, iteration 0 : 177/177 places, 900/900 transitions.
Applied a total of 0 rules in 16 ms. Remains 177 /177 variables (removed 0) and now considering 900/900 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 16 ms. Remains : 177/177 places, 900/900 transitions.
[2024-06-01 10:18:26] [INFO ] Flatten gal took : 47 ms
[2024-06-01 10:18:26] [INFO ] Flatten gal took : 42 ms
[2024-06-01 10:18:26] [INFO ] Input system was already deterministic with 900 transitions.
Starting structural reductions in LTL mode, iteration 0 : 177/177 places, 900/900 transitions.
Applied a total of 0 rules in 16 ms. Remains 177 /177 variables (removed 0) and now considering 900/900 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 16 ms. Remains : 177/177 places, 900/900 transitions.
[2024-06-01 10:18:26] [INFO ] Flatten gal took : 36 ms
[2024-06-01 10:18:26] [INFO ] Flatten gal took : 41 ms
[2024-06-01 10:18:26] [INFO ] Input system was already deterministic with 900 transitions.
Starting structural reductions in LTL mode, iteration 0 : 177/177 places, 900/900 transitions.
Applied a total of 0 rules in 5 ms. Remains 177 /177 variables (removed 0) and now considering 900/900 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 177/177 places, 900/900 transitions.
[2024-06-01 10:18:26] [INFO ] Flatten gal took : 34 ms
[2024-06-01 10:18:26] [INFO ] Flatten gal took : 36 ms
[2024-06-01 10:18:26] [INFO ] Input system was already deterministic with 900 transitions.
Starting structural reductions in LTL mode, iteration 0 : 177/177 places, 900/900 transitions.
Applied a total of 0 rules in 5 ms. Remains 177 /177 variables (removed 0) and now considering 900/900 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 177/177 places, 900/900 transitions.
[2024-06-01 10:18:26] [INFO ] Flatten gal took : 30 ms
[2024-06-01 10:18:26] [INFO ] Flatten gal took : 33 ms
[2024-06-01 10:18:26] [INFO ] Input system was already deterministic with 900 transitions.
Starting structural reductions in LTL mode, iteration 0 : 177/177 places, 900/900 transitions.
Applied a total of 0 rules in 3 ms. Remains 177 /177 variables (removed 0) and now considering 900/900 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 177/177 places, 900/900 transitions.
[2024-06-01 10:18:26] [INFO ] Flatten gal took : 30 ms
[2024-06-01 10:18:27] [INFO ] Flatten gal took : 32 ms
[2024-06-01 10:18:27] [INFO ] Input system was already deterministic with 900 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 177/177 places, 900/900 transitions.
Applied a total of 0 rules in 13 ms. Remains 177 /177 variables (removed 0) and now considering 900/900 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 177/177 places, 900/900 transitions.
[2024-06-01 10:18:27] [INFO ] Flatten gal took : 30 ms
[2024-06-01 10:18:27] [INFO ] Flatten gal took : 32 ms
[2024-06-01 10:18:27] [INFO ] Input system was already deterministic with 900 transitions.
Starting structural reductions in LTL mode, iteration 0 : 177/177 places, 900/900 transitions.
Applied a total of 0 rules in 4 ms. Remains 177 /177 variables (removed 0) and now considering 900/900 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 177/177 places, 900/900 transitions.
[2024-06-01 10:18:27] [INFO ] Flatten gal took : 28 ms
[2024-06-01 10:18:27] [INFO ] Flatten gal took : 31 ms
[2024-06-01 10:18:27] [INFO ] Input system was already deterministic with 900 transitions.
Starting structural reductions in LTL mode, iteration 0 : 177/177 places, 900/900 transitions.
Applied a total of 0 rules in 3 ms. Remains 177 /177 variables (removed 0) and now considering 900/900 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 177/177 places, 900/900 transitions.
[2024-06-01 10:18:27] [INFO ] Flatten gal took : 29 ms
[2024-06-01 10:18:27] [INFO ] Flatten gal took : 31 ms
[2024-06-01 10:18:27] [INFO ] Input system was already deterministic with 900 transitions.
Starting structural reductions in LTL mode, iteration 0 : 177/177 places, 900/900 transitions.
Applied a total of 0 rules in 2 ms. Remains 177 /177 variables (removed 0) and now considering 900/900 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 177/177 places, 900/900 transitions.
[2024-06-01 10:18:27] [INFO ] Flatten gal took : 30 ms
[2024-06-01 10:18:27] [INFO ] Flatten gal took : 33 ms
[2024-06-01 10:18:27] [INFO ] Input system was already deterministic with 900 transitions.
Starting structural reductions in LTL mode, iteration 0 : 177/177 places, 900/900 transitions.
Applied a total of 0 rules in 2 ms. Remains 177 /177 variables (removed 0) and now considering 900/900 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 177/177 places, 900/900 transitions.
[2024-06-01 10:18:27] [INFO ] Flatten gal took : 28 ms
[2024-06-01 10:18:27] [INFO ] Flatten gal took : 34 ms
[2024-06-01 10:18:27] [INFO ] Input system was already deterministic with 900 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 177/177 places, 900/900 transitions.
Applied a total of 0 rules in 8 ms. Remains 177 /177 variables (removed 0) and now considering 900/900 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 177/177 places, 900/900 transitions.
[2024-06-01 10:18:27] [INFO ] Flatten gal took : 27 ms
[2024-06-01 10:18:27] [INFO ] Flatten gal took : 29 ms
[2024-06-01 10:18:27] [INFO ] Input system was already deterministic with 900 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 177/177 places, 900/900 transitions.
Applied a total of 0 rules in 8 ms. Remains 177 /177 variables (removed 0) and now considering 900/900 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 177/177 places, 900/900 transitions.
[2024-06-01 10:18:27] [INFO ] Flatten gal took : 27 ms
[2024-06-01 10:18:27] [INFO ] Flatten gal took : 30 ms
[2024-06-01 10:18:27] [INFO ] Input system was already deterministic with 900 transitions.
Starting structural reductions in LTL mode, iteration 0 : 177/177 places, 900/900 transitions.
Applied a total of 0 rules in 3 ms. Remains 177 /177 variables (removed 0) and now considering 900/900 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 177/177 places, 900/900 transitions.
[2024-06-01 10:18:28] [INFO ] Flatten gal took : 30 ms
[2024-06-01 10:18:28] [INFO ] Flatten gal took : 29 ms
[2024-06-01 10:18:28] [INFO ] Input system was already deterministic with 900 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 177/177 places, 900/900 transitions.
Applied a total of 0 rules in 8 ms. Remains 177 /177 variables (removed 0) and now considering 900/900 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 177/177 places, 900/900 transitions.
[2024-06-01 10:18:28] [INFO ] Flatten gal took : 27 ms
[2024-06-01 10:18:28] [INFO ] Flatten gal took : 29 ms
[2024-06-01 10:18:28] [INFO ] Input system was already deterministic with 900 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 177/177 places, 900/900 transitions.
Applied a total of 0 rules in 9 ms. Remains 177 /177 variables (removed 0) and now considering 900/900 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 177/177 places, 900/900 transitions.
[2024-06-01 10:18:28] [INFO ] Flatten gal took : 27 ms
[2024-06-01 10:18:28] [INFO ] Flatten gal took : 29 ms
[2024-06-01 10:18:28] [INFO ] Input system was already deterministic with 900 transitions.
Starting structural reductions in LTL mode, iteration 0 : 177/177 places, 900/900 transitions.
Applied a total of 0 rules in 2 ms. Remains 177 /177 variables (removed 0) and now considering 900/900 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 177/177 places, 900/900 transitions.
[2024-06-01 10:18:28] [INFO ] Flatten gal took : 27 ms
[2024-06-01 10:18:28] [INFO ] Flatten gal took : 29 ms
[2024-06-01 10:18:28] [INFO ] Input system was already deterministic with 900 transitions.
[2024-06-01 10:18:28] [INFO ] Flatten gal took : 31 ms
[2024-06-01 10:18:28] [INFO ] Flatten gal took : 31 ms
[2024-06-01 10:18:28] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 7 ms.
[2024-06-01 10:18:28] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 177 places, 900 transitions and 3599 arcs took 7 ms.
Total runtime 164310 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : NQueens-PT-30-CTLFireability-2024-00
Could not compute solution for formula : NQueens-PT-30-CTLFireability-2024-01
Could not compute solution for formula : NQueens-PT-30-CTLFireability-2024-02
Could not compute solution for formula : NQueens-PT-30-CTLFireability-2024-03
Could not compute solution for formula : NQueens-PT-30-CTLFireability-2024-04
Could not compute solution for formula : NQueens-PT-30-CTLFireability-2024-05
Could not compute solution for formula : NQueens-PT-30-CTLFireability-2024-06
Could not compute solution for formula : NQueens-PT-30-CTLFireability-2024-07
Could not compute solution for formula : NQueens-PT-30-CTLFireability-2024-08
Could not compute solution for formula : NQueens-PT-30-CTLFireability-2024-09
Could not compute solution for formula : NQueens-PT-30-CTLFireability-2024-10
Could not compute solution for formula : NQueens-PT-30-CTLFireability-2024-11
Could not compute solution for formula : NQueens-PT-30-CTLFireability-2023-12
Could not compute solution for formula : NQueens-PT-30-CTLFireability-2023-13
Could not compute solution for formula : NQueens-PT-30-CTLFireability-2023-14
Could not compute solution for formula : NQueens-PT-30-CTLFireability-2023-15

BK_STOP 1717237108978

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name NQueens-PT-30-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/506/ctl_0_
ctl formula name NQueens-PT-30-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/506/ctl_1_
ctl formula name NQueens-PT-30-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/506/ctl_2_
ctl formula name NQueens-PT-30-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/506/ctl_3_
ctl formula name NQueens-PT-30-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/506/ctl_4_
ctl formula name NQueens-PT-30-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/506/ctl_5_
ctl formula name NQueens-PT-30-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/506/ctl_6_
ctl formula name NQueens-PT-30-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/506/ctl_7_
ctl formula name NQueens-PT-30-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/506/ctl_8_
ctl formula name NQueens-PT-30-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/506/ctl_9_
ctl formula name NQueens-PT-30-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/506/ctl_10_
ctl formula name NQueens-PT-30-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/506/ctl_11_
ctl formula name NQueens-PT-30-CTLFireability-2023-12
ctl formula formula --ctl=/tmp/506/ctl_12_
ctl formula name NQueens-PT-30-CTLFireability-2023-13
ctl formula formula --ctl=/tmp/506/ctl_13_
ctl formula name NQueens-PT-30-CTLFireability-2023-14
ctl formula formula --ctl=/tmp/506/ctl_14_
ctl formula name NQueens-PT-30-CTLFireability-2023-15
ctl formula formula --ctl=/tmp/506/ctl_15_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="NQueens-PT-30"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is NQueens-PT-30, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r508-tall-171654351500394"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/NQueens-PT-30.tgz
mv NQueens-PT-30 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;