fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r508-tall-171654351200237
Last Updated
July 7, 2024

About the Execution of LTSMin+red for MultiwaySync-PT-none

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
247.119 3606.00 7312.00 47.60 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r508-tall-171654351200237.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is MultiwaySync-PT-none, examination is UpperBounds
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r508-tall-171654351200237
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 596K
-rw-r--r-- 1 mcc users 6.4K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 69K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 3.1K May 19 07:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 19 16:10 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Apr 22 14:53 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Apr 22 14:53 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Apr 11 18:53 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 154K Apr 11 18:53 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.7K Apr 11 18:47 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 77K Apr 11 18:47 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 22 14:53 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 22 14:53 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 111K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of positive values
NUM_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME MultiwaySync-PT-none-UpperBounds-00
FORMULA_NAME MultiwaySync-PT-none-UpperBounds-01
FORMULA_NAME MultiwaySync-PT-none-UpperBounds-02
FORMULA_NAME MultiwaySync-PT-none-UpperBounds-03
FORMULA_NAME MultiwaySync-PT-none-UpperBounds-04
FORMULA_NAME MultiwaySync-PT-none-UpperBounds-05
FORMULA_NAME MultiwaySync-PT-none-UpperBounds-06
FORMULA_NAME MultiwaySync-PT-none-UpperBounds-07
FORMULA_NAME MultiwaySync-PT-none-UpperBounds-08
FORMULA_NAME MultiwaySync-PT-none-UpperBounds-09
FORMULA_NAME MultiwaySync-PT-none-UpperBounds-10
FORMULA_NAME MultiwaySync-PT-none-UpperBounds-11
FORMULA_NAME MultiwaySync-PT-none-UpperBounds-12
FORMULA_NAME MultiwaySync-PT-none-UpperBounds-13
FORMULA_NAME MultiwaySync-PT-none-UpperBounds-14
FORMULA_NAME MultiwaySync-PT-none-UpperBounds-15

=== Now, execution of the tool begins

BK_START 1717235321222

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=UpperBounds
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=MultiwaySync-PT-none
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 09:48:42] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, UpperBounds, -timeout, 360, -rebuildPNML]
[2024-06-01 09:48:42] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 09:48:42] [INFO ] Load time of PNML (sax parser for PT used): 97 ms
[2024-06-01 09:48:42] [INFO ] Transformed 222 places.
[2024-06-01 09:48:42] [INFO ] Transformed 472 transitions.
[2024-06-01 09:48:42] [INFO ] Found NUPN structural information;
[2024-06-01 09:48:42] [INFO ] Parsed PT model containing 222 places and 472 transitions and 1496 arcs in 207 ms.
Parsed 16 properties from file /home/mcc/execution/UpperBounds.xml in 8 ms.
Ensure Unique test removed 83 transitions
Reduce redundant transitions removed 83 transitions.
Current structural bounds on expressions (Initiallly, because the net is safe) : Max Seen:[0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0] Max Struct:[1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
Current structural bounds on expressions (Before main loop) : Max Seen:[0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0] Max Struct:[1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-06-01 09:48:42] [INFO ] Flow matrix only has 384 transitions (discarded 5 similar events)
// Phase 1: matrix 384 rows 222 cols
[2024-06-01 09:48:42] [INFO ] Computed 25 invariants in 23 ms
Current structural bounds on expressions (after invariants) : Max Seen:[0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0] Max Struct:[1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
RANDOM walk for 10000 steps (2 resets) in 68 ms. (144 steps per ms)
FORMULA MultiwaySync-PT-none-UpperBounds-15 1 TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
FORMULA MultiwaySync-PT-none-UpperBounds-14 1 TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
FORMULA MultiwaySync-PT-none-UpperBounds-13 1 TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
FORMULA MultiwaySync-PT-none-UpperBounds-12 1 TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
FORMULA MultiwaySync-PT-none-UpperBounds-11 1 TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
FORMULA MultiwaySync-PT-none-UpperBounds-10 1 TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
FORMULA MultiwaySync-PT-none-UpperBounds-09 1 TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
FORMULA MultiwaySync-PT-none-UpperBounds-08 1 TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
FORMULA MultiwaySync-PT-none-UpperBounds-05 1 TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
FORMULA MultiwaySync-PT-none-UpperBounds-04 1 TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
FORMULA MultiwaySync-PT-none-UpperBounds-03 1 TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
FORMULA MultiwaySync-PT-none-UpperBounds-01 1 TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
FORMULA MultiwaySync-PT-none-UpperBounds-00 1 TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
FORMULA MultiwaySync-PT-none-UpperBounds-02 1 TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
BEST_FIRST walk for 20001 steps (4 resets) in 32 ms. (606 steps per ms)
FORMULA MultiwaySync-PT-none-UpperBounds-06 1 TECHNIQUES TOPOLOGICAL RANDOM_WALK
Current structural bounds on expressions (after WALK) : Max Seen:[0] Max Struct:[1]
[2024-06-01 09:48:42] [INFO ] Flow matrix only has 384 transitions (discarded 5 similar events)
[2024-06-01 09:48:42] [INFO ] Invariant cache hit.
[2024-06-01 09:48:43] [INFO ] [Real]Absence check using 25 positive place invariants in 10 ms returned sat
[2024-06-01 09:48:43] [INFO ] [Real]Absence check using state equation in 96 ms returned sat
[2024-06-01 09:48:43] [INFO ] State equation strengthened by 1 read => feed constraints.
[2024-06-01 09:48:43] [INFO ] [Real]Added 1 Read/Feed constraints in 2 ms returned sat
[2024-06-01 09:48:43] [INFO ] Solution in real domain found non-integer solution.
[2024-06-01 09:48:43] [INFO ] [Nat]Absence check using 25 positive place invariants in 8 ms returned sat
[2024-06-01 09:48:43] [INFO ] [Nat]Absence check using state equation in 82 ms returned sat
[2024-06-01 09:48:43] [INFO ] [Nat]Added 1 Read/Feed constraints in 2 ms returned sat
[2024-06-01 09:48:43] [INFO ] Deduced a trap composed of 22 places in 76 ms of which 18 ms to minimize.
[2024-06-01 09:48:43] [INFO ] Deduced a trap composed of 25 places in 55 ms of which 1 ms to minimize.
[2024-06-01 09:48:43] [INFO ] Trap strengthening (SAT) tested/added 3/2 trap constraints in 203 ms
[2024-06-01 09:48:43] [INFO ] Computed and/alt/rep : 364/1019/364 causal constraints (skipped 19 transitions) in 39 ms.
[2024-06-01 09:48:43] [INFO ] Added : 63 causal constraints over 13 iterations in 364 ms. Result :sat
Minimization took 96 ms.
Current structural bounds on expressions (after SMT) : Max Seen:[0] Max Struct:[1]
Current structural bounds on expressions (After Parikh guided walk) : Max Seen:[1] Max Struct:[1]
Support contains 1 out of 222 places. Attempting structural reductions.
Drop transitions (Removing consumers from one bounded place p39) removed 1 transitions
Starting structural reductions in REACHABILITY mode, iteration 0 : 222/222 places, 388/388 transitions.
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 2 Pre rules applied. Total rules applied 0 place count 222 transition count 386
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 4 place count 220 transition count 386
Drop transitions (Empty/Sink Transition effects.) removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Graph (complete) has 630 edges and 220 vertex of which 29 are kept as prefixes of interest. Removing 191 places using SCC suffix rule.1 ms
Discarding 191 places :
Also discarding 208 output transitions
Drop transitions (Output transitions of discarded places.) removed 208 transitions
Drop transitions (Trivial Post-Agglo cleanup.) removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 8 rules applied. Total rules applied 12 place count 29 transition count 171
Reduce places removed 1 places and 0 transitions.
Drop transitions (Empty/Sink Transition effects.) removed 123 transitions
Reduce isomorphic transitions removed 123 transitions.
Iterating post reduction 1 with 124 rules applied. Total rules applied 136 place count 28 transition count 48
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 137 place count 27 transition count 47
Iterating global reduction 2 with 1 rules applied. Total rules applied 138 place count 27 transition count 47
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 139 place count 26 transition count 44
Iterating global reduction 2 with 1 rules applied. Total rules applied 140 place count 26 transition count 44
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 141 place count 26 transition count 43
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 145 place count 24 transition count 41
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: -9
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 147 place count 23 transition count 50
Drop transitions (Redundant composition of simpler transitions.) removed 19 transitions
Redundant transition composition rules discarded 19 transitions
Iterating global reduction 3 with 19 rules applied. Total rules applied 166 place count 23 transition count 31
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 166 place count 23 transition count 30
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 168 place count 22 transition count 30
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 3 with 8 rules applied. Total rules applied 176 place count 18 transition count 26
Drop transitions (Empty/Sink Transition effects.) removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 3 with 3 rules applied. Total rules applied 179 place count 18 transition count 23
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 4 with 4 rules applied. Total rules applied 183 place count 16 transition count 21
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 184 place count 15 transition count 19
Iterating global reduction 4 with 1 rules applied. Total rules applied 185 place count 15 transition count 19
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: -6
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 4 with 2 rules applied. Total rules applied 187 place count 14 transition count 25
Drop transitions (Empty/Sink Transition effects.) removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 4 with 1 rules applied. Total rules applied 188 place count 14 transition count 24
Drop transitions (Redundant composition of simpler transitions.) removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 5 with 1 rules applied. Total rules applied 189 place count 14 transition count 23
Partial Free-agglomeration rule applied 1 times.
Drop transitions (Partial Free agglomeration) removed 1 transitions
Iterating global reduction 5 with 1 rules applied. Total rules applied 190 place count 14 transition count 23
Applied a total of 190 rules in 100 ms. Remains 14 /222 variables (removed 208) and now considering 23/388 (removed 365) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 109 ms. Remains : 14/222 places, 23/388 transitions.
// Phase 1: matrix 23 rows 14 cols
[2024-06-01 09:48:44] [INFO ] Computed 3 invariants in 1 ms
Current structural bounds on expressions (after invariants) : Max Seen:[1] Max Struct:[1]
FORMULA MultiwaySync-PT-none-UpperBounds-07 1 TECHNIQUES TOPOLOGICAL INITIAL_STATE
RANDOM walk for 1000000 steps (190015 resets) in 495 ms. (2016 steps per ms)
BEST_FIRST walk for 0 steps (0 resets) in 0 ms. (0 steps per ms)
Current structural bounds on expressions (after WALK) : Max Seen:[] Max Struct:[]
RANDOM walk for 0 steps (0 resets) in 4 ms. (0 steps per ms) remains 0/0 properties
Finished probabilistic random walk after 0 steps, run visited all 0 properties in 0 ms. (steps per millisecond=0 )
Current structural bounds on expressions (After reachability solving 0 queries.) : Max Seen:[] Max Struct:[]
All properties solved without resorting to model-checking.
Total runtime 2396 ms.
ITS solved all properties within timeout

BK_STOP 1717235324828

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination UpperBounds -timeout 360 -rebuildPNML

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="MultiwaySync-PT-none"
export BK_EXAMINATION="UpperBounds"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is MultiwaySync-PT-none, examination is UpperBounds"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r508-tall-171654351200237"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/MultiwaySync-PT-none.tgz
mv MultiwaySync-PT-none execution
cd execution
if [ "UpperBounds" = "ReachabilityDeadlock" ] || [ "UpperBounds" = "UpperBounds" ] || [ "UpperBounds" = "QuasiLiveness" ] || [ "UpperBounds" = "StableMarking" ] || [ "UpperBounds" = "Liveness" ] || [ "UpperBounds" = "OneSafe" ] || [ "UpperBounds" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "UpperBounds" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "UpperBounds" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "UpperBounds.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property UpperBounds.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "UpperBounds.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' UpperBounds.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "UpperBounds" = "ReachabilityDeadlock" ] || [ "UpperBounds" = "QuasiLiveness" ] || [ "UpperBounds" = "StableMarking" ] || [ "UpperBounds" = "Liveness" ] || [ "UpperBounds" = "OneSafe" ] ; then
echo "FORMULA_NAME UpperBounds"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;