fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r504-tall-171649612400266
Last Updated
July 7, 2024

About the Execution of LTSMin+red for LamportFastMutEx-PT-3

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
333.844 23845.00 41620.00 127.20 T????????F?F???? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r504-tall-171649612400266.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...........................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is LamportFastMutEx-PT-3, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r504-tall-171649612400266
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 864K
-rw-r--r-- 1 mcc users 14K Apr 13 07:43 CTLCardinality.txt
-rw-r--r-- 1 mcc users 100K Apr 13 07:43 CTLCardinality.xml
-rw-r--r-- 1 mcc users 12K Apr 13 07:40 CTLFireability.txt
-rw-r--r-- 1 mcc users 69K Apr 13 07:40 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 6.2K Apr 22 14:51 LTLCardinality.txt
-rw-r--r-- 1 mcc users 33K Apr 22 14:51 LTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K Apr 22 14:51 LTLFireability.txt
-rw-r--r-- 1 mcc users 30K Apr 22 14:51 LTLFireability.xml
-rw-r--r-- 1 mcc users 20K Apr 13 07:49 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 136K Apr 13 07:49 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 42K Apr 13 07:47 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 257K Apr 13 07:47 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.2K Apr 22 14:51 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.0K Apr 22 14:51 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 2 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 77K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-2024-00
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-2024-01
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-2024-02
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-2024-03
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-2024-04
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-2024-05
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-2024-06
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-2024-07
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-2024-08
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-2024-09
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-2024-10
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-2024-11
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-2024-12
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-2024-13
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-2024-14
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717226541159

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=LamportFastMutEx-PT-3
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 07:22:22] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 07:22:22] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 07:22:22] [INFO ] Load time of PNML (sax parser for PT used): 68 ms
[2024-06-01 07:22:22] [INFO ] Transformed 100 places.
[2024-06-01 07:22:22] [INFO ] Transformed 156 transitions.
[2024-06-01 07:22:22] [INFO ] Found NUPN structural information;
[2024-06-01 07:22:22] [INFO ] Completing missing partition info from NUPN : creating a component with [P_start_1_0, P_start_1_1, P_start_1_2, P_start_1_3, P_b_0_false, P_b_0_true, P_b_1_false, P_b_1_true, P_b_2_false, P_b_2_true, P_b_3_false, P_b_3_true, P_setx_3_0, P_setx_3_1, P_setx_3_2, P_setx_3_3, P_setbi_5_0, P_setbi_5_1, P_setbi_5_2, P_setbi_5_3, P_ify0_4_0, P_ify0_4_1, P_ify0_4_2, P_ify0_4_3, P_sety_9_0, P_sety_9_1, P_sety_9_2, P_sety_9_3, P_ifxi_10_0, P_ifxi_10_1, P_ifxi_10_2, P_ifxi_10_3, P_setbi_11_0, P_setbi_11_1, P_setbi_11_2, P_setbi_11_3, P_fordo_12_0, P_fordo_12_1, P_fordo_12_2, P_fordo_12_3, P_wait_0_0, P_wait_0_1, P_wait_0_2, P_wait_0_3, P_wait_1_0, P_wait_1_1, P_wait_1_2, P_wait_1_3, P_wait_2_0, P_wait_2_1, P_wait_2_2, P_wait_2_3, P_wait_3_0, P_wait_3_1, P_wait_3_2, P_wait_3_3, P_await_13_0, P_await_13_1, P_await_13_2, P_await_13_3, P_done_0_0, P_done_0_1, P_done_0_2, P_done_0_3, P_done_1_0, P_done_1_1, P_done_1_2, P_done_1_3, P_done_2_0, P_done_2_1, P_done_2_2, P_done_2_3, P_done_3_0, P_done_3_1, P_done_3_2, P_done_3_3, P_ifyi_15_0, P_ifyi_15_1, P_ifyi_15_2, P_ifyi_15_3, P_awaity_0, P_awaity_1, P_awaity_2, P_awaity_3, P_CS_21_0, P_CS_21_1, P_CS_21_2, P_CS_21_3, P_setbi_24_0, P_setbi_24_1, P_setbi_24_2, P_setbi_24_3]
[2024-06-01 07:22:22] [INFO ] Parsed PT model containing 100 places and 156 transitions and 664 arcs in 169 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 15 ms.
Deduced a syphon composed of 29 places in 2 ms
Reduce places removed 29 places and 42 transitions.
FORMULA LamportFastMutEx-PT-3-CTLFireability-2024-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 71 out of 71 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 114/114 transitions.
Applied a total of 0 rules in 9 ms. Remains 71 /71 variables (removed 0) and now considering 114/114 (removed 0) transitions.
[2024-06-01 07:22:22] [INFO ] Flow matrix only has 96 transitions (discarded 18 similar events)
// Phase 1: matrix 96 rows 71 cols
[2024-06-01 07:22:22] [INFO ] Computed 17 invariants in 11 ms
[2024-06-01 07:22:22] [INFO ] Implicit Places using invariants in 163 ms returned []
[2024-06-01 07:22:22] [INFO ] Flow matrix only has 96 transitions (discarded 18 similar events)
[2024-06-01 07:22:22] [INFO ] Invariant cache hit.
[2024-06-01 07:22:22] [INFO ] State equation strengthened by 27 read => feed constraints.
[2024-06-01 07:22:22] [INFO ] Implicit Places using invariants and state equation in 88 ms returned []
Implicit Place search using SMT with State Equation took 290 ms to find 0 implicit places.
Running 111 sub problems to find dead transitions.
[2024-06-01 07:22:22] [INFO ] Flow matrix only has 96 transitions (discarded 18 similar events)
[2024-06-01 07:22:22] [INFO ] Invariant cache hit.
[2024-06-01 07:22:22] [INFO ] State equation strengthened by 27 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/71 variables, 71/71 constraints. Problems are: Problem set: 0 solved, 111 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/71 variables, 17/88 constraints. Problems are: Problem set: 0 solved, 111 unsolved
[2024-06-01 07:22:23] [INFO ] Deduced a trap composed of 12 places in 55 ms of which 9 ms to minimize.
[2024-06-01 07:22:23] [INFO ] Deduced a trap composed of 13 places in 41 ms of which 2 ms to minimize.
[2024-06-01 07:22:23] [INFO ] Deduced a trap composed of 9 places in 38 ms of which 1 ms to minimize.
Problem TDEAD1 is UNSAT
[2024-06-01 07:22:23] [INFO ] Deduced a trap composed of 11 places in 39 ms of which 1 ms to minimize.
[2024-06-01 07:22:23] [INFO ] Deduced a trap composed of 10 places in 39 ms of which 1 ms to minimize.
[2024-06-01 07:22:23] [INFO ] Deduced a trap composed of 16 places in 41 ms of which 1 ms to minimize.
[2024-06-01 07:22:23] [INFO ] Deduced a trap composed of 10 places in 37 ms of which 1 ms to minimize.
[2024-06-01 07:22:23] [INFO ] Deduced a trap composed of 11 places in 26 ms of which 1 ms to minimize.
[2024-06-01 07:22:23] [INFO ] Deduced a trap composed of 5 places in 27 ms of which 1 ms to minimize.
[2024-06-01 07:22:23] [INFO ] Deduced a trap composed of 9 places in 22 ms of which 0 ms to minimize.
Problem TDEAD5 is UNSAT
[2024-06-01 07:22:23] [INFO ] Deduced a trap composed of 6 places in 30 ms of which 1 ms to minimize.
[2024-06-01 07:22:23] [INFO ] Deduced a trap composed of 5 places in 34 ms of which 1 ms to minimize.
[2024-06-01 07:22:23] [INFO ] Deduced a trap composed of 5 places in 32 ms of which 1 ms to minimize.
[2024-06-01 07:22:23] [INFO ] Deduced a trap composed of 10 places in 29 ms of which 1 ms to minimize.
[2024-06-01 07:22:23] [INFO ] Deduced a trap composed of 12 places in 34 ms of which 0 ms to minimize.
[2024-06-01 07:22:23] [INFO ] Deduced a trap composed of 15 places in 29 ms of which 1 ms to minimize.
[2024-06-01 07:22:24] [INFO ] Deduced a trap composed of 17 places in 38 ms of which 1 ms to minimize.
[2024-06-01 07:22:24] [INFO ] Deduced a trap composed of 9 places in 32 ms of which 1 ms to minimize.
[2024-06-01 07:22:24] [INFO ] Deduced a trap composed of 15 places in 33 ms of which 1 ms to minimize.
[2024-06-01 07:22:24] [INFO ] Deduced a trap composed of 17 places in 32 ms of which 0 ms to minimize.
Problem TDEAD1 is UNSAT
Problem TDEAD5 is UNSAT
Problem TDEAD22 is UNSAT
Problem TDEAD29 is UNSAT
Problem TDEAD45 is UNSAT
Problem TDEAD54 is UNSAT
Problem TDEAD57 is UNSAT
Problem TDEAD62 is UNSAT
At refinement iteration 2 (INCLUDED_ONLY) 0/71 variables, 20/108 constraints. Problems are: Problem set: 8 solved, 103 unsolved
[2024-06-01 07:22:24] [INFO ] Deduced a trap composed of 9 places in 18 ms of which 1 ms to minimize.
Problem TDEAD3 is UNSAT
[2024-06-01 07:22:24] [INFO ] Deduced a trap composed of 14 places in 41 ms of which 4 ms to minimize.
[2024-06-01 07:22:24] [INFO ] Deduced a trap composed of 16 places in 32 ms of which 1 ms to minimize.
[2024-06-01 07:22:24] [INFO ] Deduced a trap composed of 18 places in 49 ms of which 1 ms to minimize.
[2024-06-01 07:22:24] [INFO ] Deduced a trap composed of 12 places in 68 ms of which 1 ms to minimize.
[2024-06-01 07:22:24] [INFO ] Deduced a trap composed of 17 places in 42 ms of which 1 ms to minimize.
[2024-06-01 07:22:24] [INFO ] Deduced a trap composed of 19 places in 30 ms of which 1 ms to minimize.
[2024-06-01 07:22:24] [INFO ] Deduced a trap composed of 11 places in 32 ms of which 1 ms to minimize.
[2024-06-01 07:22:24] [INFO ] Deduced a trap composed of 9 places in 25 ms of which 0 ms to minimize.
Problem TDEAD18 is UNSAT
[2024-06-01 07:22:24] [INFO ] Deduced a trap composed of 19 places in 35 ms of which 1 ms to minimize.
[2024-06-01 07:22:24] [INFO ] Deduced a trap composed of 9 places in 31 ms of which 1 ms to minimize.
Problem TDEAD26 is UNSAT
[2024-06-01 07:22:24] [INFO ] Deduced a trap composed of 8 places in 20 ms of which 1 ms to minimize.
Problem TDEAD27 is UNSAT
[2024-06-01 07:22:24] [INFO ] Deduced a trap composed of 8 places in 18 ms of which 0 ms to minimize.
Problem TDEAD31 is UNSAT
[2024-06-01 07:22:24] [INFO ] Deduced a trap composed of 18 places in 31 ms of which 1 ms to minimize.
[2024-06-01 07:22:24] [INFO ] Deduced a trap composed of 17 places in 31 ms of which 1 ms to minimize.
[2024-06-01 07:22:24] [INFO ] Deduced a trap composed of 18 places in 25 ms of which 0 ms to minimize.
[2024-06-01 07:22:24] [INFO ] Deduced a trap composed of 18 places in 31 ms of which 1 ms to minimize.
[2024-06-01 07:22:24] [INFO ] Deduced a trap composed of 17 places in 35 ms of which 1 ms to minimize.
[2024-06-01 07:22:24] [INFO ] Deduced a trap composed of 18 places in 27 ms of which 1 ms to minimize.
[2024-06-01 07:22:24] [INFO ] Deduced a trap composed of 17 places in 31 ms of which 1 ms to minimize.
Problem TDEAD3 is UNSAT
Problem TDEAD18 is UNSAT
Problem TDEAD26 is UNSAT
Problem TDEAD27 is UNSAT
Problem TDEAD31 is UNSAT
Problem TDEAD40 is UNSAT
Problem TDEAD50 is UNSAT
Problem TDEAD51 is UNSAT
Problem TDEAD60 is UNSAT
Problem TDEAD64 is UNSAT
At refinement iteration 3 (INCLUDED_ONLY) 0/71 variables, 20/128 constraints. Problems are: Problem set: 18 solved, 93 unsolved
[2024-06-01 07:22:25] [INFO ] Deduced a trap composed of 20 places in 38 ms of which 0 ms to minimize.
[2024-06-01 07:22:25] [INFO ] Deduced a trap composed of 16 places in 28 ms of which 0 ms to minimize.
[2024-06-01 07:22:25] [INFO ] Deduced a trap composed of 13 places in 41 ms of which 1 ms to minimize.
[2024-06-01 07:22:25] [INFO ] Deduced a trap composed of 12 places in 43 ms of which 1 ms to minimize.
[2024-06-01 07:22:25] [INFO ] Deduced a trap composed of 11 places in 41 ms of which 1 ms to minimize.
[2024-06-01 07:22:25] [INFO ] Deduced a trap composed of 12 places in 38 ms of which 1 ms to minimize.
[2024-06-01 07:22:25] [INFO ] Deduced a trap composed of 12 places in 30 ms of which 0 ms to minimize.
[2024-06-01 07:22:25] [INFO ] Deduced a trap composed of 24 places in 46 ms of which 1 ms to minimize.
[2024-06-01 07:22:25] [INFO ] Deduced a trap composed of 16 places in 38 ms of which 1 ms to minimize.
[2024-06-01 07:22:25] [INFO ] Deduced a trap composed of 16 places in 39 ms of which 1 ms to minimize.
[2024-06-01 07:22:25] [INFO ] Deduced a trap composed of 17 places in 29 ms of which 1 ms to minimize.
[2024-06-01 07:22:25] [INFO ] Deduced a trap composed of 15 places in 40 ms of which 1 ms to minimize.
[2024-06-01 07:22:25] [INFO ] Deduced a trap composed of 19 places in 41 ms of which 0 ms to minimize.
[2024-06-01 07:22:25] [INFO ] Deduced a trap composed of 26 places in 32 ms of which 1 ms to minimize.
[2024-06-01 07:22:25] [INFO ] Deduced a trap composed of 15 places in 32 ms of which 0 ms to minimize.
[2024-06-01 07:22:25] [INFO ] Deduced a trap composed of 25 places in 35 ms of which 1 ms to minimize.
At refinement iteration 4 (INCLUDED_ONLY) 0/71 variables, 16/144 constraints. Problems are: Problem set: 18 solved, 93 unsolved
[2024-06-01 07:22:26] [INFO ] Deduced a trap composed of 5 places in 24 ms of which 9 ms to minimize.
At refinement iteration 5 (INCLUDED_ONLY) 0/71 variables, 1/145 constraints. Problems are: Problem set: 18 solved, 93 unsolved
[2024-06-01 07:22:26] [INFO ] Deduced a trap composed of 15 places in 40 ms of which 1 ms to minimize.
At refinement iteration 6 (INCLUDED_ONLY) 0/71 variables, 1/146 constraints. Problems are: Problem set: 18 solved, 93 unsolved
[2024-06-01 07:22:26] [INFO ] Deduced a trap composed of 18 places in 31 ms of which 1 ms to minimize.
At refinement iteration 7 (INCLUDED_ONLY) 0/71 variables, 1/147 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/71 variables, 0/147 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 9 (OVERLAPS) 96/167 variables, 71/218 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 10 (INCLUDED_ONLY) 0/167 variables, 27/245 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 11 (INCLUDED_ONLY) 0/167 variables, 0/245 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 12 (OVERLAPS) 0/167 variables, 0/245 constraints. Problems are: Problem set: 18 solved, 93 unsolved
No progress, stopping.
After SMT solving in domain Real declared 167/167 variables, and 245 constraints, problems are : Problem set: 18 solved, 93 unsolved in 6085 ms.
Refiners :[Domain max(s): 71/71 constraints, Positive P Invariants (semi-flows): 17/17 constraints, State Equation: 71/71 constraints, ReadFeed: 27/27 constraints, PredecessorRefiner: 111/111 constraints, Known Traps: 59/59 constraints]
Escalating to Integer solving :Problem set: 18 solved, 93 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/68 variables, 68/68 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/68 variables, 5/73 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/68 variables, 38/111 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/68 variables, 0/111 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 4 (OVERLAPS) 3/71 variables, 12/123 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/71 variables, 3/126 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/71 variables, 21/147 constraints. Problems are: Problem set: 18 solved, 93 unsolved
[2024-06-01 07:22:29] [INFO ] Deduced a trap composed of 12 places in 34 ms of which 0 ms to minimize.
At refinement iteration 7 (INCLUDED_ONLY) 0/71 variables, 1/148 constraints. Problems are: Problem set: 18 solved, 93 unsolved
[2024-06-01 07:22:29] [INFO ] Deduced a trap composed of 28 places in 40 ms of which 1 ms to minimize.
[2024-06-01 07:22:29] [INFO ] Deduced a trap composed of 22 places in 29 ms of which 1 ms to minimize.
At refinement iteration 8 (INCLUDED_ONLY) 0/71 variables, 2/150 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 9 (INCLUDED_ONLY) 0/71 variables, 0/150 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 10 (OVERLAPS) 96/167 variables, 71/221 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 11 (INCLUDED_ONLY) 0/167 variables, 27/248 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 12 (INCLUDED_ONLY) 0/167 variables, 93/341 constraints. Problems are: Problem set: 18 solved, 93 unsolved
[2024-06-01 07:22:30] [INFO ] Deduced a trap composed of 17 places in 40 ms of which 1 ms to minimize.
At refinement iteration 13 (INCLUDED_ONLY) 0/167 variables, 1/342 constraints. Problems are: Problem set: 18 solved, 93 unsolved
[2024-06-01 07:22:31] [INFO ] Deduced a trap composed of 5 places in 24 ms of which 1 ms to minimize.
[2024-06-01 07:22:32] [INFO ] Deduced a trap composed of 20 places in 40 ms of which 1 ms to minimize.
[2024-06-01 07:22:32] [INFO ] Deduced a trap composed of 17 places in 34 ms of which 1 ms to minimize.
At refinement iteration 14 (INCLUDED_ONLY) 0/167 variables, 3/345 constraints. Problems are: Problem set: 18 solved, 93 unsolved
[2024-06-01 07:22:32] [INFO ] Deduced a trap composed of 19 places in 36 ms of which 0 ms to minimize.
At refinement iteration 15 (INCLUDED_ONLY) 0/167 variables, 1/346 constraints. Problems are: Problem set: 18 solved, 93 unsolved
[2024-06-01 07:22:33] [INFO ] Deduced a trap composed of 18 places in 42 ms of which 1 ms to minimize.
[2024-06-01 07:22:33] [INFO ] Deduced a trap composed of 25 places in 43 ms of which 1 ms to minimize.
[2024-06-01 07:22:33] [INFO ] Deduced a trap composed of 20 places in 52 ms of which 1 ms to minimize.
At refinement iteration 16 (INCLUDED_ONLY) 0/167 variables, 3/349 constraints. Problems are: Problem set: 18 solved, 93 unsolved
[2024-06-01 07:22:34] [INFO ] Deduced a trap composed of 16 places in 42 ms of which 0 ms to minimize.
[2024-06-01 07:22:34] [INFO ] Deduced a trap composed of 19 places in 36 ms of which 1 ms to minimize.
[2024-06-01 07:22:34] [INFO ] Deduced a trap composed of 15 places in 42 ms of which 1 ms to minimize.
At refinement iteration 17 (INCLUDED_ONLY) 0/167 variables, 3/352 constraints. Problems are: Problem set: 18 solved, 93 unsolved
[2024-06-01 07:22:35] [INFO ] Deduced a trap composed of 17 places in 31 ms of which 1 ms to minimize.
At refinement iteration 18 (INCLUDED_ONLY) 0/167 variables, 1/353 constraints. Problems are: Problem set: 18 solved, 93 unsolved
[2024-06-01 07:22:36] [INFO ] Deduced a trap composed of 19 places in 35 ms of which 0 ms to minimize.
At refinement iteration 19 (INCLUDED_ONLY) 0/167 variables, 1/354 constraints. Problems are: Problem set: 18 solved, 93 unsolved
[2024-06-01 07:22:38] [INFO ] Deduced a trap composed of 13 places in 39 ms of which 1 ms to minimize.
At refinement iteration 20 (INCLUDED_ONLY) 0/167 variables, 1/355 constraints. Problems are: Problem set: 18 solved, 93 unsolved
[2024-06-01 07:22:39] [INFO ] Deduced a trap composed of 21 places in 35 ms of which 1 ms to minimize.
[2024-06-01 07:22:39] [INFO ] Deduced a trap composed of 15 places in 29 ms of which 1 ms to minimize.
[2024-06-01 07:22:39] [INFO ] Deduced a trap composed of 14 places in 30 ms of which 0 ms to minimize.
At refinement iteration 21 (INCLUDED_ONLY) 0/167 variables, 3/358 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 22 (INCLUDED_ONLY) 0/167 variables, 0/358 constraints. Problems are: Problem set: 18 solved, 93 unsolved
At refinement iteration 23 (OVERLAPS) 0/167 variables, 0/358 constraints. Problems are: Problem set: 18 solved, 93 unsolved
No progress, stopping.
After SMT solving in domain Int declared 167/167 variables, and 358 constraints, problems are : Problem set: 18 solved, 93 unsolved in 12871 ms.
Refiners :[Domain max(s): 71/71 constraints, Positive P Invariants (semi-flows): 17/17 constraints, State Equation: 71/71 constraints, ReadFeed: 27/27 constraints, PredecessorRefiner: 93/111 constraints, Known Traps: 79/79 constraints]
After SMT, in 19039ms problems are : Problem set: 18 solved, 93 unsolved
Search for dead transitions found 18 dead transitions in 19056ms
Found 18 dead transitions using SMT.
Drop transitions (Dead Transitions using SMT only with invariants) removed 18 transitions
Dead transitions reduction (with SMT) removed 18 transitions
Starting structural reductions in LTL mode, iteration 1 : 71/71 places, 96/114 transitions.
Applied a total of 0 rules in 4 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 19380 ms. Remains : 71/71 places, 96/114 transitions.
Support contains 71 out of 71 places after structural reductions.
[2024-06-01 07:22:42] [INFO ] Flatten gal took : 40 ms
[2024-06-01 07:22:42] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA LamportFastMutEx-PT-3-CTLFireability-2024-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 07:22:42] [INFO ] Flatten gal took : 38 ms
[2024-06-01 07:22:42] [INFO ] Input system was already deterministic with 96 transitions.
Reduction of identical properties reduced properties to check from 48 to 44
RANDOM walk for 40000 steps (8 resets) in 1315 ms. (30 steps per ms) remains 4/44 properties
BEST_FIRST walk for 40003 steps (8 resets) in 128 ms. (310 steps per ms) remains 4/4 properties
BEST_FIRST walk for 40002 steps (8 resets) in 96 ms. (412 steps per ms) remains 4/4 properties
BEST_FIRST walk for 40001 steps (8 resets) in 86 ms. (459 steps per ms) remains 4/4 properties
BEST_FIRST walk for 40003 steps (8 resets) in 85 ms. (465 steps per ms) remains 4/4 properties
[2024-06-01 07:22:43] [INFO ] Flow matrix only has 84 transitions (discarded 12 similar events)
// Phase 1: matrix 84 rows 71 cols
[2024-06-01 07:22:43] [INFO ] Computed 17 invariants in 2 ms
[2024-06-01 07:22:43] [INFO ] State equation strengthened by 24 read => feed constraints.
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/14 variables, 14/14 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/14 variables, 1/15 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/14 variables, 0/15 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 3 (OVERLAPS) 53/67 variables, 15/30 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/67 variables, 53/83 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/67 variables, 0/83 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 6 (OVERLAPS) 84/151 variables, 67/150 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/151 variables, 24/174 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/151 variables, 0/174 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 9 (OVERLAPS) 4/155 variables, 4/178 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 10 (INCLUDED_ONLY) 0/155 variables, 4/182 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 11 (INCLUDED_ONLY) 0/155 variables, 1/183 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 12 (INCLUDED_ONLY) 0/155 variables, 0/183 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 13 (OVERLAPS) 0/155 variables, 0/183 constraints. Problems are: Problem set: 0 solved, 4 unsolved
No progress, stopping.
After SMT solving in domain Real declared 155/155 variables, and 183 constraints, problems are : Problem set: 0 solved, 4 unsolved in 169 ms.
Refiners :[Domain max(s): 71/71 constraints, Positive P Invariants (semi-flows): 17/17 constraints, State Equation: 71/71 constraints, ReadFeed: 24/24 constraints, PredecessorRefiner: 4/4 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 4 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/14 variables, 14/14 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/14 variables, 1/15 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/14 variables, 0/15 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 3 (OVERLAPS) 53/67 variables, 15/30 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/67 variables, 53/83 constraints. Problems are: Problem set: 0 solved, 4 unsolved
[2024-06-01 07:22:43] [INFO ] Deduced a trap composed of 8 places in 21 ms of which 1 ms to minimize.
Problem AtomicPropp27 is UNSAT
[2024-06-01 07:22:43] [INFO ] Deduced a trap composed of 21 places in 31 ms of which 1 ms to minimize.
[2024-06-01 07:22:43] [INFO ] Deduced a trap composed of 9 places in 26 ms of which 1 ms to minimize.
[2024-06-01 07:22:43] [INFO ] Deduced a trap composed of 10 places in 32 ms of which 0 ms to minimize.
Problem AtomicPropp37 is UNSAT
[2024-06-01 07:22:43] [INFO ] Deduced a trap composed of 8 places in 20 ms of which 0 ms to minimize.
Problem AtomicPropp45 is UNSAT
At refinement iteration 5 (INCLUDED_ONLY) 0/67 variables, 5/88 constraints. Problems are: Problem set: 3 solved, 1 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/67 variables, 0/88 constraints. Problems are: Problem set: 3 solved, 1 unsolved
At refinement iteration 7 (OVERLAPS) 84/151 variables, 67/155 constraints. Problems are: Problem set: 3 solved, 1 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/151 variables, 24/179 constraints. Problems are: Problem set: 3 solved, 1 unsolved
At refinement iteration 9 (INCLUDED_ONLY) 0/151 variables, 0/179 constraints. Problems are: Problem set: 3 solved, 1 unsolved
At refinement iteration 10 (OVERLAPS) 4/155 variables, 4/183 constraints. Problems are: Problem set: 3 solved, 1 unsolved
At refinement iteration 11 (INCLUDED_ONLY) 0/155 variables, 4/187 constraints. Problems are: Problem set: 3 solved, 1 unsolved
At refinement iteration 12 (INCLUDED_ONLY) 0/155 variables, 1/188 constraints. Problems are: Problem set: 3 solved, 1 unsolved
At refinement iteration 13 (INCLUDED_ONLY) 0/155 variables, 1/189 constraints. Problems are: Problem set: 3 solved, 1 unsolved
At refinement iteration 14 (INCLUDED_ONLY) 0/155 variables, 0/189 constraints. Problems are: Problem set: 3 solved, 1 unsolved
At refinement iteration 15 (OVERLAPS) 0/155 variables, 0/189 constraints. Problems are: Problem set: 3 solved, 1 unsolved
No progress, stopping.
After SMT solving in domain Int declared 155/155 variables, and 189 constraints, problems are : Problem set: 3 solved, 1 unsolved in 261 ms.
Refiners :[Domain max(s): 71/71 constraints, Positive P Invariants (semi-flows): 17/17 constraints, State Equation: 71/71 constraints, ReadFeed: 24/24 constraints, PredecessorRefiner: 1/4 constraints, Known Traps: 5/5 constraints]
After SMT, in 437ms problems are : Problem set: 3 solved, 1 unsolved
Parikh walk visited 0 properties in 17 ms.
Support contains 4 out of 71 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 71/71 places, 96/96 transitions.
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 1 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 0 with 6 rules applied. Total rules applied 6 place count 68 transition count 93
Free-agglomeration rule (complex) applied 3 times.
Iterating global reduction 0 with 3 rules applied. Total rules applied 9 place count 68 transition count 90
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 12 place count 65 transition count 90
Applied a total of 12 rules in 24 ms. Remains 65 /71 variables (removed 6) and now considering 90/96 (removed 6) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 24 ms. Remains : 65/71 places, 90/96 transitions.
RANDOM walk for 40000 steps (8 resets) in 215 ms. (185 steps per ms) remains 1/1 properties
BEST_FIRST walk for 40003 steps (8 resets) in 38 ms. (1025 steps per ms) remains 1/1 properties
Probably explored full state space saw : 15512 states, properties seen :0
Probabilistic random walk after 61100 steps, saw 15512 distinct states, run finished after 153 ms. (steps per millisecond=399 ) properties seen :0
Explored full state space saw : 15512 states, properties seen :0
Exhaustive walk after 61100 steps, saw 15512 distinct states, run finished after 66 ms. (steps per millisecond=925 ) properties seen :0
Successfully simplified 4 atomic propositions for a total of 14 simplifications.
[2024-06-01 07:22:43] [INFO ] Flatten gal took : 13 ms
[2024-06-01 07:22:43] [INFO ] Flatten gal took : 10 ms
[2024-06-01 07:22:43] [INFO ] Input system was already deterministic with 96 transitions.
Computed a total of 1 stabilizing places and 3 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 5 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 71/71 places, 96/96 transitions.
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 5 ms
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 11 ms
[2024-06-01 07:22:44] [INFO ] Input system was already deterministic with 96 transitions.
RANDOM walk for 100 steps (0 resets) in 4 ms. (20 steps per ms) remains 0/1 properties
FORMULA LamportFastMutEx-PT-3-CTLFireability-2024-00 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 5 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 71/71 places, 96/96 transitions.
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 6 ms
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 21 ms
[2024-06-01 07:22:44] [INFO ] Input system was already deterministic with 96 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 3 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 71/71 places, 96/96 transitions.
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 16 ms
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 6 ms
[2024-06-01 07:22:44] [INFO ] Input system was already deterministic with 96 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 1 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 71/71 places, 96/96 transitions.
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 5 ms
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 10 ms
[2024-06-01 07:22:44] [INFO ] Input system was already deterministic with 96 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 3 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 71/71 places, 96/96 transitions.
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 5 ms
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 14 ms
[2024-06-01 07:22:44] [INFO ] Input system was already deterministic with 96 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 4 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 71/71 places, 96/96 transitions.
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 5 ms
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 16 ms
[2024-06-01 07:22:44] [INFO ] Input system was already deterministic with 96 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 1 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 71/71 places, 96/96 transitions.
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 5 ms
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 19 ms
[2024-06-01 07:22:44] [INFO ] Input system was already deterministic with 96 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 1 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 71/71 places, 96/96 transitions.
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 9 ms
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 5 ms
[2024-06-01 07:22:44] [INFO ] Input system was already deterministic with 96 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 1 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 71/71 places, 96/96 transitions.
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 5 ms
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 4 ms
[2024-06-01 07:22:44] [INFO ] Input system was already deterministic with 96 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 1 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 71/71 places, 96/96 transitions.
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 4 ms
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 4 ms
[2024-06-01 07:22:44] [INFO ] Input system was already deterministic with 96 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 4 place count 69 transition count 94
Applied a total of 4 rules in 7 ms. Remains 69 /71 variables (removed 2) and now considering 94/96 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 69/71 places, 94/96 transitions.
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 3 ms
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 4 ms
[2024-06-01 07:22:44] [INFO ] Input system was already deterministic with 94 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 4 place count 69 transition count 94
Applied a total of 4 rules in 6 ms. Remains 69 /71 variables (removed 2) and now considering 94/96 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 69/71 places, 94/96 transitions.
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 4 ms
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 4 ms
[2024-06-01 07:22:44] [INFO ] Input system was already deterministic with 94 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 1 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 71/71 places, 96/96 transitions.
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 4 ms
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 4 ms
[2024-06-01 07:22:44] [INFO ] Input system was already deterministic with 96 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 96/96 transitions.
Applied a total of 0 rules in 1 ms. Remains 71 /71 variables (removed 0) and now considering 96/96 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 71/71 places, 96/96 transitions.
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 4 ms
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 4 ms
[2024-06-01 07:22:44] [INFO ] Input system was already deterministic with 96 transitions.
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 6 ms
[2024-06-01 07:22:44] [INFO ] Flatten gal took : 20 ms
[2024-06-01 07:22:44] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 24 ms.
[2024-06-01 07:22:44] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 71 places, 96 transitions and 408 arcs took 4 ms.
Total runtime 22370 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : LamportFastMutEx-PT-3-CTLFireability-2024-01
Could not compute solution for formula : LamportFastMutEx-PT-3-CTLFireability-2024-02
Could not compute solution for formula : LamportFastMutEx-PT-3-CTLFireability-2024-03
Could not compute solution for formula : LamportFastMutEx-PT-3-CTLFireability-2024-04
Could not compute solution for formula : LamportFastMutEx-PT-3-CTLFireability-2024-05
Could not compute solution for formula : LamportFastMutEx-PT-3-CTLFireability-2024-06
Could not compute solution for formula : LamportFastMutEx-PT-3-CTLFireability-2024-07
Could not compute solution for formula : LamportFastMutEx-PT-3-CTLFireability-2024-08
Could not compute solution for formula : LamportFastMutEx-PT-3-CTLFireability-2024-10
Could not compute solution for formula : LamportFastMutEx-PT-3-CTLFireability-2024-12
Could not compute solution for formula : LamportFastMutEx-PT-3-CTLFireability-2024-13
Could not compute solution for formula : LamportFastMutEx-PT-3-CTLFireability-2024-14
Could not compute solution for formula : LamportFastMutEx-PT-3-CTLFireability-2024-15

BK_STOP 1717226565004

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name LamportFastMutEx-PT-3-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/769/ctl_0_
ctl formula name LamportFastMutEx-PT-3-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/769/ctl_1_
ctl formula name LamportFastMutEx-PT-3-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/769/ctl_2_
ctl formula name LamportFastMutEx-PT-3-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/769/ctl_3_
ctl formula name LamportFastMutEx-PT-3-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/769/ctl_4_
ctl formula name LamportFastMutEx-PT-3-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/769/ctl_5_
ctl formula name LamportFastMutEx-PT-3-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/769/ctl_6_
ctl formula name LamportFastMutEx-PT-3-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/769/ctl_7_
ctl formula name LamportFastMutEx-PT-3-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/769/ctl_8_
ctl formula name LamportFastMutEx-PT-3-CTLFireability-2024-12
ctl formula formula --ctl=/tmp/769/ctl_9_
ctl formula name LamportFastMutEx-PT-3-CTLFireability-2024-13
ctl formula formula --ctl=/tmp/769/ctl_10_
ctl formula name LamportFastMutEx-PT-3-CTLFireability-2024-14
ctl formula formula --ctl=/tmp/769/ctl_11_
ctl formula name LamportFastMutEx-PT-3-CTLFireability-2024-15
ctl formula formula --ctl=/tmp/769/ctl_12_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-PT-3"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is LamportFastMutEx-PT-3, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r504-tall-171649612400266"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-PT-3.tgz
mv LamportFastMutEx-PT-3 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;