Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r502-smll-171649594100031.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is HexagonalGrid-PT-816, examination is ReachabilityDeadlock
Time confinement is 1800 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r502-smll-171649594100031
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 3.1M
-rw-r--r-- 1 mcc users 7.1K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 70K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.3K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 66K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 3.8K Apr 22 14:48 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Apr 22 14:48 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Apr 22 14:48 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 22 14:48 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Apr 13 02:47 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 102K Apr 13 02:47 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Apr 13 02:42 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 97K Apr 13 02:42 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 22 14:48 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 22 14:48 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rwxr-xr-x 1 mcc users 2.6M May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

FORMULA_NAME ReachabilityDeadlock

=== Now, execution of the tool begins

BK_START 1717241916145

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=ReachabilityDeadlock
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=1800
BK_INPUT=HexagonalGrid-PT-816
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 11:38:38] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -timeout, 180, -rebuildPNML]
[2024-06-01 11:38:38] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 11:38:38] [INFO ] Load time of PNML (sax parser for PT used): 656 ms
[2024-06-01 11:38:38] [INFO ] Transformed 3391 places.
[2024-06-01 11:38:38] [INFO ] Transformed 6174 transitions.
[2024-06-01 11:38:39] [INFO ] Parsed PT model containing 3391 places and 6174 transitions and 24696 arcs in 1061 ms.
Parsed 1 properties from file /home/mcc/execution/ReachabilityDeadlock.xml in 8 ms.
Working with output stream class java.io.PrintStream
Built sparse matrix representations for Structural reductions in 31 ms.24849KB memory used
Starting structural reductions in DEADLOCK mode, iteration 0 : 3391/3391 places, 6174/6174 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Applied a total of 0 rules in 820 ms. Remains 3391 /3391 variables (removed 0) and now considering 6174/6174 (removed 0) transitions.
Finished structural reductions in DEADLOCK mode , in 1 iterations and 845 ms. Remains : 3391/3391 places, 6174/6174 transitions.
Starting structural reductions in DEADLOCK mode, iteration 0 : 3391/3391 places, 6174/6174 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Applied a total of 0 rules in 487 ms. Remains 3391 /3391 variables (removed 0) and now considering 6174/6174 (removed 0) transitions.
// Phase 1: matrix 6174 rows 3391 cols
[2024-06-01 11:38:41] [INFO ] Computed 1274 invariants in 389 ms
[2024-06-01 11:38:47] [INFO ] Implicit Places using invariants in 7122 ms returned []
[2024-06-01 11:38:47] [INFO ] Invariant cache hit.
[2024-06-01 11:39:06] [INFO ] Implicit Places using invariants and state equation in 18434 ms returned []
Implicit Place search using SMT with State Equation took 25611 ms to find 0 implicit places.
[2024-06-01 11:39:07] [INFO ] Redundant transitions in 1045 ms returned []
Running 5160 sub problems to find dead transitions.
[2024-06-01 11:39:07] [INFO ] Invariant cache hit.
Error getting values : (error "Error writing to Z3 solver: java.io.IOException: Broken pipe")
At refinement iteration 0 (INCLUDED_ONLY) 0/1363 variables, 90/90 constraints. Problems are: Problem set: 0 solved, 5160 unsolved
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 1363/9565 variables, and 90 constraints, problems are : Problem set: 0 solved, 5160 unsolved in 30201 ms.
Refiners :[Positive P Invariants (semi-flows): 90/1273 constraints, Generalized P Invariants (flows): 0/1 constraints, State Equation: 0/3391 constraints, PredecessorRefiner: 5160/5160 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 5160 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/1363 variables, 90/90 constraints. Problems are: Problem set: 0 solved, 5160 unsolved
Error getting values : (error "ParserException while parsing response: ((s1014 1)
(s1015 1)
(s1016 1)
(s1017 1)
(s1018 1)
(s1019 1)
(s1020 1)
(s1021 1)
(s1022 1)
(s1023 1)
(s1024 1)
(s1025 1)
(s1026 1)
(s1027 1)
(s1028 1)
(s1029 1)
(s1030 1)
(s1031 1)
(s1032 1)
(s1033 1)
(s1034 1)
(s1035 1)
(s1036 1)
(s1037 1)
(s1038 1)
(s1039 1)
(s1040 1)
(s1041 1)
(s1042 1)
(s1043 1)
(s1044 1)
(s1045 1)
(s1046 1)
(s1047 1)
(s1048 1)
(s1049 1)
(s1050 1)
(s1051 1)
(s1052 1)
(s1053 1)
(s1054 1)
(s1055 1)
(s1056 1)
(s1057 1)
(s1058 1)
(s1059 1)
(s1060 1)
(s1061 1)
(s1062 1)
(s1063 1)
(s1064 1)
(s1065 1)
(s1066 1)
(s1067 1)
(s1068 1)
(s1069 1)
(s1070 1)
(s1071 1)
(s1072 1)
(s1073 1)
(s1074 1)
(s1075 1)
(s1076 1)
(s1077 1)
(s1078 1)
(s1079 1)
(s1080 1)
(s1081 1)
(s1082 1)
(s1083 1)
(s1084 1)
(s1085 1)
(s1086 1)
(s1087 1)
(s1088 1)
(s1089 1)
(s1090 1)
(s1091 1)
(s1092 1)
(s1093 1)
(s1094 1)
(s1095 1)
(s1096 1)
(s1097 1)
(s1098 1)
(s1099 1)
(s1100 1)
(s1101 1)
(s1102 1)
(s1103 1)
(s1104 1)
(s1105 1)
(s1106 1)
(s1107 1)
(s1108 1)
(s1109 1)
(s1110 1)
(s1111 1)
(s1112 1)
(s1113 1)
(s1114 1)
(s1115 1)
(s1116 1)
(s1117 1)
(s1118 1)
(s1119 1)
(s1120 1)
(s1121 1)
(s1122 1)
(s1123 1)
(s1124 1)
(s1125 1)
(s1126 1)
(s1127 1)
(s1128 1)
(s1129 1)
(s1130 1)
(s1131 1)
(s1132 1)
(s1133 1)
(s1134 1)
(s1135 1)
(s1136 1)
(s1137 1)
(s1138 1)
(s1139 1)
(s1140 1)
(s1141 1)
(s1142 1)
(s1143 1)
(s1144 1)
(s1145 1)
(s1146 1)
(s1147 1)
(s1148 1)
(s1149 1)
(s1150 1)
(s1151 1)
(s1152 1)
(s1153 1)
(s1154 1)
(s1155 1)
(s1156 1)
(s1157 1)
(s1158 1)
(s1159 1)
(s1160 1)
(s1161 1)
(s1162 1)
(s1163 1)
(s1164 1)
(s1165 1)
(s1166 1)
(s1167 1)
(s1168 1)
(s1169 1)
(s1170 1)
(s1171 1)
(s1172 1)
(s1173 1)
(s1174 1)
(s1175 1)
(s1176 1)
(s1177 1)
(s1178 1)
(s1179 1)
(s1180 1)
(s1181 1)
(s1182 1)
(s1183 1)
(s1184 1)
(s1185 1)
(s1186 1)
(s1187 1)
(s1188 1)
(s1189 1)
(s1190 1)
(s1191 1)
(s1192 1)
(s1193 1)
(s1194 1)
(s1195 1)
(s1196 1)
(s1197 1)
(s1198 1)
(s1199 1)
(s1200 1)
(s1201 1)
(s1202 1)
(s1203 1)
(s1204 1)
(s1205 1)
(s1206 1)
(s1207 1)
(s1208 1)
(s1209 1)
(s1210 1)
(s1211 1)
(s1212 1)
(s1213 1)
(s1214 1)
(s1215 1)
(s1216 1)
(s1217 1)
(s1218 1)
(s1219 1)
(s1220 1)
(s1221 1)
(s1222 1)
(s1223 1)
(s1224 1)
(s1225 1)
(s1226 1)
(s1227 1)
(s1228 1)
(s1229 1)
(s1230 1)
(s1231 1)
(s1232 1)
(s1233 1)
(s1234 1)
(s1235 1)
(s1236 1)
(s1237 1)
(s1238 1)
(s1239 1)
(s1240 1)
(s1241 1)
(s1242 1)
(s1243 1)
(s1244 1)
(s1245 1)
(s1246 1)
(s1247 1)
(s1248 1)
(s1249 1)
(s1250 1)
(s1251 1)
(s1252 1)
(s1253 1)
(s1254 1)
(s1255 1)
(s1256 1)
(s1257 1)
(s1258 1)
(s1259 1)
(s1260 1)
(s1261 1)
(s1262 1)
(s1263 1)
(s1264 1)
(s1265 1)
(s1266 1)
(s1267 1)
(s1268 1)
(s1269 1)
(s1270 1)
(s1271 1)
(s1272 1)
(s1273 1)
(s1274 1)
(s1275 1)
(s1276 1)
(s1277 1)
(s1278 1)
(s1279 1)
(s1280 1)
(s1281 1)
(s1282 1)
(s1283 1)
(s1284 1)
(s1285 1)
(s1286 1)
(s1287 1)
(s1288 1)
(s1289 1)
(s1290 1)
(s1291 1)
(s1292 1)
(s1293 1)
(s1294 1)
(s1295 1)
(s1296 1)
(s1297 1)
(s1298 1)
(s1299 1)
(s1300 1)
(s1301 1)
(s1302 1)
(s1303 1)
(s1304 1)
(s1305 1)
(s1306 1)
(s1307 1)
(s1308 1)
(s1309 1)
(s1310 1)
(s1311 1)
(s1312 1)
(s1313 1)
(s1314 1)
(s1315 1)
(s1316 1)
(s1317 1)
(s1318 1)
(s1319 1)
(s1320 1)
(s1321 1)
(s1322 1)
(s1323 1)
(s1324 1)
(s1325 1)
(s1326 1)
(s1327 1)
(s1328 1)
(s1329 1)
(s1330 1)
(s1331 1)
(s1332 1)
(s1333 1)
(s1334 1)
(s1335 1)
(s1336 1)
(s1337 1)
(s1338 1)
(s1339 1)
(s1340 1)
(s1341 1)
(s1342 1)
(s1343 1)
(s1344 1)
(s1345 1)
(s1346 1)
(s1347 1)
(s1348 1)
(s1349 1)
(s1350 1)
(s1351 1)
(s1352 1)
(s1353 1)
(s1354 1)
(s1355 1)
(s1356 1)
(s1357 1)
(s1358 1)
(s1359 0)
(s1360 1)
(s1361 1)
(s1362 1)
(s1363 1)
(s1364 0)
(s1365 1)
(s1366 1)
(s1367 1)
(s1368 1)
(s1369 1)
(s1370 1)
(s1371 1)
(s1372 1)
(s1373 1)
(s1374 1)
(s1375 1)
(s1376 0)
(s1377 1)
(s1378 1)
(s1379 1)
(s1380 1)
(s1381 1)
(s1382 1)
(s1383 1)
(s1384 1)
(s1385 1)
(s1386 1)
(s1387 0)
(s1388 1)
(s1389 1)
(s1390 1)
(s1391 1)
(s1392 1)
(s1393 1)
(s1394 1)
(s1395 1)
(s1396 1)
(s1397 0)
(s1398 1)
(s1399 1)
(s1400 1)
(s1401 1)
(s1402 1)
(s1403 1)
(s1404 1)
(s1405 1)
(s1406 1)
(s1407 1)
(s1408 1)
(s1409 1)
(s1410 1)
(s1411 1)
(s1412 1)
(s1413 1)
(s1414 0)
(s1415 1)
(s1416 1)
(s1417 1)
(s1418 1)
(s1419 1)
(s1420 1)
(s1421 1)
(s1422 0)
(s1423 1)
(s1424 1)
(s1425 1)
(s1426 1)
(s1427 1)
(s1428 1)
(s1429 1)
(s1430 1)
(s1431 0)
(s1432 1)
(s1433 0)
(s1434 1)
(s1435 1)
(s1436 1)
(s1437 1)
(s1438 1)
(s1439 1)
(s1440 1)
(s1441 1)
(s1442 1)
(s1443 1)
(s1444 0)
(s1445 1)
(s1446 1)
(s1447 1)
(s1448 1)
(s1449 1)
(s1450 1)
(s1451 1)
(s1452 1)
(s1453 1)
(s1454 1)
(s1455 1)
(s1456 0)
(s1457 1)
(s1458 1)
(s1459 1)
(s1460 1)
(s1461 1)
(s1462 1)
(s1463 1)
(s1464 1)
(s1465 1)
(s1466 1)
(s1467 1)
(s1468 1)
(s1469 0)
(s1470 1)
(s1471 1)
(s1472 1)
(s1473 1)
(s1474 1)
(s1475 1)
(s1476 1)
(s1477 1)
(s1478 1)
(s1479 1)
(s1480 1)
(s1481 1)
(s1482 1)
(s1483 0)
(s1484 1)
(s1485 1)
(s1486 1)
(s1487 1)
(s1488 1)
(s1489 1)
(s1490 1)
(s1491 1)
(s1492 1)
(s1493 1)
(s1494 1)
(s1495 1)
(s1496 1)
(s1497 1)
(s1498 0)
(s1499 1)
(s1500 1)
(s1501 1)
(s1502 1)
(s1503 1)
(s1504 1)
(s1505 1)
(s1506 1)
(s1507 1)
(s1508 1)
(s1509 1)
(s1510 1)
(s1511 1)
(s1512 0)
(s1513 1)
(s1514 1)
(s1515 1)
(s1516 1)
(s1517 1)
(s1518 1)
(s1519 1)
(s1520 1)
(s1521 1)
(s1522 1)
(s1523 1)
(s1524 1)
(s1525 1)
(s1526 1)
(s1527 1)
(s1528 1)
(s1529 1)
(s1530 1)
(s1531 1)
(s1532 1)
(s1533 0)
(s1534 1)
(s1535 1)
(s1536 1)
(s1537 1)
(s1538 1)
(s1539 1)
(s1540 1)
(s1541 1)
(s1542 1)
(s1543 1)
(s1544 1)
(s1545 0)
(s1546 1)
(s1547 1)
(s1548 1)
(s1549 1)
(s1550 1)
(s1551 1)
(s1552 1)
(s1553 1)
(s1554 1)
(s1555 1)
(s1556 0)
(s1557 1)
(s1558 1)
(s1559 1)
(s1560 1)
(s1561 1)
(s1562 1)
(s1563 1)
(s1564 1)
(s1565 1)
(s1566 0)
(s1567 1)
(s1568 1)
(s1569 1)
(s1570 1)
(s1571 1)
(s1572 1)
(s1573 1)
(s1574 1)
(s1575 1)
(s1576 1)
(s1577 1)
(s1578 1)
(s1579 1)
(s1580 1)
(s1581 1)
(s1582 1)
(s1583 0)
(s1584 0)
(s1585 0)
(s1586 0)
(s1587 0)
(s1588 0)
(s1589 0)
(s1590 0)
(s1591 0)
(s1592 1)
(s1593 1)
(s1594 1)
(s1595 1)
(s1596 1)
(s1597 1)
(s1598 1)
(s1599 1)
(s1600 1)
(s1601 1)
(s1602 1)
(s1603 1)
(s1604 1)
(s1605 1)
(s1606 1)
(s1607 1)
(s1608 1)
(s1609 1)
(s1610 1)
(s1611 1)
(s1612 1)
(s1613 1)
(s1614 1)
(s1615 1)
(s1616 1)
(s1617 1)
(s1618 1)
(s1619 1)
(s1620 1)
(s1621 1)
(s1622 1)
(s1623 1)
(s1624 1)
(s1625 1)
(s1626 1)
(s1627 1)
(s1628 1)
(s1629 1)
(s1630 1)
(s1631 1)
(s1632 1)
(s1633 1)
(s1634 1)
(s1635 1)
(s1636 1)
(s1637 1)
(s1638 1)
(s1639 1)
(s1640 1)
(s1641 1)
(s1642 1)
(s1643 1)
(s1644 1)
(s1645 1)
(s1646 1)
(s1647 1)
(s1648 1)
(s1649 1)
(s1650 1)
(s1651 1)
(s1652 1)
(s1653 1)
(s1654 1)
(s1655 1)
(s1656 1)
(s1657 1)
(s1658 1)
(s1659 1)
(s1660 1)
(s1661 1)
(s1662 1)
(s1663 1)
(s1664 1)
(s1665 1)
(s1666 1)
(s1667 0)
(s1668 1)
(s1669 1)
(s1670 1)
(s1671 1)
(s1672 1)
(s1673 1)
(s1674 1)
(s1675 1)
(s1676 1)
(s1677 1)
(s1678 1)
(s1679 1)
(s1680 1)
(s1681 0)
(s1682 1)
(s1683 1)
(s1684 1)
(s1685 1)
(s1686 1)
(s1687 1)
(s1688 1)
(s1689 1)
(s1690 0)
(s1691 0)
(s1692 0)
(s1693 0)
(s1694 0)
(s1695 0)
(s1696 0)
(s1697 0)
(s1698 0)
(s1699 0)
(s1700 0)
(s1701 0)
(s1702 0)
(s1703 0)
(s1704 0)
(s1705 0)
(s1706 0)
(s1707 0)
(s1708 0)
(s1709 0)
(s1710 0)
(s1711 0)
(s1712 0)
(s1713 0)
(s1714 0)
(s1715 0)
(s1716 0)
(s1717 0)
(s1718 0)
(s1719 0)
(s1720 0)
(s1721 0)
(s1722 0)
(s1723 0)
(s1724 0)
(s1725 0)
(s1726 0)
(s1727 0)
(s1728 0)
(s1729 0)
(s1730 0)
(s1731 0)
(s1732 0)
(s1733 0)
(s1734 0)
(s1735 0)
(s1736 0)
(s1737 0)
(s1738 0)
(s1739 0)
(s1740 0)
(s1741 0)
(s1742 0)
(s1814 0)
(s1816 0)
(s1827 0)
(s1839 0)
(s1852 0)
(s1866 0)
(s1881 0)
(s1911 1)
(s1916 1)
(s1928 1)
(s1939 1)
(s1949 1)
(s1966 1)
(s1974 1)
(s1983 1)
(s1985 1)
(s1996 1)
(s2008 1)
(s2021 1)
(s2035 1)
(s2050 1)
(s2064 1)
(s2085 1)
(s2097 1)
(s2108 1)
(s2118 1)
(s2135 1)
(s2136 1)
(s2137 1)
(s2138 1)
(s2139 1)
(s2140 1)
(s2141 1)
(s2142 1)
(s2143 1)
(s2219 1)
(s2233 1)
(s2242 1)
(s2243 1)
(s2244 1)
(s2245 1)
(s2246 1)
(s2247 1)
(s2248 1)
(s2249 1)
(s2250 1)
(s2251 1)
(s2252 1)
(s2253 1)
(s2254 1)
(s2255 1)
(s2256 1)
(s2257 1)
(s2258 1)
(s2259 1)
(s2260 1)
(s2261 1)
(s2262 1)
(s2263 1)
(s2264 1)
(s2265 1)
(s2266 1)
(s2267 1)
(s2268 1)
(s2269 1)
(s2270 1)
(s2271 1)
(s2272 1)
(s2273 1)
(s2274 1)
(s2275 1)
(s2276 1)
(s2277 1)
(s2278 1)
(s2279 1)
(s2280 1)
(s2281 1)
(s2282 1)
(s2283 1)
(s2284 1)
(s2285 1)
(s2286 1)
(s2287 1)
(s2288 1)
(s2289 1)
(s2290 1)
(s2291 1)
(s2292 1)
(s2293 1)
(s2294 1)
(s2295 1)
(s2296 1)
(s2297 1)
(s2298 1)
(s2299 1)
(s2300 1)
(s2301 1)
(s2302 1)
(s2303 1)
(s2304 1)
(s2305 1)
(s2306 1)
(s2307 1)
(s2308 1)
(s2309 1)
(s2310 1)
(s2311 1)
(s2312 1)
(s2313 1)
(s2314 1)
(s2315 1)
(s2316 1)
(s2317 1)
(s2318 1)
(s2319 1)
(s2320 1)
(s2321 1)
(s2322 1)
(s2323 1)
(s2324 1)
(s2325 1)
(s2326 1)
(s2327 1)
(s2328 1)
(s2329 1)
(s2330 1)
(s2331 1)
(s2332 1)
(s2333 1)
(s2334 1)
(s2335 1)
(s2336 1)
(s2337 1)
(s2338 1)
(s2339 1)
(s2340 1)
(s2341 1)
(s2342 1)
(s2343 1)
(s2344 1)
(s2345 1)
(s2346 1)
(s2347 1)
(s2348 1)
(s2349 1)
(s2350 1)
(s2351 1)
(s2352 1)
(s2353 1)
(s2354 1)
(s2355 1)
(s2356 1)
(s2357 1)
(s2358 1)
(s2359 1)
(s2360 1)
(s2361 1)
(s2362 1)
(s2363 1)
(s2364 1)
(s2365 1)
(s2366 1)
(s2367 1)
(s2368 1)
(s2369 1)
(s2370 1)
(s2371 1)
(s2372 1)
(s2373 1)
(s2374 1)
(s2375 1)
(s2376 1)
(s2377 1)
(s2378 1)
(s2379 1)
(s2380 1)
(s2381 1)
(s2382 1)
(s2383 1)
(s2384 1)
(s2385 1)
(s2386 1)
(s2387 1)
(s2388 1)
(s2389 1)
(s2390 1)
(s2391 1)
(s2392 1)
(s2393 1)
(s2394 1)
(s2395 1)
(s2396 1)
(s2397 1)
(s2398 1)
(s2399 1)
(s2400 1)
(s2401 1)
(s2402 1)
(s2403 1)
(s2404 1)
(s2405 1)
(s2406 1)
(s2407 1)
(s2408 1)
(s2409 1)
(s2410 1)
(s2411 1)
(s2412 1)
(s2413 1)
(s2414 1)
(s2415 1)
(s2416 1)
(s2417 1)
(s2418 1)
(s2419 1)
(s2420 1)
(s2421 1)
(s2422 1)
(s2423 1)
(s2424 1)
(s2425 1)
(s2426 1)
(s2427 1)
(s2428 1)
(s2429 1)
(s2430 1)
(s2431 1)
(s2432 1)
(s2433 1)
(s2434 1)
(s2435 1)
(s2436 1)
(s2437 1)
(s2438 1)
(s2439 1)
(s2440 1)
(s2441 1)
(s2442 1)
(s2443 1)
(s2444 1)
(s2445 1)
(s2446 1)
(s2447 1)
(s2448 1)
(s2449 1)
(s2450 1)
(s2451 1)
(s2452 1)
(s2453 1)
(s2454 1)
(s2455 1)
(s2456 1)
(s2457 1)
(s2458 1)
(s2459 1)
(s2460 1)
(s2461 1)
(s2462 1)
(s2463 1)
(s2464 1)
(s2465 1)
(s2466 1)
(s2467 1)
(s2468 1)
(s2469 1)
(s2470 1)
(s2471 1)
(s2472 1)
(s2473 1)
(s2474 1)
(s2475 1)
(s2476 1)
(s2477 1)
(s2478 1)
(s2479 1)
(s2480 1)
(s2481 1)
(s2482 1)
(s2483 1)
(s2484 1)
(s2485 1)
(s2486 1)
(s2487 1)
(s2488 1)
(s2489 1)
(s2490 1)
(s2491 1)
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(s2493 1)
(s2494 1)
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(s2500 1)
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(s2526 1)
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(s2529 1)
(s2530 1)
(s2531 1)
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(s2533 1)
(s2534 1)
(s2535 1)
(s2536 1)
(s2537 1)
(s2538 1)
(s2539 1)
(s2540 1)
(s2541 1)
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(s2543 1)
(s2544 1)
(s2545 1)
(s2546 1)
(s2547 1)
(s2548 1)
(s2549 1)
(s2550 1)
(s2551 1)
(s2552 1)
(s2553 1)
(s2554 1)
(s2555 1)
(s2556 1)
(s2557 1)
(s2558 1)
(s2559 1)
(s2560 1)
(s2561 1)
(s2562 1)
(s2563 1)
(s2564 1)
(s2565 1)
(s2566 1)
(s2567 1)
(s2568 1)
(s2569 1)
(s2570 1)
(s2571 1)
(s2572 1)
(s2573 1)
(s2574 1)
(s2575 1)
(s2576 1)
(s2577 1)
(s2578 1)
(s2579 1)
(s2580 1)
(s2581 1)
(s2582 1)
(s2583 1)
(s2584 1)
(s2585 1)
(s2586 1)
(s2587 1)
(s2588 1)
(s2589 1)
(s2590 1)
(s2591 1)
(s2592 1)
(s2593 1)
(s2594 1)
(s2595 1)
(s2596 1)
(s2597 1)
(s2598 1)
(s2599 1)
(s2600 1)
(s2601 1)
(s2602 1)
(s2603 1)
(s2604 1)
(s2605 1)
(s2606 1)
(s2607 1)
(s2608 1)
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(s2611 1)
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(s2614 1)
(s2615 1)
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(s2617 1)
(s2618 1)
(s2619 1)
(s2620 1)
(s2621 1)
(s2622 1)
(s2623 1)
(s2624 1)
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org.smtlib.IParser$ParserException: Unbalanced parentheses at end of input")
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 1363/9565 variables, and 90 constraints, problems are : Problem set: 0 solved, 5160 unsolved in 30102 ms.
Refiners :[Positive P Invariants (semi-flows): 90/1273 constraints, Generalized P Invariants (flows): 0/1 constraints, State Equation: 0/3391 constraints, PredecessorRefiner: 0/5160 constraints, Known Traps: 0/0 constraints]
After SMT, in 68949ms problems are : Problem set: 0 solved, 5160 unsolved
Search for dead transitions found 0 dead transitions in 69092ms
Finished structural reductions in DEADLOCK mode , in 1 iterations and 96324 ms. Remains : 3391/3391 places, 6174/6174 transitions.
Finished random walk after 118638 steps, including 0 resets, run found a deadlock after 19722 ms. (steps per millisecond=6 )
FORMULA ReachabilityDeadlock TRUE TECHNIQUES TOPOLOGICAL STRUCTURAL_REDUCTION RANDOM_WALK
Total runtime 118153 ms.
ITS solved all properties within timeout

BK_STOP 1717242036255

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -timeout 180 -rebuildPNML

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="HexagonalGrid-PT-816"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="1800"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is HexagonalGrid-PT-816, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r502-smll-171649594100031"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/HexagonalGrid-PT-816.tgz
mv HexagonalGrid-PT-816 execution
cd execution
if [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "UpperBounds" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] || [ "ReachabilityDeadlock" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityDeadlock"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;