About the Execution of LTSMin+red for HypertorusGrid-PT-d3k3p2b06
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
721.487 | 73016.00 | 112576.00 | 320.70 | ???????T???????? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r500-smll-171649587900306.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is HypertorusGrid-PT-d3k3p2b06, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r500-smll-171649587900306
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.1M
-rw-r--r-- 1 mcc users 7.7K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 64K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.6K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 46K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Apr 22 14:49 LTLCardinality.txt
-rw-r--r-- 1 mcc users 21K Apr 22 14:49 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K May 19 07:19 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 19 18:33 LTLFireability.xml
-rw-r--r-- 1 mcc users 16K Apr 13 05:52 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 135K Apr 13 05:52 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 20K Apr 13 05:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 130K Apr 13 05:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Apr 22 14:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Apr 22 14:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 10 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rwxr-xr-x 1 mcc users 522K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-00
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-01
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-02
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-03
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-04
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-05
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-06
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-07
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-08
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-09
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-10
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-11
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-2023-12
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-2023-13
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-2023-14
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-2023-15
=== Now, execution of the tool begins
BK_START 1717274574311
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=HypertorusGrid-PT-d3k3p2b06
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 20:42:56] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 20:42:56] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 20:42:56] [INFO ] Load time of PNML (sax parser for PT used): 381 ms
[2024-06-01 20:42:56] [INFO ] Transformed 513 places.
[2024-06-01 20:42:57] [INFO ] Transformed 972 transitions.
[2024-06-01 20:42:57] [INFO ] Parsed PT model containing 513 places and 972 transitions and 3888 arcs in 613 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 27 ms.
Support contains 126 out of 513 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 104 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
// Phase 1: matrix 972 rows 513 cols
[2024-06-01 20:42:57] [INFO ] Computed 190 invariants in 80 ms
[2024-06-01 20:42:58] [INFO ] Implicit Places using invariants in 1193 ms returned []
[2024-06-01 20:42:58] [INFO ] Invariant cache hit.
[2024-06-01 20:42:59] [INFO ] Implicit Places using invariants and state equation in 1110 ms returned []
Implicit Place search using SMT with State Equation took 2409 ms to find 0 implicit places.
Running 810 sub problems to find dead transitions.
[2024-06-01 20:42:59] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/189 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 810 unsolved
At refinement iteration 1 (OVERLAPS) 318/507 variables, 189/189 constraints. Problems are: Problem set: 0 solved, 810 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/507 variables, 0/189 constraints. Problems are: Problem set: 0 solved, 810 unsolved
At refinement iteration 3 (OVERLAPS) 6/513 variables, 1/190 constraints. Problems are: Problem set: 0 solved, 810 unsolved
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 513/1485 variables, and 190 constraints, problems are : Problem set: 0 solved, 810 unsolved in 30068 ms.
Refiners :[Positive P Invariants (semi-flows): 189/189 constraints, Generalized P Invariants (flows): 1/1 constraints, State Equation: 0/513 constraints, PredecessorRefiner: 810/810 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 810 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/189 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 810 unsolved
At refinement iteration 1 (OVERLAPS) 318/507 variables, 189/189 constraints. Problems are: Problem set: 0 solved, 810 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/507 variables, 0/189 constraints. Problems are: Problem set: 0 solved, 810 unsolved
At refinement iteration 3 (OVERLAPS) 6/513 variables, 1/190 constraints. Problems are: Problem set: 0 solved, 810 unsolved
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 513/1485 variables, and 190 constraints, problems are : Problem set: 0 solved, 810 unsolved in 30036 ms.
Refiners :[Positive P Invariants (semi-flows): 189/189 constraints, Generalized P Invariants (flows): 1/1 constraints, State Equation: 0/513 constraints, PredecessorRefiner: 0/810 constraints, Known Traps: 0/0 constraints]
After SMT, in 61178ms problems are : Problem set: 0 solved, 810 unsolved
Search for dead transitions found 0 dead transitions in 61244ms
Finished structural reductions in LTL mode , in 1 iterations and 63817 ms. Remains : 513/513 places, 972/972 transitions.
Support contains 126 out of 513 places after structural reductions.
[2024-06-01 20:44:01] [INFO ] Flatten gal took : 250 ms
[2024-06-01 20:44:01] [INFO ] Flatten gal took : 151 ms
[2024-06-01 20:44:02] [INFO ] Input system was already deterministic with 972 transitions.
Reduction of identical properties reduced properties to check from 68 to 67
RANDOM walk for 22983 steps (6 resets) in 3706 ms. (6 steps per ms) remains 0/67 properties
[2024-06-01 20:44:03] [INFO ] Flatten gal took : 102 ms
[2024-06-01 20:44:03] [INFO ] Flatten gal took : 86 ms
[2024-06-01 20:44:03] [INFO ] Input system was already deterministic with 972 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 56 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 57 ms. Remains : 513/513 places, 972/972 transitions.
[2024-06-01 20:44:03] [INFO ] Flatten gal took : 66 ms
[2024-06-01 20:44:03] [INFO ] Flatten gal took : 67 ms
[2024-06-01 20:44:04] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in LTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 20 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 20 ms. Remains : 513/513 places, 972/972 transitions.
[2024-06-01 20:44:04] [INFO ] Flatten gal took : 35 ms
[2024-06-01 20:44:04] [INFO ] Flatten gal took : 39 ms
[2024-06-01 20:44:04] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in LTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 25 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 25 ms. Remains : 513/513 places, 972/972 transitions.
[2024-06-01 20:44:04] [INFO ] Flatten gal took : 33 ms
[2024-06-01 20:44:04] [INFO ] Flatten gal took : 35 ms
[2024-06-01 20:44:04] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in LTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 19 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 19 ms. Remains : 513/513 places, 972/972 transitions.
[2024-06-01 20:44:04] [INFO ] Flatten gal took : 32 ms
[2024-06-01 20:44:04] [INFO ] Flatten gal took : 36 ms
[2024-06-01 20:44:04] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in LTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 19 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 19 ms. Remains : 513/513 places, 972/972 transitions.
[2024-06-01 20:44:04] [INFO ] Flatten gal took : 32 ms
[2024-06-01 20:44:04] [INFO ] Flatten gal took : 35 ms
[2024-06-01 20:44:04] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in LTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 18 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 18 ms. Remains : 513/513 places, 972/972 transitions.
[2024-06-01 20:44:04] [INFO ] Flatten gal took : 30 ms
[2024-06-01 20:44:04] [INFO ] Flatten gal took : 33 ms
[2024-06-01 20:44:04] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in LTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 20 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 21 ms. Remains : 513/513 places, 972/972 transitions.
[2024-06-01 20:44:05] [INFO ] Flatten gal took : 33 ms
[2024-06-01 20:44:05] [INFO ] Flatten gal took : 37 ms
[2024-06-01 20:44:05] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 40 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 40 ms. Remains : 513/513 places, 972/972 transitions.
[2024-06-01 20:44:05] [INFO ] Flatten gal took : 28 ms
[2024-06-01 20:44:05] [INFO ] Flatten gal took : 32 ms
[2024-06-01 20:44:05] [INFO ] Input system was already deterministic with 972 transitions.
RANDOM walk for 5346 steps (0 resets) in 352 ms. (15 steps per ms) remains 0/1 properties
FORMULA HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-07 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 18 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 18 ms. Remains : 513/513 places, 972/972 transitions.
[2024-06-01 20:44:05] [INFO ] Flatten gal took : 28 ms
[2024-06-01 20:44:05] [INFO ] Flatten gal took : 30 ms
[2024-06-01 20:44:05] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in LTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 9 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 513/513 places, 972/972 transitions.
[2024-06-01 20:44:05] [INFO ] Flatten gal took : 26 ms
[2024-06-01 20:44:05] [INFO ] Flatten gal took : 29 ms
[2024-06-01 20:44:05] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 28 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 29 ms. Remains : 513/513 places, 972/972 transitions.
[2024-06-01 20:44:05] [INFO ] Flatten gal took : 25 ms
[2024-06-01 20:44:05] [INFO ] Flatten gal took : 34 ms
[2024-06-01 20:44:05] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in LTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 8 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 513/513 places, 972/972 transitions.
[2024-06-01 20:44:05] [INFO ] Flatten gal took : 26 ms
[2024-06-01 20:44:05] [INFO ] Flatten gal took : 28 ms
[2024-06-01 20:44:06] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 22 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 23 ms. Remains : 513/513 places, 972/972 transitions.
[2024-06-01 20:44:06] [INFO ] Flatten gal took : 29 ms
[2024-06-01 20:44:06] [INFO ] Flatten gal took : 35 ms
[2024-06-01 20:44:06] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in LTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 8 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 513/513 places, 972/972 transitions.
[2024-06-01 20:44:06] [INFO ] Flatten gal took : 26 ms
[2024-06-01 20:44:06] [INFO ] Flatten gal took : 30 ms
[2024-06-01 20:44:06] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in LTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 8 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 513/513 places, 972/972 transitions.
[2024-06-01 20:44:06] [INFO ] Flatten gal took : 26 ms
[2024-06-01 20:44:06] [INFO ] Flatten gal took : 29 ms
[2024-06-01 20:44:06] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in LTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 8 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 513/513 places, 972/972 transitions.
[2024-06-01 20:44:06] [INFO ] Flatten gal took : 27 ms
[2024-06-01 20:44:06] [INFO ] Flatten gal took : 30 ms
[2024-06-01 20:44:06] [INFO ] Input system was already deterministic with 972 transitions.
[2024-06-01 20:44:06] [INFO ] Flatten gal took : 30 ms
[2024-06-01 20:44:06] [INFO ] Flatten gal took : 31 ms
[2024-06-01 20:44:06] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 6 ms.
[2024-06-01 20:44:06] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 513 places, 972 transitions and 3888 arcs took 15 ms.
Total runtime 70396 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=
[--mu-opt] [--saturation=
[--sat-granularity=
[--guidance=
[--action=
[--trace=
[--mu=
[--ctl=
[--save-levels=STRING] [--pg-solve] [--attr=
[--saturating-attractor] [--write-strategy=
[--check-strategy] [--interactive-play] [--player]
[--pg-write=
[--edge-label=
[--mucalc=
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por=
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=
[--cw-max-cols=
[--mh-timeout=
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=
[--ldd32-cache=
[--cache-ratio=
[--min-free-nodes=
[--fdd-reorder=
[--vset-cache-diff=
[--next-union] [--peak-nodes] [--maxsum=
[--block-size=
[--debug=
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS]
Could not compute solution for formula : HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-00
Could not compute solution for formula : HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-01
Could not compute solution for formula : HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-02
Could not compute solution for formula : HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-03
Could not compute solution for formula : HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-04
Could not compute solution for formula : HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-05
Could not compute solution for formula : HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-06
Could not compute solution for formula : HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-08
Could not compute solution for formula : HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-09
Could not compute solution for formula : HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-10
Could not compute solution for formula : HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-11
Could not compute solution for formula : HypertorusGrid-PT-d3k3p2b06-CTLFireability-2023-12
Could not compute solution for formula : HypertorusGrid-PT-d3k3p2b06-CTLFireability-2023-13
Could not compute solution for formula : HypertorusGrid-PT-d3k3p2b06-CTLFireability-2023-14
Could not compute solution for formula : HypertorusGrid-PT-d3k3p2b06-CTLFireability-2023-15
BK_STOP 1717274647327
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/519/ctl_0_
ctl formula name HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/519/ctl_1_
ctl formula name HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/519/ctl_2_
ctl formula name HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/519/ctl_3_
ctl formula name HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/519/ctl_4_
ctl formula name HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/519/ctl_5_
ctl formula name HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/519/ctl_6_
ctl formula name HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/519/ctl_7_
ctl formula name HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/519/ctl_8_
ctl formula name HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/519/ctl_9_
ctl formula name HypertorusGrid-PT-d3k3p2b06-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/519/ctl_10_
ctl formula name HypertorusGrid-PT-d3k3p2b06-CTLFireability-2023-12
ctl formula formula --ctl=/tmp/519/ctl_11_
ctl formula name HypertorusGrid-PT-d3k3p2b06-CTLFireability-2023-13
ctl formula formula --ctl=/tmp/519/ctl_12_
ctl formula name HypertorusGrid-PT-d3k3p2b06-CTLFireability-2023-14
ctl formula formula --ctl=/tmp/519/ctl_13_
ctl formula name HypertorusGrid-PT-d3k3p2b06-CTLFireability-2023-15
ctl formula formula --ctl=/tmp/519/ctl_14_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="HypertorusGrid-PT-d3k3p2b06"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is HypertorusGrid-PT-d3k3p2b06, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r500-smll-171649587900306"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/HypertorusGrid-PT-d3k3p2b06.tgz
mv HypertorusGrid-PT-d3k3p2b06 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;