Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r500-smll-171649587500130.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is HirschbergSinclair-PT-50, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r500-smll-171649587500130
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.1M
-rw-r--r-- 1 mcc users 11K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 85K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 35K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 5.1K May 19 07:10 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K May 19 15:59 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.1K May 19 07:19 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 19 18:29 LTLFireability.xml
-rw-r--r-- 1 mcc users 17K Apr 13 02:59 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 126K Apr 13 02:59 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Apr 13 02:59 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 73K Apr 13 02:59 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.1K Apr 22 14:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Apr 22 14:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 652K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME HirschbergSinclair-PT-50-CTLFireability-2024-00
FORMULA_NAME HirschbergSinclair-PT-50-CTLFireability-2024-01
FORMULA_NAME HirschbergSinclair-PT-50-CTLFireability-2024-02
FORMULA_NAME HirschbergSinclair-PT-50-CTLFireability-2024-03
FORMULA_NAME HirschbergSinclair-PT-50-CTLFireability-2024-04
FORMULA_NAME HirschbergSinclair-PT-50-CTLFireability-2024-05
FORMULA_NAME HirschbergSinclair-PT-50-CTLFireability-2024-06
FORMULA_NAME HirschbergSinclair-PT-50-CTLFireability-2024-07
FORMULA_NAME HirschbergSinclair-PT-50-CTLFireability-2024-08
FORMULA_NAME HirschbergSinclair-PT-50-CTLFireability-2024-09
FORMULA_NAME HirschbergSinclair-PT-50-CTLFireability-2024-10
FORMULA_NAME HirschbergSinclair-PT-50-CTLFireability-2024-11
FORMULA_NAME HirschbergSinclair-PT-50-CTLFireability-2023-12
FORMULA_NAME HirschbergSinclair-PT-50-CTLFireability-2023-13
FORMULA_NAME HirschbergSinclair-PT-50-CTLFireability-2023-14
FORMULA_NAME HirschbergSinclair-PT-50-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717255086961

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=HirschbergSinclair-PT-50
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 15:18:09] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 15:18:09] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 15:18:09] [INFO ] Load time of PNML (sax parser for PT used): 312 ms
[2024-06-01 15:18:09] [INFO ] Transformed 1208 places.
[2024-06-01 15:18:09] [INFO ] Transformed 1102 transitions.
[2024-06-01 15:18:09] [INFO ] Parsed PT model containing 1208 places and 1102 transitions and 3361 arcs in 603 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 45 ms.
Support contains 95 out of 1208 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1208/1208 places, 1102/1102 transitions.
Reduce places removed 50 places and 0 transitions.
Iterating post reduction 0 with 50 rules applied. Total rules applied 50 place count 1158 transition count 1102
Discarding 45 places :
Symmetric choice reduction at 1 with 45 rule applications. Total rules 95 place count 1113 transition count 1057
Iterating global reduction 1 with 45 rules applied. Total rules applied 140 place count 1113 transition count 1057
Discarding 40 places :
Symmetric choice reduction at 1 with 40 rule applications. Total rules 180 place count 1073 transition count 1017
Iterating global reduction 1 with 40 rules applied. Total rules applied 220 place count 1073 transition count 1017
Applied a total of 220 rules in 568 ms. Remains 1073 /1208 variables (removed 135) and now considering 1017/1102 (removed 85) transitions.
// Phase 1: matrix 1017 rows 1073 cols
[2024-06-01 15:18:10] [INFO ] Computed 56 invariants in 59 ms
[2024-06-01 15:18:12] [INFO ] Implicit Places using invariants in 1903 ms returned []
[2024-06-01 15:18:12] [INFO ] Invariant cache hit.
[2024-06-01 15:18:19] [INFO ] Implicit Places using invariants and state equation in 6912 ms returned []
Implicit Place search using SMT with State Equation took 8877 ms to find 0 implicit places.
Running 967 sub problems to find dead transitions.
[2024-06-01 15:18:19] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/1023 variables, 6/6 constraints. Problems are: Problem set: 0 solved, 967 unsolved
Error getting values : (error "ParserException while parsing response: ((s1 1.0)
(s3 1.0)
(s5 1.0)
(s7 1.0)
(s9 1.0)
(s11 1.0)
(s13 1.0)
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(s17 1.0)
(s19 1.0)
(s21 1.0)
(s23 1.0)
(s25 1.0)
(s27 1.0)
(s29 1.0)
(s31 1.0)
(s33 1.0)
(s35 1.0)
(s37 1.0)
(s39 1.0)
(s41 1.0)
(s43 1.0)
(s45 1.0)
(s47 1.0)
(s49 1.0)
(s51 1.0)
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(s55 1.0)
(s57 1.0)
(s59 1.0)
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(s63 1.0)
(s65 1.0)
(s67 1.0)
(s69 1.0)
(s71 1.0)
(s73 1.0)
(s75 1.0)
(s77 1.0)
(s79 1.0)
(s81 1.0)
(s83 1.0)
(s85 1.0)
(s87 1.0)
(s89 1.0)
(s91 1.0)
(s93 1.0)
(s95 1.0)
(s97 1.0)
(s99 1.0)
(s100 1.0)
(s101 1.0)
(s102 1.0)
(s103 1.0)
(s104 1.0)
(s105 1.0)
(s106 1.0)
(s107 1.0)
(s108 1.0)
(s109 1.0)
(s110 1.0)
(s111 1.0)
(s112 1.0)
(s113 1.0)
(s114 1.0)
(s115 1.0)
(s116 1.0)
(s117 1.0)
(s118 1.0)
(s119 1.0)
(s120 1.0)
(s121 1.0)
(s122 1.0)
(s123 1.0)
(s124 1.0)
(s125 1.0)
(s126 1.0)
(s127 1.0)
(s128 1.0)
(s129 1.0)
(s130 1.0)
(s131 1.0)
(s132 1.0)
(s133 1.0)
(s134 1.0)
(s135 1.0)
(s136 1.0)
(s137 1.0)
(s138 1.0)
(s139 1.0)
(s140 1.0)
(s141 1.0)
(s142 1.0)
(s143 1.0)
(s144 1.0)
(s145 1.0)
(s146 1.0)
(s147 1.0)
(s148 1.0)
(s149 1.0)
(s150 1.0)
(s151 1.0)
(s152 1.0)
(s153 1.0)
(s154 1.0)
(s155 1.0)
(s156 1.0)
(s157 1.0)
(s158 1.0)
(s159 1.0)
(s160 1.0)
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(s162 1.0)
(s163 1.0)
(s164 1.0)
(s165 1.0)
(s166 1.0)
(s167 1.0)
(s168 1.0)
(s169 1.0)
(s170 1.0)
(s171 1.0)
(s172 1.0)
(s173 1.0)
(s174 1.0)
(s175 1.0)
(s176 1.0)
(s177 1.0)
(s178 1.0)
(s179 1.0)
(s180 1.0)
(s181 1.0)
(s182 1.0)
(s183 1.0)
(s184 1.0)
(s185 1.0)
(s186 1.0)
(s187 1.0)
(s188 1.0)
(s189 1.0)
(s190 1.0)
(s191 1.0)
(s192 1.0)
(s193 1.0)
(s194 1.0)
(s195 1.0)
(s196 1.0)
(s197 1.0)
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(s199 1.0)
(s200 1.0)
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(s202 1.0)
(s203 1.0)
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(s206 1.0)
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(s208 1.0)
(s209 1.0)
(s210 1.0)
(s211 1.0)
(s212 1.0)
(s213 1.0)
(s214 1.0)
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(s216 1.0)
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(s218 1.0)
(s219 1.0)
(s220 1.0)
(s221 1.0)
(s222 1.0)
(s223 1.0)
(s224 1.0)
(s225 1.0)
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(s227 1.0)
(s228 1.0)
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(s230 1.0)
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(s232 1.0)
(s233 1.0)
(s234 1.0)
(s235 1.0)
(s236 1.0)
(s237 1.0)
(s238 1.0)
(s239 1.0)
(s240 1.0)
(s241 1.0)
(s242 1.0)
(s243 1.0)
(s244 1.0)
(s245 1.0)
(s246 1.0)
(s247 1.0)
(s248 1.0)
(s249 1.0)
(s250 1.0)
(s251 1.0)
(s252 1.0)
(s253 1.0)
(s254 1.0)
(s255 1.0)
(s256 1.0)
(s257 1.0)
(s258 1.0)
(s259 1.0)
(s260 1.0)
(s261 1.0)
(s262 1.0)
(s263 1.0)
(s264 1.0)
(s265 1.0)
(s266 1.0)
(s267 1.0)
(s268 1.0)
(s269 1.0)
(s270 1.0)
(s271 1.0)
(s272 1.0)
(s273 1.0)
(s274 1.0)
(s275 1.0)
(s276 1.0)
(s277 1.0)
(s278 1.0)
(s279 1.0)
(s280 1.0)
(s281 1.0)
(s282 1.0)
(s283 1.0)
(s284 1.0)
(s285 1.0)
(s286 1.0)
(s287 1.0)
(s288 1.0)
(s289 1.0)
(s290 1.0)
(s291 1.0)
(s292 1.0)
(s293 1.0)
(s294 1.0)
(s295 1.0)
(s296 1.0)
(s297 1.0)
(s298 1.0)
(s299 1.0)
(s300 1.0)
(s301 1.0)
(s302 1.0)
(s303 1.0)
(s304 1.0)
(s305 1.0)
(s306 1.0)
(s307 1.0)
(s308 1.0)
(s309 1.0)
(s310 1.0)
(s311 1.0)
(s312 1.0)
(s313 1.0)
(s314 1.0)
(s315 1.0)
(s316 1.0)
(s317 1.0)
(s318 1.0)
(s319 1.0)
(s320 1.0)
(s321 1.0)
(s322 1.0)
(s323 1.0)
(s324 1.0)
(s325 1.0)
(s326 1.0)
(s327 1.0)
(s328 1.0)
(s329 1.0)
(s330 1.0)
(s331 1.0)
(s332 1.0)
(s333 1.0)
(s334 1.0)
(s335 1.0)
(s336 1.0)
(s337 1.0)
(s338 1.0)
(s339 1.0)
(s340 1.0)
(s341 1.0)
(s342 1.0)
(s343 1.0)
(s344 1.0)
(s345 1.0)
(s346 1.0)
(s347 1.0)
(s348 1.0)
(s349 1.0)
(s350 1.0)
(s351 1.0)
(s352 1.0)
(s353 1.0)
(s354 1.0)
(s355 1.0)
(s356 1.0)
(s357 1.0)
(s358 1.0)
(s359 1.0)
(s360 1.0)
(s361 1.0)
(s362 1.0)
(s363 1.0)
(s364 1.0)
(s365 1.0)
(s366 1.0)
(s367 1.0)
(s368 timeout
org.smtlib.IParser$ParserException: Unbalanced parentheses at end of input")
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 1023/2090 variables, and 6 constraints, problems are : Problem set: 0 solved, 967 unsolved in 30086 ms.
Refiners :[Generalized P Invariants (flows): 6/56 constraints, State Equation: 0/1073 constraints, PredecessorRefiner: 967/967 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 967 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/1023 variables, 6/6 constraints. Problems are: Problem set: 0 solved, 967 unsolved
Error getting values : (error "ParserException while parsing response: ((s1 1)
(s3 1)
(s5 1)
(s7 1)
(s9 1)
(s11 1)
(s13 1)
(s15 1)
(s17 1)
(s19 1)
(s21 1)
(s23 1)
(s25 1)
(s27 1)
(s29 1)
(s31 1)
(s33 1)
(s35 1)
(s37 1)
(s39 1)
(s41 1)
(s43 1)
(s45 1)
(s47 1)
(s49 1)
(s51 1)
(s53 1)
(s55 1)
(s57 1)
(s59 1)
(s61 1)
(s63 1)
(s65 1)
(s67 1)
(s69 1)
(s71 1)
(s73 1)
(s75 1)
(s77 1)
(s79 1)
(s81 1)
(s83 1)
(s85 1)
(s87 1)
(s89 1)
(s91 1)
(s93 1)
(s95 1)
(s97 1)
(s99 1)
(s100 1)
(s101 1)
(s102 1)
(s103 1)
(s104 1)
(s105 1)
(s106 1)
(s107 1)
(s108 1)
(s109 1)
(s110 1)
(s111 1)
(s112 1)
(s113 1)
(s114 1)
(s115 1)
(s116 1)
(s117 1)
(s118 1)
(s119 1)
(s120 1)
(s121 1)
(s122 1)
(s123 1)
(s124 1)
(s125 1)
(s126 1)
(s127 1)
(s128 1)
(s129 1)
(s130 1)
(s131 1)
(s132 1)
(s133 1)
(s134 1)
(s135 1)
(s136 1)
(s137 1)
(s138 1)
(s139 1)
(s140 1)
(s141 1)
(s142 1)
(s143 1)
(s144 1)
(s145 1)
(s146 1)
(s147 1)
(s148 1)
(s149 1)
(s150 1)
(s151 1)
(s152 1)
(s153 1)
(s154 1)
(s155 1)
(s156 1)
(s157 1)
(s158 1)
(s159 1)
(s160 1)
(s161 1)
(s162 1)
(s163 1)
(s164 1)
(s165 1)
(s166 1)
(s167 1)
(s168 1)
(s169 1)
(s170 1)
(s171 1)
(s172 1)
(s173 1)
(s174 1)
(s175 1)
(s176 1)
(s177 1)
(s178 1)
(s179 1)
(s180 1)
(s181 1)
(s182 1)
(s183 1)
(s184 1)
(s185 1)
(s186 1)
(s187 1)
(s188 1)
(s189 1)
(s190 1)
(s191 1)
(s192 1)
(s193 1)
(s194 1)
(s195 1)
(s196 1)
(s197 1)
(s198 1)
(s199 1)
(s200 1)
(s201 1)
(s202 1)
(s203 1)
(s204 1)
(s205 1)
(s206 1)
(s207 1)
(s208 1)
(s209 1)
(s210 1)
(s211 1)
(s212 1)
(s213 1)
(s214 1)
(s215 1)
(s216 1)
(s217 1)
(s218 1)
(s219 1)
(s220 1)
(s221 1)
(s222 1)
(s223 1)
(s224 1)
(s225 1)
(s226 1)
(s227 1)
(s228 1)
(s229 1)
(s230 1)
(s231 1)
(s232 1)
(s233 1)
(s234 1)
(s235 1)
(s236 1)
(s237 1)
(s238 1)
(s239 1)
(s240 1)
(s241 1)
(s242 1)
(s243 1)
(s244 1)
(s245 1)
(s246 1)
(s247 1)
(s248 1)
(s249 1)
(s250 1)
(s251 1)
(s252 1)
(s253 1)
(s254 1)
(s255 1)
(s256 1)
(s257 1)
(s258 1)
(s259 1)
(s260 1)
(s261 1)
(s262 1)
(s263 1)
(s264 1)
(s265 1)
(s266 1)
(s267 1)
(s268 1)
(s269 1)
(s270 1)
(s271 1)
(s272 1)
(s273 1)
(s274 1)
(s275 1)
(s276 1)
(s277 1)
(s278 1)
(s279 1)
(s280 1)
(s281 1)
(s282 1)
(s283 1)
(s284 1)
(s285 1)
(s286 1)
(s287 1)
(s288 1)
(s289 1)
(s290 1)
(s291 1)
(s292 1)
(s293 1)
(s294 1)
(s295 1)
(s296 1)
(s297 1)
(s298 1)
(s299 1)
(s300 1)
(s301 1)
(s302 1)
(s303 1)
(s304 1)
(s305 1)
(s306 1)
(s307 1)
(s308 1)
(s309 1)
(s310 1)
(s311 1)
(s312 1)
(s313 1)
(s314 1)
(s315 1)
(s316 1)
(s317 1)
(s318 1)
(s319 1)
(s320 1)
(s321 1)
(s322 1)
(s323 1)
(s324 1)
(s325 1)
(s326 1)
(s327 1)
(s328 1)
(s329 1)
(s330 1)
(s331 1)
(s332 1)
(s333 1)
(s334 1)
(s335 1)
(s336 1)
(s337 1)
(s338 1)
(s339 1)
(s340 1)
(s341 1)
(s342 1)
(s343 1)
(s344 1)
(s345 1)
(s346 1)
(s347 1)
(s348 1)
(s349 1)
(s350 1)
(s351 1)
(s352 1)
(s353 1)
(s354 1)
(s355 1)
(s356 1)
(s357 1)
(s358 1)
(s359 1)
(s360 1)
(s361 1)
(s362 1)
(s363 1)
(s364 1)
(s365 1)
(s366 1)
(s367 1)
(s368 1)
(s369 1)
(s370 1)
(s371 1)
(s372 1)
(s373 1)
(s374 1)
(s375 1)
(s376 1)
(s377 1)
(s378 1)
(s379 1)
(s380 1)
(s381 1)
(s382 1)
(s383 1)
(s384 1)
(s385 1)
(s386 1)
(s387 1)
(s388 1)
(s389 1)
(s390 1)
(s391 1)
(s392 1)
(s393 1)
(s394 1)
(s395 1)
(s396 1)
(s397 1)
(s398 1)
(s399 1)
(s400 1)
(s401 1)
(s402 1)
(s403 1)
(s404 1)
(s405 1)
(s406 1)
(s407 1)
(s408 1)
(s409 1)
(s410 1)
(s411 1)
(s412 1)
(s413 1)
(s414 1)
(s415 1)
(s416 1)
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(s738 timeout
org.smtlib.IParser$ParserException: Unbalanced parentheses at end of input")
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 1023/2090 variables, and 6 constraints, problems are : Problem set: 0 solved, 967 unsolved in 30045 ms.
Refiners :[Generalized P Invariants (flows): 6/56 constraints, State Equation: 0/1073 constraints, PredecessorRefiner: 0/967 constraints, Known Traps: 0/0 constraints]
After SMT, in 60911ms problems are : Problem set: 0 solved, 967 unsolved
Search for dead transitions found 0 dead transitions in 60976ms
Starting structural reductions in LTL mode, iteration 1 : 1073/1208 places, 1017/1102 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 70478 ms. Remains : 1073/1208 places, 1017/1102 transitions.
Support contains 95 out of 1073 places after structural reductions.
[2024-06-01 15:19:21] [INFO ] Flatten gal took : 246 ms
[2024-06-01 15:19:21] [INFO ] Flatten gal took : 150 ms
[2024-06-01 15:19:21] [INFO ] Input system was already deterministic with 1017 transitions.
RANDOM walk for 40000 steps (36 resets) in 2864 ms. (13 steps per ms) remains 2/61 properties
BEST_FIRST walk for 40004 steps (8 resets) in 297 ms. (134 steps per ms) remains 2/2 properties
BEST_FIRST walk for 40004 steps (8 resets) in 220 ms. (181 steps per ms) remains 2/2 properties
[2024-06-01 15:19:22] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/7 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 1 (OVERLAPS) 930/937 variables, 53/53 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/937 variables, 0/53 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 3 (OVERLAPS) 29/966 variables, 3/56 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/966 variables, 0/56 constraints. Problems are: Problem set: 0 solved, 2 unsolved
Problem AtomicPropp36 is UNSAT
Problem AtomicPropp51 is UNSAT
After SMT solving in domain Real declared 1983/2090 variables, and 1022 constraints, problems are : Problem set: 2 solved, 0 unsolved in 1536 ms.
Refiners :[Generalized P Invariants (flows): 56/56 constraints, State Equation: 966/1073 constraints, PredecessorRefiner: 2/2 constraints, Known Traps: 0/0 constraints]
After SMT, in 1578ms problems are : Problem set: 2 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 2 atomic propositions for a total of 16 simplifications.
[2024-06-01 15:19:24] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2024-06-01 15:19:24] [INFO ] Flatten gal took : 66 ms
FORMULA HirschbergSinclair-PT-50-CTLFireability-2023-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 15:19:24] [INFO ] Flatten gal took : 59 ms
[2024-06-01 15:19:24] [INFO ] Input system was already deterministic with 1017 transitions.
Support contains 82 out of 1073 places (down from 85) after GAL structural reductions.
Computed a total of 1073 stabilizing places and 1017 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 1073 transition count 1017
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 3 formulas.
FORMULA HirschbergSinclair-PT-50-CTLFireability-2024-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA HirschbergSinclair-PT-50-CTLFireability-2024-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in LTL mode, iteration 0 : 1073/1073 places, 1017/1017 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 1068 transition count 1012
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 1068 transition count 1012
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 13 place count 1065 transition count 1009
Iterating global reduction 0 with 3 rules applied. Total rules applied 16 place count 1065 transition count 1009
Applied a total of 16 rules in 346 ms. Remains 1065 /1073 variables (removed 8) and now considering 1009/1017 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 346 ms. Remains : 1065/1073 places, 1009/1017 transitions.
[2024-06-01 15:19:25] [INFO ] Flatten gal took : 42 ms
[2024-06-01 15:19:25] [INFO ] Flatten gal took : 48 ms
[2024-06-01 15:19:25] [INFO ] Input system was already deterministic with 1009 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1073/1073 places, 1017/1017 transitions.
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 10 place count 1063 transition count 1007
Iterating global reduction 0 with 10 rules applied. Total rules applied 20 place count 1063 transition count 1007
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 25 place count 1058 transition count 1002
Iterating global reduction 0 with 5 rules applied. Total rules applied 30 place count 1058 transition count 1002
Applied a total of 30 rules in 249 ms. Remains 1058 /1073 variables (removed 15) and now considering 1002/1017 (removed 15) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 249 ms. Remains : 1058/1073 places, 1002/1017 transitions.
[2024-06-01 15:19:25] [INFO ] Flatten gal took : 34 ms
[2024-06-01 15:19:25] [INFO ] Flatten gal took : 35 ms
[2024-06-01 15:19:25] [INFO ] Input system was already deterministic with 1002 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1073/1073 places, 1017/1017 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 1064 transition count 1008
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 1064 transition count 1008
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 22 place count 1060 transition count 1004
Iterating global reduction 0 with 4 rules applied. Total rules applied 26 place count 1060 transition count 1004
Applied a total of 26 rules in 163 ms. Remains 1060 /1073 variables (removed 13) and now considering 1004/1017 (removed 13) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 163 ms. Remains : 1060/1073 places, 1004/1017 transitions.
[2024-06-01 15:19:26] [INFO ] Flatten gal took : 34 ms
[2024-06-01 15:19:26] [INFO ] Flatten gal took : 35 ms
[2024-06-01 15:19:26] [INFO ] Input system was already deterministic with 1004 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1073/1073 places, 1017/1017 transitions.
Reduce places removed 49 places and 49 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 437 transitions
Trivial Post-agglo rules discarded 437 transitions
Performed 437 trivial Post agglomeration. Transition count delta: 437
Iterating post reduction 0 with 437 rules applied. Total rules applied 437 place count 1024 transition count 531
Reduce places removed 437 places and 0 transitions.
Iterating post reduction 1 with 437 rules applied. Total rules applied 874 place count 587 transition count 531
Discarding 10 places :
Symmetric choice reduction at 2 with 10 rule applications. Total rules 884 place count 577 transition count 521
Iterating global reduction 2 with 10 rules applied. Total rules applied 894 place count 577 transition count 521
Drop transitions (Trivial Post-Agglo cleanup.) removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 2 with 5 rules applied. Total rules applied 899 place count 577 transition count 516
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 3 with 5 rules applied. Total rules applied 904 place count 572 transition count 516
Applied a total of 904 rules in 126 ms. Remains 572 /1073 variables (removed 501) and now considering 516/1017 (removed 501) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 126 ms. Remains : 572/1073 places, 516/1017 transitions.
[2024-06-01 15:19:26] [INFO ] Flatten gal took : 15 ms
[2024-06-01 15:19:26] [INFO ] Flatten gal took : 17 ms
[2024-06-01 15:19:26] [INFO ] Input system was already deterministic with 516 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1073/1073 places, 1017/1017 transitions.
Reduce places removed 49 places and 49 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 439 transitions
Trivial Post-agglo rules discarded 439 transitions
Performed 439 trivial Post agglomeration. Transition count delta: 439
Iterating post reduction 0 with 439 rules applied. Total rules applied 439 place count 1024 transition count 529
Reduce places removed 439 places and 0 transitions.
Iterating post reduction 1 with 439 rules applied. Total rules applied 878 place count 585 transition count 529
Discarding 10 places :
Symmetric choice reduction at 2 with 10 rule applications. Total rules 888 place count 575 transition count 519
Iterating global reduction 2 with 10 rules applied. Total rules applied 898 place count 575 transition count 519
Drop transitions (Trivial Post-Agglo cleanup.) removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 2 with 5 rules applied. Total rules applied 903 place count 575 transition count 514
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 3 with 5 rules applied. Total rules applied 908 place count 570 transition count 514
Applied a total of 908 rules in 141 ms. Remains 570 /1073 variables (removed 503) and now considering 514/1017 (removed 503) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 142 ms. Remains : 570/1073 places, 514/1017 transitions.
[2024-06-01 15:19:26] [INFO ] Flatten gal took : 16 ms
[2024-06-01 15:19:26] [INFO ] Flatten gal took : 19 ms
[2024-06-01 15:19:26] [INFO ] Input system was already deterministic with 514 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1073/1073 places, 1017/1017 transitions.
Reduce places removed 49 places and 49 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 433 transitions
Trivial Post-agglo rules discarded 433 transitions
Performed 433 trivial Post agglomeration. Transition count delta: 433
Iterating post reduction 0 with 433 rules applied. Total rules applied 433 place count 1024 transition count 535
Reduce places removed 433 places and 0 transitions.
Iterating post reduction 1 with 433 rules applied. Total rules applied 866 place count 591 transition count 535
Discarding 10 places :
Symmetric choice reduction at 2 with 10 rule applications. Total rules 876 place count 581 transition count 525
Iterating global reduction 2 with 10 rules applied. Total rules applied 886 place count 581 transition count 525
Drop transitions (Trivial Post-Agglo cleanup.) removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 2 with 5 rules applied. Total rules applied 891 place count 581 transition count 520
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 3 with 5 rules applied. Total rules applied 896 place count 576 transition count 520
Applied a total of 896 rules in 96 ms. Remains 576 /1073 variables (removed 497) and now considering 520/1017 (removed 497) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 97 ms. Remains : 576/1073 places, 520/1017 transitions.
[2024-06-01 15:19:26] [INFO ] Flatten gal took : 15 ms
[2024-06-01 15:19:26] [INFO ] Flatten gal took : 17 ms
[2024-06-01 15:19:26] [INFO ] Input system was already deterministic with 520 transitions.
RANDOM walk for 1739 steps (0 resets) in 22 ms. (75 steps per ms) remains 0/1 properties
FORMULA HirschbergSinclair-PT-50-CTLFireability-2024-06 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 1073/1073 places, 1017/1017 transitions.
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 10 place count 1063 transition count 1007
Iterating global reduction 0 with 10 rules applied. Total rules applied 20 place count 1063 transition count 1007
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 25 place count 1058 transition count 1002
Iterating global reduction 0 with 5 rules applied. Total rules applied 30 place count 1058 transition count 1002
Applied a total of 30 rules in 160 ms. Remains 1058 /1073 variables (removed 15) and now considering 1002/1017 (removed 15) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 160 ms. Remains : 1058/1073 places, 1002/1017 transitions.
[2024-06-01 15:19:27] [INFO ] Flatten gal took : 29 ms
[2024-06-01 15:19:27] [INFO ] Flatten gal took : 34 ms
[2024-06-01 15:19:27] [INFO ] Input system was already deterministic with 1002 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1073/1073 places, 1017/1017 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 1064 transition count 1008
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 1064 transition count 1008
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 22 place count 1060 transition count 1004
Iterating global reduction 0 with 4 rules applied. Total rules applied 26 place count 1060 transition count 1004
Applied a total of 26 rules in 165 ms. Remains 1060 /1073 variables (removed 13) and now considering 1004/1017 (removed 13) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 165 ms. Remains : 1060/1073 places, 1004/1017 transitions.
[2024-06-01 15:19:27] [INFO ] Flatten gal took : 30 ms
[2024-06-01 15:19:27] [INFO ] Flatten gal took : 33 ms
[2024-06-01 15:19:27] [INFO ] Input system was already deterministic with 1004 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1073/1073 places, 1017/1017 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 1064 transition count 1008
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 1064 transition count 1008
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 23 place count 1059 transition count 1003
Iterating global reduction 0 with 5 rules applied. Total rules applied 28 place count 1059 transition count 1003
Applied a total of 28 rules in 212 ms. Remains 1059 /1073 variables (removed 14) and now considering 1003/1017 (removed 14) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 213 ms. Remains : 1059/1073 places, 1003/1017 transitions.
[2024-06-01 15:19:27] [INFO ] Flatten gal took : 30 ms
[2024-06-01 15:19:27] [INFO ] Flatten gal took : 31 ms
[2024-06-01 15:19:27] [INFO ] Input system was already deterministic with 1003 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1073/1073 places, 1017/1017 transitions.
Reduce places removed 50 places and 50 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 446 transitions
Trivial Post-agglo rules discarded 446 transitions
Performed 446 trivial Post agglomeration. Transition count delta: 446
Iterating post reduction 0 with 446 rules applied. Total rules applied 446 place count 1023 transition count 521
Reduce places removed 446 places and 0 transitions.
Iterating post reduction 1 with 446 rules applied. Total rules applied 892 place count 577 transition count 521
Discarding 10 places :
Symmetric choice reduction at 2 with 10 rule applications. Total rules 902 place count 567 transition count 511
Iterating global reduction 2 with 10 rules applied. Total rules applied 912 place count 567 transition count 511
Drop transitions (Trivial Post-Agglo cleanup.) removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 2 with 5 rules applied. Total rules applied 917 place count 567 transition count 506
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 3 with 5 rules applied. Total rules applied 922 place count 562 transition count 506
Applied a total of 922 rules in 70 ms. Remains 562 /1073 variables (removed 511) and now considering 506/1017 (removed 511) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 71 ms. Remains : 562/1073 places, 506/1017 transitions.
[2024-06-01 15:19:27] [INFO ] Flatten gal took : 14 ms
[2024-06-01 15:19:27] [INFO ] Flatten gal took : 16 ms
[2024-06-01 15:19:27] [INFO ] Input system was already deterministic with 506 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1073/1073 places, 1017/1017 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 1064 transition count 1008
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 1064 transition count 1008
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 22 place count 1060 transition count 1004
Iterating global reduction 0 with 4 rules applied. Total rules applied 26 place count 1060 transition count 1004
Applied a total of 26 rules in 165 ms. Remains 1060 /1073 variables (removed 13) and now considering 1004/1017 (removed 13) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 165 ms. Remains : 1060/1073 places, 1004/1017 transitions.
[2024-06-01 15:19:28] [INFO ] Flatten gal took : 30 ms
[2024-06-01 15:19:28] [INFO ] Flatten gal took : 30 ms
[2024-06-01 15:19:28] [INFO ] Input system was already deterministic with 1004 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1073/1073 places, 1017/1017 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 1065 transition count 1009
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 1065 transition count 1009
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 20 place count 1061 transition count 1005
Iterating global reduction 0 with 4 rules applied. Total rules applied 24 place count 1061 transition count 1005
Applied a total of 24 rules in 168 ms. Remains 1061 /1073 variables (removed 12) and now considering 1005/1017 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 168 ms. Remains : 1061/1073 places, 1005/1017 transitions.
[2024-06-01 15:19:28] [INFO ] Flatten gal took : 30 ms
[2024-06-01 15:19:28] [INFO ] Flatten gal took : 30 ms
[2024-06-01 15:19:28] [INFO ] Input system was already deterministic with 1005 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1073/1073 places, 1017/1017 transitions.
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 10 place count 1063 transition count 1007
Iterating global reduction 0 with 10 rules applied. Total rules applied 20 place count 1063 transition count 1007
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 25 place count 1058 transition count 1002
Iterating global reduction 0 with 5 rules applied. Total rules applied 30 place count 1058 transition count 1002
Applied a total of 30 rules in 185 ms. Remains 1058 /1073 variables (removed 15) and now considering 1002/1017 (removed 15) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 185 ms. Remains : 1058/1073 places, 1002/1017 transitions.
[2024-06-01 15:19:28] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2024-06-01 15:19:28] [INFO ] Flatten gal took : 31 ms
FORMULA HirschbergSinclair-PT-50-CTLFireability-2023-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 15:19:28] [INFO ] Flatten gal took : 34 ms
[2024-06-01 15:19:28] [INFO ] Input system was already deterministic with 1002 transitions.
[2024-06-01 15:19:28] [INFO ] Flatten gal took : 34 ms
[2024-06-01 15:19:29] [INFO ] Flatten gal took : 36 ms
[2024-06-01 15:19:29] [INFO ] Export to MCC of 11 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms.
[2024-06-01 15:19:29] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 1073 places, 1017 transitions and 3052 arcs took 11 ms.
Total runtime 79879 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : HirschbergSinclair-PT-50-CTLFireability-2024-00
Could not compute solution for formula : HirschbergSinclair-PT-50-CTLFireability-2024-01
Could not compute solution for formula : HirschbergSinclair-PT-50-CTLFireability-2024-02
Could not compute solution for formula : HirschbergSinclair-PT-50-CTLFireability-2024-04
Could not compute solution for formula : HirschbergSinclair-PT-50-CTLFireability-2024-05
Could not compute solution for formula : HirschbergSinclair-PT-50-CTLFireability-2024-07
Could not compute solution for formula : HirschbergSinclair-PT-50-CTLFireability-2024-08
Could not compute solution for formula : HirschbergSinclair-PT-50-CTLFireability-2024-10
Could not compute solution for formula : HirschbergSinclair-PT-50-CTLFireability-2024-11
Could not compute solution for formula : HirschbergSinclair-PT-50-CTLFireability-2023-12
Could not compute solution for formula : HirschbergSinclair-PT-50-CTLFireability-2023-14

BK_STOP 1717255169436

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name HirschbergSinclair-PT-50-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/575/ctl_0_
ctl formula name HirschbergSinclair-PT-50-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/575/ctl_1_
ctl formula name HirschbergSinclair-PT-50-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/575/ctl_2_
ctl formula name HirschbergSinclair-PT-50-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/575/ctl_3_
ctl formula name HirschbergSinclair-PT-50-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/575/ctl_4_
ctl formula name HirschbergSinclair-PT-50-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/575/ctl_5_
ctl formula name HirschbergSinclair-PT-50-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/575/ctl_6_
ctl formula name HirschbergSinclair-PT-50-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/575/ctl_7_
ctl formula name HirschbergSinclair-PT-50-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/575/ctl_8_
ctl formula name HirschbergSinclair-PT-50-CTLFireability-2023-12
ctl formula formula --ctl=/tmp/575/ctl_9_
ctl formula name HirschbergSinclair-PT-50-CTLFireability-2023-14
ctl formula formula --ctl=/tmp/575/ctl_10_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="HirschbergSinclair-PT-50"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is HirschbergSinclair-PT-50, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r500-smll-171649587500130"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/HirschbergSinclair-PT-50.tgz
mv HirschbergSinclair-PT-50 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;