About the Execution of LTSMin+red for GPUForwardProgress-PT-40b
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 560.840 | 52218.00 | 87239.00 | 148.70 | [undef] | Cannot compute |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r496-tall-171640603800618.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is GPUForwardProgress-PT-40b, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r496-tall-171640603800618
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 560K
-rw-r--r-- 1 mcc users 6.7K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 73K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.6K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 51K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Apr 22 14:47 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 22 14:47 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K May 19 07:18 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 19 18:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.4K Apr 11 22:17 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 80K Apr 11 22:17 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Apr 11 22:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 38K Apr 11 22:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 22 14:47 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 22 14:47 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 199K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-2024-00
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-2024-01
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-2024-02
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-2024-03
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-2024-04
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-2024-05
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-2024-06
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-2024-07
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-2024-08
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-2024-09
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-2024-10
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-2024-11
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-2023-12
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-2023-13
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-2023-14
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-2023-15
=== Now, execution of the tool begins
BK_START 1717199450168
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=GPUForwardProgress-PT-40b
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-05-31 23:50:51] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-05-31 23:50:51] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-31 23:50:51] [INFO ] Load time of PNML (sax parser for PT used): 100 ms
[2024-05-31 23:50:51] [INFO ] Transformed 796 places.
[2024-05-31 23:50:51] [INFO ] Transformed 837 transitions.
[2024-05-31 23:50:51] [INFO ] Found NUPN structural information;
[2024-05-31 23:50:51] [INFO ] Parsed PT model containing 796 places and 837 transitions and 2077 arcs in 217 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 13 ms.
Support contains 108 out of 796 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 796/796 places, 837/837 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 795 transition count 837
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 63 place count 733 transition count 775
Iterating global reduction 1 with 62 rules applied. Total rules applied 125 place count 733 transition count 775
Discarding 28 places :
Symmetric choice reduction at 1 with 28 rule applications. Total rules 153 place count 705 transition count 747
Iterating global reduction 1 with 28 rules applied. Total rules applied 181 place count 705 transition count 747
Ensure Unique test removed 26 transitions
Reduce isomorphic transitions removed 26 transitions.
Iterating post reduction 1 with 26 rules applied. Total rules applied 207 place count 705 transition count 721
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 208 place count 704 transition count 720
Iterating global reduction 2 with 1 rules applied. Total rules applied 209 place count 704 transition count 720
Applied a total of 209 rules in 174 ms. Remains 704 /796 variables (removed 92) and now considering 720/837 (removed 117) transitions.
// Phase 1: matrix 720 rows 704 cols
[2024-05-31 23:50:51] [INFO ] Computed 41 invariants in 23 ms
[2024-05-31 23:50:52] [INFO ] Implicit Places using invariants in 365 ms returned []
[2024-05-31 23:50:52] [INFO ] Invariant cache hit.
[2024-05-31 23:50:52] [INFO ] Implicit Places using invariants and state equation in 589 ms returned []
Implicit Place search using SMT with State Equation took 992 ms to find 0 implicit places.
Running 719 sub problems to find dead transitions.
[2024-05-31 23:50:52] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/703 variables, 41/41 constraints. Problems are: Problem set: 0 solved, 719 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/703 variables, 0/41 constraints. Problems are: Problem set: 0 solved, 719 unsolved
At refinement iteration 2 (OVERLAPS) 720/1423 variables, 703/744 constraints. Problems are: Problem set: 0 solved, 719 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/1423 variables, 0/744 constraints. Problems are: Problem set: 0 solved, 719 unsolved
SMT process timed out in 30340ms, After SMT, problems are : Problem set: 0 solved, 719 unsolved
Search for dead transitions found 0 dead transitions in 30363ms
Starting structural reductions in LTL mode, iteration 1 : 704/796 places, 720/837 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 31553 ms. Remains : 704/796 places, 720/837 transitions.
Support contains 108 out of 704 places after structural reductions.
[2024-05-31 23:51:23] [INFO ] Flatten gal took : 70 ms
[2024-05-31 23:51:23] [INFO ] Flatten gal took : 35 ms
[2024-05-31 23:51:23] [INFO ] Input system was already deterministic with 720 transitions.
RANDOM walk for 40000 steps (116 resets) in 2045 ms. (19 steps per ms) remains 32/82 properties
BEST_FIRST walk for 4004 steps (8 resets) in 27 ms. (143 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4003 steps (8 resets) in 18 ms. (210 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4002 steps (8 resets) in 18 ms. (210 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4003 steps (8 resets) in 15 ms. (250 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4004 steps (8 resets) in 13 ms. (286 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4003 steps (8 resets) in 14 ms. (266 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4004 steps (8 resets) in 23 ms. (166 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4004 steps (8 resets) in 17 ms. (222 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4003 steps (8 resets) in 9 ms. (400 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4003 steps (8 resets) in 13 ms. (285 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4004 steps (8 resets) in 8 ms. (444 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4004 steps (8 resets) in 14 ms. (266 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4004 steps (8 resets) in 11 ms. (333 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4002 steps (8 resets) in 15 ms. (250 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4003 steps (8 resets) in 10 ms. (363 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4004 steps (8 resets) in 13 ms. (286 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4004 steps (8 resets) in 17 ms. (222 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4004 steps (8 resets) in 10 ms. (364 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4002 steps (8 resets) in 12 ms. (307 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4004 steps (8 resets) in 13 ms. (286 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4004 steps (8 resets) in 10 ms. (364 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4004 steps (8 resets) in 39 ms. (100 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4004 steps (8 resets) in 12 ms. (308 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4004 steps (8 resets) in 21 ms. (182 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4004 steps (8 resets) in 11 ms. (333 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4003 steps (8 resets) in 19 ms. (200 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4004 steps (8 resets) in 9 ms. (400 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4004 steps (8 resets) in 12 ms. (308 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4004 steps (8 resets) in 10 ms. (364 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4002 steps (8 resets) in 12 ms. (307 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4004 steps (8 resets) in 9 ms. (400 steps per ms) remains 32/32 properties
BEST_FIRST walk for 4003 steps (8 resets) in 11 ms. (333 steps per ms) remains 32/32 properties
[2024-05-31 23:51:24] [INFO ] Invariant cache hit.
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/47 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 32 unsolved
At refinement iteration 1 (OVERLAPS) 656/703 variables, 41/41 constraints. Problems are: Problem set: 0 solved, 32 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/703 variables, 0/41 constraints. Problems are: Problem set: 0 solved, 32 unsolved
At refinement iteration 3 (OVERLAPS) 720/1423 variables, 703/744 constraints. Problems are: Problem set: 0 solved, 32 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/1423 variables, 0/744 constraints. Problems are: Problem set: 0 solved, 32 unsolved
At refinement iteration 5 (OVERLAPS) 1/1424 variables, 1/745 constraints. Problems are: Problem set: 0 solved, 32 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/1424 variables, 0/745 constraints. Problems are: Problem set: 0 solved, 32 unsolved
At refinement iteration 7 (OVERLAPS) 0/1424 variables, 0/745 constraints. Problems are: Problem set: 0 solved, 32 unsolved
No progress, stopping.
After SMT solving in domain Real declared 1424/1424 variables, and 745 constraints, problems are : Problem set: 0 solved, 32 unsolved in 2547 ms.
Refiners :[Generalized P Invariants (flows): 41/41 constraints, State Equation: 704/704 constraints, PredecessorRefiner: 32/32 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 32 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/47 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 32 unsolved
At refinement iteration 1 (OVERLAPS) 656/703 variables, 41/41 constraints. Problems are: Problem set: 0 solved, 32 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/703 variables, 0/41 constraints. Problems are: Problem set: 0 solved, 32 unsolved
At refinement iteration 3 (OVERLAPS) 720/1423 variables, 703/744 constraints. Problems are: Problem set: 0 solved, 32 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/1423 variables, 32/776 constraints. Problems are: Problem set: 0 solved, 32 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/1423 variables, 0/776 constraints. Problems are: Problem set: 0 solved, 32 unsolved
At refinement iteration 6 (OVERLAPS) 1/1424 variables, 1/777 constraints. Problems are: Problem set: 0 solved, 32 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/1424 variables, 0/777 constraints. Problems are: Problem set: 0 solved, 32 unsolved
At refinement iteration 8 (OVERLAPS) 0/1424 variables, 0/777 constraints. Problems are: Problem set: 0 solved, 32 unsolved
No progress, stopping.
After SMT solving in domain Int declared 1424/1424 variables, and 777 constraints, problems are : Problem set: 0 solved, 32 unsolved in 4662 ms.
Refiners :[Generalized P Invariants (flows): 41/41 constraints, State Equation: 704/704 constraints, PredecessorRefiner: 32/32 constraints, Known Traps: 0/0 constraints]
After SMT, in 7240ms problems are : Problem set: 0 solved, 32 unsolved
Fused 32 Parikh solutions to 21 different solutions.
Finished Parikh walk after 608 steps, including 0 resets, run visited all 1 properties in 4 ms. (steps per millisecond=152 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Parikh walk visited 32 properties in 8093 ms.
[2024-05-31 23:51:39] [INFO ] Flatten gal took : 27 ms
[2024-05-31 23:51:39] [INFO ] Flatten gal took : 26 ms
[2024-05-31 23:51:39] [INFO ] Input system was already deterministic with 720 transitions.
Computed a total of 137 stabilizing places and 137 stable transitions
Graph (complete) has 1089 edges and 704 vertex of which 660 are kept as prefixes of interest. Removing 44 places using SCC suffix rule.25 ms
Starting structural reductions in LTL mode, iteration 0 : 704/704 places, 720/720 transitions.
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 28 place count 676 transition count 692
Iterating global reduction 0 with 28 rules applied. Total rules applied 56 place count 676 transition count 692
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 60 place count 676 transition count 688
Discarding 11 places :
Symmetric choice reduction at 1 with 11 rule applications. Total rules 71 place count 665 transition count 677
Iterating global reduction 1 with 11 rules applied. Total rules applied 82 place count 665 transition count 677
Ensure Unique test removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 1 with 10 rules applied. Total rules applied 92 place count 665 transition count 667
Applied a total of 92 rules in 49 ms. Remains 665 /704 variables (removed 39) and now considering 667/720 (removed 53) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 49 ms. Remains : 665/704 places, 667/720 transitions.
[2024-05-31 23:51:40] [INFO ] Flatten gal took : 21 ms
[2024-05-31 23:51:40] [INFO ] Flatten gal took : 22 ms
[2024-05-31 23:51:40] [INFO ] Input system was already deterministic with 667 transitions.
Starting structural reductions in LTL mode, iteration 0 : 704/704 places, 720/720 transitions.
Discarding 27 places :
Symmetric choice reduction at 0 with 27 rule applications. Total rules 27 place count 677 transition count 693
Iterating global reduction 0 with 27 rules applied. Total rules applied 54 place count 677 transition count 693
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 58 place count 677 transition count 689
Discarding 10 places :
Symmetric choice reduction at 1 with 10 rule applications. Total rules 68 place count 667 transition count 679
Iterating global reduction 1 with 10 rules applied. Total rules applied 78 place count 667 transition count 679
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 1 with 9 rules applied. Total rules applied 87 place count 667 transition count 670
Applied a total of 87 rules in 57 ms. Remains 667 /704 variables (removed 37) and now considering 670/720 (removed 50) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 57 ms. Remains : 667/704 places, 670/720 transitions.
[2024-05-31 23:51:40] [INFO ] Flatten gal took : 21 ms
[2024-05-31 23:51:40] [INFO ] Flatten gal took : 19 ms
[2024-05-31 23:51:40] [INFO ] Input system was already deterministic with 670 transitions.
Starting structural reductions in LTL mode, iteration 0 : 704/704 places, 720/720 transitions.
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 28 place count 676 transition count 692
Iterating global reduction 0 with 28 rules applied. Total rules applied 56 place count 676 transition count 692
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 60 place count 676 transition count 688
Discarding 11 places :
Symmetric choice reduction at 1 with 11 rule applications. Total rules 71 place count 665 transition count 677
Iterating global reduction 1 with 11 rules applied. Total rules applied 82 place count 665 transition count 677
Ensure Unique test removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 1 with 10 rules applied. Total rules applied 92 place count 665 transition count 667
Applied a total of 92 rules in 54 ms. Remains 665 /704 variables (removed 39) and now considering 667/720 (removed 53) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 55 ms. Remains : 665/704 places, 667/720 transitions.
[2024-05-31 23:51:40] [INFO ] Flatten gal took : 18 ms
[2024-05-31 23:51:40] [INFO ] Flatten gal took : 19 ms
[2024-05-31 23:51:40] [INFO ] Input system was already deterministic with 667 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 704/704 places, 720/720 transitions.
Graph (trivial) has 583 edges and 704 vertex of which 6 / 704 are part of one of the 1 SCC in 4 ms
Free SCC test removed 5 places
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Graph (complete) has 1083 edges and 699 vertex of which 655 are kept as prefixes of interest. Removing 44 places using SCC suffix rule.7 ms
Discarding 44 places :
Also discarding 3 output transitions
Drop transitions (Output transitions of discarded places.) removed 3 transitions
Reduce places removed 1 places and 1 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 345 transitions
Trivial Post-agglo rules discarded 345 transitions
Performed 345 trivial Post agglomeration. Transition count delta: 345
Iterating post reduction 0 with 345 rules applied. Total rules applied 347 place count 654 transition count 365
Reduce places removed 345 places and 0 transitions.
Ensure Unique test removed 13 transitions
Reduce isomorphic transitions removed 13 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 1 with 362 rules applied. Total rules applied 709 place count 309 transition count 348
Reduce places removed 4 places and 0 transitions.
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Iterating post reduction 2 with 7 rules applied. Total rules applied 716 place count 305 transition count 345
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 3 with 3 rules applied. Total rules applied 719 place count 302 transition count 345
Performed 84 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 84 Pre rules applied. Total rules applied 719 place count 302 transition count 261
Deduced a syphon composed of 84 places in 0 ms
Reduce places removed 84 places and 0 transitions.
Iterating global reduction 4 with 168 rules applied. Total rules applied 887 place count 218 transition count 261
Discarding 39 places :
Symmetric choice reduction at 4 with 39 rule applications. Total rules 926 place count 179 transition count 222
Iterating global reduction 4 with 39 rules applied. Total rules applied 965 place count 179 transition count 222
Performed 78 Post agglomeration using F-continuation condition.Transition count delta: 78
Deduced a syphon composed of 78 places in 0 ms
Reduce places removed 78 places and 0 transitions.
Iterating global reduction 4 with 156 rules applied. Total rules applied 1121 place count 101 transition count 144
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 4 with 1 rules applied. Total rules applied 1122 place count 101 transition count 143
Discarding 1 places :
Symmetric choice reduction at 5 with 1 rule applications. Total rules 1123 place count 100 transition count 142
Iterating global reduction 5 with 1 rules applied. Total rules applied 1124 place count 100 transition count 142
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 1126 place count 99 transition count 141
Partial Post-agglomeration rule applied 1 times.
Drop transitions (Partial Post agglomeration) removed 1 transitions
Iterating global reduction 5 with 1 rules applied. Total rules applied 1127 place count 99 transition count 141
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 5 with 1 rules applied. Total rules applied 1128 place count 98 transition count 140
Applied a total of 1128 rules in 133 ms. Remains 98 /704 variables (removed 606) and now considering 140/720 (removed 580) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 139 ms. Remains : 98/704 places, 140/720 transitions.
[2024-05-31 23:51:40] [INFO ] Flatten gal took : 4 ms
[2024-05-31 23:51:40] [INFO ] Flatten gal took : 4 ms
[2024-05-31 23:51:40] [INFO ] Input system was already deterministic with 140 transitions.
Starting structural reductions in LTL mode, iteration 0 : 704/704 places, 720/720 transitions.
Discarding 29 places :
Symmetric choice reduction at 0 with 29 rule applications. Total rules 29 place count 675 transition count 691
Iterating global reduction 0 with 29 rules applied. Total rules applied 58 place count 675 transition count 691
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 62 place count 675 transition count 687
Discarding 11 places :
Symmetric choice reduction at 1 with 11 rule applications. Total rules 73 place count 664 transition count 676
Iterating global reduction 1 with 11 rules applied. Total rules applied 84 place count 664 transition count 676
Ensure Unique test removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 1 with 10 rules applied. Total rules applied 94 place count 664 transition count 666
Applied a total of 94 rules in 93 ms. Remains 664 /704 variables (removed 40) and now considering 666/720 (removed 54) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 93 ms. Remains : 664/704 places, 666/720 transitions.
[2024-05-31 23:51:40] [INFO ] Flatten gal took : 16 ms
[2024-05-31 23:51:40] [INFO ] Flatten gal took : 16 ms
[2024-05-31 23:51:40] [INFO ] Input system was already deterministic with 666 transitions.
Starting structural reductions in LTL mode, iteration 0 : 704/704 places, 720/720 transitions.
Discarding 24 places :
Symmetric choice reduction at 0 with 24 rule applications. Total rules 24 place count 680 transition count 696
Iterating global reduction 0 with 24 rules applied. Total rules applied 48 place count 680 transition count 696
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 51 place count 680 transition count 693
Discarding 9 places :
Symmetric choice reduction at 1 with 9 rule applications. Total rules 60 place count 671 transition count 684
Iterating global reduction 1 with 9 rules applied. Total rules applied 69 place count 671 transition count 684
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 1 with 8 rules applied. Total rules applied 77 place count 671 transition count 676
Applied a total of 77 rules in 94 ms. Remains 671 /704 variables (removed 33) and now considering 676/720 (removed 44) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 94 ms. Remains : 671/704 places, 676/720 transitions.
[2024-05-31 23:51:40] [INFO ] Flatten gal took : 16 ms
[2024-05-31 23:51:40] [INFO ] Flatten gal took : 17 ms
[2024-05-31 23:51:40] [INFO ] Input system was already deterministic with 676 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 704/704 places, 720/720 transitions.
Graph (trivial) has 593 edges and 704 vertex of which 6 / 704 are part of one of the 1 SCC in 1 ms
Free SCC test removed 5 places
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Graph (complete) has 1083 edges and 699 vertex of which 655 are kept as prefixes of interest. Removing 44 places using SCC suffix rule.2 ms
Discarding 44 places :
Also discarding 3 output transitions
Drop transitions (Output transitions of discarded places.) removed 3 transitions
Reduce places removed 1 places and 1 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 356 transitions
Trivial Post-agglo rules discarded 356 transitions
Performed 356 trivial Post agglomeration. Transition count delta: 356
Iterating post reduction 0 with 356 rules applied. Total rules applied 358 place count 654 transition count 354
Reduce places removed 356 places and 0 transitions.
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 1 with 374 rules applied. Total rules applied 732 place count 298 transition count 336
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 2 with 4 rules applied. Total rules applied 736 place count 294 transition count 336
Performed 82 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 82 Pre rules applied. Total rules applied 736 place count 294 transition count 254
Deduced a syphon composed of 82 places in 1 ms
Reduce places removed 82 places and 0 transitions.
Iterating global reduction 3 with 164 rules applied. Total rules applied 900 place count 212 transition count 254
Discarding 38 places :
Symmetric choice reduction at 3 with 38 rule applications. Total rules 938 place count 174 transition count 216
Iterating global reduction 3 with 38 rules applied. Total rules applied 976 place count 174 transition count 216
Performed 82 Post agglomeration using F-continuation condition.Transition count delta: 82
Deduced a syphon composed of 82 places in 0 ms
Reduce places removed 82 places and 0 transitions.
Iterating global reduction 3 with 164 rules applied. Total rules applied 1140 place count 92 transition count 134
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 1141 place count 92 transition count 133
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 1142 place count 91 transition count 132
Iterating global reduction 4 with 1 rules applied. Total rules applied 1143 place count 91 transition count 132
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 4 with 2 rules applied. Total rules applied 1145 place count 90 transition count 131
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 4 with 1 rules applied. Total rules applied 1146 place count 89 transition count 130
Applied a total of 1146 rules in 43 ms. Remains 89 /704 variables (removed 615) and now considering 130/720 (removed 590) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 43 ms. Remains : 89/704 places, 130/720 transitions.
[2024-05-31 23:51:40] [INFO ] Flatten gal took : 4 ms
[2024-05-31 23:51:40] [INFO ] Flatten gal took : 3 ms
[2024-05-31 23:51:40] [INFO ] Input system was already deterministic with 130 transitions.
Starting structural reductions in LTL mode, iteration 0 : 704/704 places, 720/720 transitions.
Discarding 26 places :
Symmetric choice reduction at 0 with 26 rule applications. Total rules 26 place count 678 transition count 694
Iterating global reduction 0 with 26 rules applied. Total rules applied 52 place count 678 transition count 694
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 55 place count 678 transition count 691
Discarding 9 places :
Symmetric choice reduction at 1 with 9 rule applications. Total rules 64 place count 669 transition count 682
Iterating global reduction 1 with 9 rules applied. Total rules applied 73 place count 669 transition count 682
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 1 with 8 rules applied. Total rules applied 81 place count 669 transition count 674
Applied a total of 81 rules in 97 ms. Remains 669 /704 variables (removed 35) and now considering 674/720 (removed 46) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 97 ms. Remains : 669/704 places, 674/720 transitions.
[2024-05-31 23:51:41] [INFO ] Flatten gal took : 15 ms
[2024-05-31 23:51:41] [INFO ] Flatten gal took : 15 ms
[2024-05-31 23:51:41] [INFO ] Input system was already deterministic with 674 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 704/704 places, 720/720 transitions.
Graph (trivial) has 582 edges and 704 vertex of which 6 / 704 are part of one of the 1 SCC in 0 ms
Free SCC test removed 5 places
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Graph (complete) has 1083 edges and 699 vertex of which 655 are kept as prefixes of interest. Removing 44 places using SCC suffix rule.2 ms
Discarding 44 places :
Also discarding 3 output transitions
Drop transitions (Output transitions of discarded places.) removed 3 transitions
Reduce places removed 1 places and 1 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 348 transitions
Trivial Post-agglo rules discarded 348 transitions
Performed 348 trivial Post agglomeration. Transition count delta: 348
Iterating post reduction 0 with 348 rules applied. Total rules applied 350 place count 654 transition count 362
Reduce places removed 348 places and 0 transitions.
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 1 with 366 rules applied. Total rules applied 716 place count 306 transition count 344
Reduce places removed 4 places and 0 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Iterating post reduction 2 with 6 rules applied. Total rules applied 722 place count 302 transition count 342
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 3 with 2 rules applied. Total rules applied 724 place count 300 transition count 342
Performed 81 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 81 Pre rules applied. Total rules applied 724 place count 300 transition count 261
Deduced a syphon composed of 81 places in 0 ms
Reduce places removed 81 places and 0 transitions.
Iterating global reduction 4 with 162 rules applied. Total rules applied 886 place count 219 transition count 261
Discarding 39 places :
Symmetric choice reduction at 4 with 39 rule applications. Total rules 925 place count 180 transition count 222
Iterating global reduction 4 with 39 rules applied. Total rules applied 964 place count 180 transition count 222
Performed 81 Post agglomeration using F-continuation condition.Transition count delta: 81
Deduced a syphon composed of 81 places in 0 ms
Reduce places removed 81 places and 0 transitions.
Iterating global reduction 4 with 162 rules applied. Total rules applied 1126 place count 99 transition count 141
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 4 with 1 rules applied. Total rules applied 1127 place count 99 transition count 140
Discarding 1 places :
Symmetric choice reduction at 5 with 1 rule applications. Total rules 1128 place count 98 transition count 139
Iterating global reduction 5 with 1 rules applied. Total rules applied 1129 place count 98 transition count 139
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 1131 place count 97 transition count 138
Partial Post-agglomeration rule applied 1 times.
Drop transitions (Partial Post agglomeration) removed 1 transitions
Iterating global reduction 5 with 1 rules applied. Total rules applied 1132 place count 97 transition count 138
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 5 with 1 rules applied. Total rules applied 1133 place count 96 transition count 137
Applied a total of 1133 rules in 45 ms. Remains 96 /704 variables (removed 608) and now considering 137/720 (removed 583) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 45 ms. Remains : 96/704 places, 137/720 transitions.
[2024-05-31 23:51:41] [INFO ] Flatten gal took : 4 ms
[2024-05-31 23:51:41] [INFO ] Flatten gal took : 4 ms
[2024-05-31 23:51:41] [INFO ] Input system was already deterministic with 137 transitions.
Starting structural reductions in LTL mode, iteration 0 : 704/704 places, 720/720 transitions.
Discarding 25 places :
Symmetric choice reduction at 0 with 25 rule applications. Total rules 25 place count 679 transition count 695
Iterating global reduction 0 with 25 rules applied. Total rules applied 50 place count 679 transition count 695
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 54 place count 679 transition count 691
Discarding 9 places :
Symmetric choice reduction at 1 with 9 rule applications. Total rules 63 place count 670 transition count 682
Iterating global reduction 1 with 9 rules applied. Total rules applied 72 place count 670 transition count 682
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 1 with 9 rules applied. Total rules applied 81 place count 670 transition count 673
Applied a total of 81 rules in 105 ms. Remains 670 /704 variables (removed 34) and now considering 673/720 (removed 47) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 106 ms. Remains : 670/704 places, 673/720 transitions.
[2024-05-31 23:51:41] [INFO ] Flatten gal took : 14 ms
[2024-05-31 23:51:41] [INFO ] Flatten gal took : 14 ms
[2024-05-31 23:51:41] [INFO ] Input system was already deterministic with 673 transitions.
Starting structural reductions in LTL mode, iteration 0 : 704/704 places, 720/720 transitions.
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 28 place count 676 transition count 692
Iterating global reduction 0 with 28 rules applied. Total rules applied 56 place count 676 transition count 692
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 60 place count 676 transition count 688
Discarding 11 places :
Symmetric choice reduction at 1 with 11 rule applications. Total rules 71 place count 665 transition count 677
Iterating global reduction 1 with 11 rules applied. Total rules applied 82 place count 665 transition count 677
Ensure Unique test removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 1 with 10 rules applied. Total rules applied 92 place count 665 transition count 667
Applied a total of 92 rules in 44 ms. Remains 665 /704 variables (removed 39) and now considering 667/720 (removed 53) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 44 ms. Remains : 665/704 places, 667/720 transitions.
[2024-05-31 23:51:41] [INFO ] Flatten gal took : 14 ms
[2024-05-31 23:51:41] [INFO ] Flatten gal took : 14 ms
[2024-05-31 23:51:41] [INFO ] Input system was already deterministic with 667 transitions.
Starting structural reductions in LTL mode, iteration 0 : 704/704 places, 720/720 transitions.
Discarding 25 places :
Symmetric choice reduction at 0 with 25 rule applications. Total rules 25 place count 679 transition count 695
Iterating global reduction 0 with 25 rules applied. Total rules applied 50 place count 679 transition count 695
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 54 place count 679 transition count 691
Discarding 10 places :
Symmetric choice reduction at 1 with 10 rule applications. Total rules 64 place count 669 transition count 681
Iterating global reduction 1 with 10 rules applied. Total rules applied 74 place count 669 transition count 681
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 1 with 9 rules applied. Total rules applied 83 place count 669 transition count 672
Applied a total of 83 rules in 42 ms. Remains 669 /704 variables (removed 35) and now considering 672/720 (removed 48) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 42 ms. Remains : 669/704 places, 672/720 transitions.
[2024-05-31 23:51:41] [INFO ] Flatten gal took : 14 ms
[2024-05-31 23:51:41] [INFO ] Flatten gal took : 14 ms
[2024-05-31 23:51:41] [INFO ] Input system was already deterministic with 672 transitions.
Starting structural reductions in LTL mode, iteration 0 : 704/704 places, 720/720 transitions.
Discarding 27 places :
Symmetric choice reduction at 0 with 27 rule applications. Total rules 27 place count 677 transition count 693
Iterating global reduction 0 with 27 rules applied. Total rules applied 54 place count 677 transition count 693
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 58 place count 677 transition count 689
Discarding 10 places :
Symmetric choice reduction at 1 with 10 rule applications. Total rules 68 place count 667 transition count 679
Iterating global reduction 1 with 10 rules applied. Total rules applied 78 place count 667 transition count 679
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 1 with 9 rules applied. Total rules applied 87 place count 667 transition count 670
Applied a total of 87 rules in 34 ms. Remains 667 /704 variables (removed 37) and now considering 670/720 (removed 50) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 35 ms. Remains : 667/704 places, 670/720 transitions.
[2024-05-31 23:51:41] [INFO ] Flatten gal took : 13 ms
[2024-05-31 23:51:41] [INFO ] Flatten gal took : 13 ms
[2024-05-31 23:51:41] [INFO ] Input system was already deterministic with 670 transitions.
Starting structural reductions in LTL mode, iteration 0 : 704/704 places, 720/720 transitions.
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 28 place count 676 transition count 692
Iterating global reduction 0 with 28 rules applied. Total rules applied 56 place count 676 transition count 692
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 60 place count 676 transition count 688
Discarding 10 places :
Symmetric choice reduction at 1 with 10 rule applications. Total rules 70 place count 666 transition count 678
Iterating global reduction 1 with 10 rules applied. Total rules applied 80 place count 666 transition count 678
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 1 with 9 rules applied. Total rules applied 89 place count 666 transition count 669
Applied a total of 89 rules in 44 ms. Remains 666 /704 variables (removed 38) and now considering 669/720 (removed 51) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 44 ms. Remains : 666/704 places, 669/720 transitions.
[2024-05-31 23:51:41] [INFO ] Flatten gal took : 13 ms
[2024-05-31 23:51:41] [INFO ] Flatten gal took : 13 ms
[2024-05-31 23:51:41] [INFO ] Input system was already deterministic with 669 transitions.
Starting structural reductions in LTL mode, iteration 0 : 704/704 places, 720/720 transitions.
Discarding 23 places :
Symmetric choice reduction at 0 with 23 rule applications. Total rules 23 place count 681 transition count 697
Iterating global reduction 0 with 23 rules applied. Total rules applied 46 place count 681 transition count 697
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 48 place count 681 transition count 695
Discarding 10 places :
Symmetric choice reduction at 1 with 10 rule applications. Total rules 58 place count 671 transition count 685
Iterating global reduction 1 with 10 rules applied. Total rules applied 68 place count 671 transition count 685
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 1 with 9 rules applied. Total rules applied 77 place count 671 transition count 676
Applied a total of 77 rules in 42 ms. Remains 671 /704 variables (removed 33) and now considering 676/720 (removed 44) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 43 ms. Remains : 671/704 places, 676/720 transitions.
[2024-05-31 23:51:41] [INFO ] Flatten gal took : 12 ms
[2024-05-31 23:51:41] [INFO ] Flatten gal took : 12 ms
[2024-05-31 23:51:41] [INFO ] Input system was already deterministic with 676 transitions.
Starting structural reductions in LTL mode, iteration 0 : 704/704 places, 720/720 transitions.
Discarding 27 places :
Symmetric choice reduction at 0 with 27 rule applications. Total rules 27 place count 677 transition count 693
Iterating global reduction 0 with 27 rules applied. Total rules applied 54 place count 677 transition count 693
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 58 place count 677 transition count 689
Discarding 8 places :
Symmetric choice reduction at 1 with 8 rule applications. Total rules 66 place count 669 transition count 681
Iterating global reduction 1 with 8 rules applied. Total rules applied 74 place count 669 transition count 681
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 1 with 7 rules applied. Total rules applied 81 place count 669 transition count 674
Applied a total of 81 rules in 52 ms. Remains 669 /704 variables (removed 35) and now considering 674/720 (removed 46) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 52 ms. Remains : 669/704 places, 674/720 transitions.
[2024-05-31 23:51:41] [INFO ] Flatten gal took : 14 ms
[2024-05-31 23:51:41] [INFO ] Flatten gal took : 13 ms
[2024-05-31 23:51:41] [INFO ] Input system was already deterministic with 674 transitions.
[2024-05-31 23:51:41] [INFO ] Flatten gal took : 14 ms
[2024-05-31 23:51:41] [INFO ] Flatten gal took : 14 ms
[2024-05-31 23:51:42] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2024-05-31 23:51:42] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 704 places, 720 transitions and 1841 arcs took 6 ms.
Total runtime 50704 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=
[--mu-opt] [--saturation=
[--sat-granularity=
[--guidance=
[--action=
[--trace=
[--mu=
[--ctl=
[--save-levels=STRING] [--pg-solve] [--attr=
[--saturating-attractor] [--write-strategy=
[--check-strategy] [--interactive-play] [--player]
[--pg-write=
[--edge-label=
[--mucalc=
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por=
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=
[--cw-max-cols=
[--mh-timeout=
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=
[--ldd32-cache=
[--cache-ratio=
[--min-free-nodes=
[--fdd-reorder=
[--vset-cache-diff=
[--next-union] [--peak-nodes] [--maxsum=
[--block-size=
[--debug=
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS]
Could not compute solution for formula : GPUForwardProgress-PT-40b-CTLFireability-2024-00
Could not compute solution for formula : GPUForwardProgress-PT-40b-CTLFireability-2024-01
Could not compute solution for formula : GPUForwardProgress-PT-40b-CTLFireability-2024-02
Could not compute solution for formula : GPUForwardProgress-PT-40b-CTLFireability-2024-03
Could not compute solution for formula : GPUForwardProgress-PT-40b-CTLFireability-2024-04
Could not compute solution for formula : GPUForwardProgress-PT-40b-CTLFireability-2024-05
Could not compute solution for formula : GPUForwardProgress-PT-40b-CTLFireability-2024-06
Could not compute solution for formula : GPUForwardProgress-PT-40b-CTLFireability-2024-07
Could not compute solution for formula : GPUForwardProgress-PT-40b-CTLFireability-2024-08
Could not compute solution for formula : GPUForwardProgress-PT-40b-CTLFireability-2024-09
Could not compute solution for formula : GPUForwardProgress-PT-40b-CTLFireability-2024-10
Could not compute solution for formula : GPUForwardProgress-PT-40b-CTLFireability-2024-11
Could not compute solution for formula : GPUForwardProgress-PT-40b-CTLFireability-2023-12
Could not compute solution for formula : GPUForwardProgress-PT-40b-CTLFireability-2023-13
Could not compute solution for formula : GPUForwardProgress-PT-40b-CTLFireability-2023-14
Could not compute solution for formula : GPUForwardProgress-PT-40b-CTLFireability-2023-15
BK_STOP 1717199502386
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name GPUForwardProgress-PT-40b-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/523/ctl_0_
ctl formula name GPUForwardProgress-PT-40b-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/523/ctl_1_
ctl formula name GPUForwardProgress-PT-40b-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/523/ctl_2_
ctl formula name GPUForwardProgress-PT-40b-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/523/ctl_3_
ctl formula name GPUForwardProgress-PT-40b-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/523/ctl_4_
ctl formula name GPUForwardProgress-PT-40b-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/523/ctl_5_
ctl formula name GPUForwardProgress-PT-40b-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/523/ctl_6_
ctl formula name GPUForwardProgress-PT-40b-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/523/ctl_7_
ctl formula name GPUForwardProgress-PT-40b-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/523/ctl_8_
ctl formula name GPUForwardProgress-PT-40b-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/523/ctl_9_
ctl formula name GPUForwardProgress-PT-40b-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/523/ctl_10_
ctl formula name GPUForwardProgress-PT-40b-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/523/ctl_11_
ctl formula name GPUForwardProgress-PT-40b-CTLFireability-2023-12
ctl formula formula --ctl=/tmp/523/ctl_12_
ctl formula name GPUForwardProgress-PT-40b-CTLFireability-2023-13
ctl formula formula --ctl=/tmp/523/ctl_13_
ctl formula name GPUForwardProgress-PT-40b-CTLFireability-2023-14
ctl formula formula --ctl=/tmp/523/ctl_14_
ctl formula name GPUForwardProgress-PT-40b-CTLFireability-2023-15
ctl formula formula --ctl=/tmp/523/ctl_15_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GPUForwardProgress-PT-40b"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is GPUForwardProgress-PT-40b, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r496-tall-171640603800618"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/GPUForwardProgress-PT-40b.tgz
mv GPUForwardProgress-PT-40b execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;