fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r492-smll-171636266900444
Last Updated
July 7, 2024

About the Execution of LTSMin+red for FamilyReunion-COL-L01200M0120C060P060G030

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16103.163 137603.00 281034.00 818.40 ??????F??????F?? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r492-smll-171636266900444.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is FamilyReunion-COL-L01200M0120C060P060G030, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r492-smll-171636266900444
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 684K
-rw-r--r-- 1 mcc users 6.8K Apr 11 20:29 CTLCardinality.txt
-rw-r--r-- 1 mcc users 70K Apr 11 20:29 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.6K Apr 11 20:29 CTLFireability.txt
-rw-r--r-- 1 mcc users 54K Apr 11 20:29 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.0K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Apr 22 14:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Apr 22 14:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.2K Apr 22 14:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 22 14:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Apr 11 20:29 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 145K Apr 11 20:29 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.8K Apr 11 20:29 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 62K Apr 11 20:29 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Apr 22 14:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Apr 22 14:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_pt
-rw-r--r-- 1 mcc users 24 May 18 16:42 instance
-rw-r--r-- 1 mcc users 5 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 211K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-00
FORMULA_NAME FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-01
FORMULA_NAME FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-02
FORMULA_NAME FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-03
FORMULA_NAME FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-04
FORMULA_NAME FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-05
FORMULA_NAME FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-06
FORMULA_NAME FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-07
FORMULA_NAME FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-08
FORMULA_NAME FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-09
FORMULA_NAME FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-10
FORMULA_NAME FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-11
FORMULA_NAME FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-12
FORMULA_NAME FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-13
FORMULA_NAME FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-14
FORMULA_NAME FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1717271278366

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=LTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FamilyReunion-COL-L01200M0120C060P060G030
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 19:48:00] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 19:48:00] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 19:48:00] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2024-06-01 19:48:01] [WARNING] Using fallBack plugin, rng conformance not checked
[2024-06-01 19:48:01] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 1481 ms
[2024-06-01 19:48:01] [INFO ] Detected 5 constant HL places corresponding to 306 PT places.
[2024-06-01 19:48:01] [INFO ] Imported 104 HL places and 66 HL transitions for a total of 4614109 PT places and 4406530.0 transition bindings in 127 ms.
Parsed 16 properties from file /home/mcc/execution/LTLFireability.xml in 15 ms.
Working with output stream class java.io.PrintStream
[2024-06-01 19:48:02] [INFO ] Built PT skeleton of HLPN with 104 places and 66 transitions 198 arcs in 22 ms.
[2024-06-01 19:48:02] [INFO ] Skeletonized 16 HLPN properties in 4 ms.
Initial state reduction rules removed 2 formulas.
FORMULA FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-06 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 104 stabilizing places and 66 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 104 transition count 66
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Remains 13 properties that can be checked using skeleton over-approximation.
Reduce places removed 5 places and 0 transitions.
Computed a total of 99 stabilizing places and 66 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 99 transition count 66
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
RANDOM walk for 43280 steps (8 resets) in 110 ms. (389 steps per ms) remains 22/23 properties
BEST_FIRST walk for 4003 steps (8 resets) in 156 ms. (25 steps per ms) remains 17/22 properties
BEST_FIRST walk for 4003 steps (8 resets) in 98 ms. (40 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4003 steps (8 resets) in 115 ms. (34 steps per ms) remains 15/17 properties
BEST_FIRST walk for 4004 steps (8 resets) in 58 ms. (67 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4004 steps (8 resets) in 133 ms. (29 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4004 steps (8 resets) in 101 ms. (39 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4004 steps (8 resets) in 126 ms. (31 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4004 steps (8 resets) in 117 ms. (33 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4004 steps (8 resets) in 102 ms. (38 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4002 steps (8 resets) in 94 ms. (42 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4004 steps (8 resets) in 84 ms. (47 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4003 steps (8 resets) in 74 ms. (53 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4003 steps (8 resets) in 88 ms. (44 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4003 steps (8 resets) in 51 ms. (76 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4004 steps (8 resets) in 53 ms. (74 steps per ms) remains 15/15 properties
// Phase 1: matrix 66 rows 99 cols
[2024-06-01 19:48:02] [INFO ] Computed 33 invariants in 12 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/22 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/22 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 2 (OVERLAPS) 31/53 variables, 3/4 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/53 variables, 1/5 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/53 variables, 0/5 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 5 (OVERLAPS) 10/63 variables, 1/6 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/63 variables, 0/6 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 7 (OVERLAPS) 36/99 variables, 27/33 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/99 variables, 0/33 constraints. Problems are: Problem set: 0 solved, 15 unsolved
All remaining problems are real, not stopping.
At refinement iteration 9 (OVERLAPS) 66/165 variables, 99/132 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 10 (INCLUDED_ONLY) 0/165 variables, 0/132 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 11 (OVERLAPS) 0/165 variables, 0/132 constraints. Problems are: Problem set: 0 solved, 15 unsolved
No progress, stopping.
After SMT solving in domain Real declared 165/165 variables, and 132 constraints, problems are : Problem set: 0 solved, 15 unsolved in 1064 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, Generalized P Invariants (flows): 29/29 constraints, State Equation: 99/99 constraints, PredecessorRefiner: 15/15 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 15 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/22 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/22 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 2 (OVERLAPS) 31/53 variables, 3/4 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/53 variables, 1/5 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/53 variables, 0/5 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 5 (OVERLAPS) 10/63 variables, 1/6 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/63 variables, 0/6 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 7 (OVERLAPS) 36/99 variables, 27/33 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/99 variables, 0/33 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 9 (OVERLAPS) 66/165 variables, 99/132 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 10 (INCLUDED_ONLY) 0/165 variables, 15/147 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 11 (INCLUDED_ONLY) 0/165 variables, 0/147 constraints. Problems are: Problem set: 0 solved, 15 unsolved
At refinement iteration 12 (OVERLAPS) 0/165 variables, 0/147 constraints. Problems are: Problem set: 0 solved, 15 unsolved
No progress, stopping.
After SMT solving in domain Int declared 165/165 variables, and 147 constraints, problems are : Problem set: 0 solved, 15 unsolved in 777 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, Generalized P Invariants (flows): 29/29 constraints, State Equation: 99/99 constraints, PredecessorRefiner: 15/15 constraints, Known Traps: 0/0 constraints]
After SMT, in 1914ms problems are : Problem set: 0 solved, 15 unsolved
Fused 15 Parikh solutions to 1 different solutions.
Finished Parikh walk after 420 steps, including 0 resets, run visited all 15 properties in 28 ms. (steps per millisecond=15 )
Parikh walk visited 15 properties in 36 ms.
[2024-06-01 19:48:04] [INFO ] Flatten gal took : 42 ms
[2024-06-01 19:48:04] [INFO ] Flatten gal took : 13 ms
Transition Gate2ANDJoin forces synchronizations/join behavior on parameter l of sort LegalResident
Transition ReceiveLangChoice forces synchronizations/join behavior on parameter m of sort MICSystem
Symmetric sort wr.t. initial and guards and successors and join/free detected :CINFORMI
Symmetric sort wr.t. initial detected :CINFORMI
Symmetric sort wr.t. initial and guards detected :CINFORMI
Applying symmetric unfolding of full symmetric sort :CINFORMI domain size was 61
Transition Gate1ANDJoin forces synchronizations/join behavior on parameter p of sort PublicAdminOffice
Symmetric sort wr.t. initial and guards and successors and join/free detected :GovernmentCommission
Symmetric sort wr.t. initial detected :GovernmentCommission
Symmetric sort wr.t. initial and guards detected :GovernmentCommission
Applying symmetric unfolding of full symmetric sort :GovernmentCommission domain size was 31
Symmetric sort wr.t. initial and guards and successors and join/free detected :Response
Symmetric sort wr.t. initial detected :Response
Transition SendClearanceToRel : guard parameter $r(Response:2) in guard (EQ $r 0)introduces in Response(2) partition with 2 elements
[2024-06-01 19:48:15] [INFO ] Unfolded HLPN to a Petri net with 4073269 places and 3540609 transitions 10178597 arcs in 10522 ms.
[2024-06-01 19:48:15] [INFO ] Unfolded 14 HLPN properties in 101 ms.
[2024-06-01 19:48:16] [INFO ] Reduced 1201 identical enabling conditions.
[2024-06-01 19:48:16] [INFO ] Reduced 144120 identical enabling conditions.
[2024-06-01 19:48:16] [INFO ] Reduced 144120 identical enabling conditions.
[2024-06-01 19:48:17] [INFO ] Reduced 1201 identical enabling conditions.
[2024-06-01 19:48:17] [INFO ] Reduced 1201 identical enabling conditions.
Deduced a syphon composed of 1201 places in 12263 ms
Reduce places removed 1387 places and 0 transitions.
Support contains 1771537 out of 4071882 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 4071882/4071882 places, 3540609/3540609 transitions.
Reduce places removed 3849 places and 0 transitions.
Could not compute solution for formula : FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-00
Could not compute solution for formula : FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-01
Could not compute solution for formula : FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-02
Could not compute solution for formula : FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-03
Could not compute solution for formula : FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-04
Could not compute solution for formula : FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-05
Could not compute solution for formula : FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-06
Could not compute solution for formula : FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-07
Could not compute solution for formula : FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-08
Could not compute solution for formula : FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-09
Could not compute solution for formula : FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-10
Could not compute solution for formula : FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-11
Could not compute solution for formula : FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-12
Could not compute solution for formula : FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-13
Could not compute solution for formula : FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-14
Could not compute solution for formula : FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-15

BK_STOP 1717271415969

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination LTLFireability -timeout 360 -rebuildPNML
mcc2024
ltl formula name FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-00
ltl formula formula --ltl=/tmp/560/ltl_0_
pnml2lts-mc( 0/ 4): Loading model from model.pnml
pnml2lts-mc( 0/ 4): Edge label is id
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
pnml2lts-mc( 2/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
pnml2lts-mc( 0/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
pnml2lts-mc( 1/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
ltl formula name FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-01
ltl formula formula --ltl=/tmp/560/ltl_1_
pnml2lts-mc( 0/ 4): Loading model from model.pnml
pnml2lts-mc( 0/ 4): Edge label is id
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
pnml2lts-mc( 1/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
pnml2lts-mc( 0/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
ltl formula name FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-02
ltl formula formula --ltl=/tmp/560/ltl_2_
pnml2lts-mc( 0/ 4): Loading model from model.pnml
pnml2lts-mc( 0/ 4): Edge label is id
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
pnml2lts-mc( 1/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
pnml2lts-mc( 0/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
ltl formula name FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-03
ltl formula formula --ltl=/tmp/560/ltl_3_
pnml2lts-mc( 0/ 4): Loading model from model.pnml
pnml2lts-mc( 0/ 4): Edge label is id
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
pnml2lts-mc( 0/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
pnml2lts-mc( 2/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
ltl formula name FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-04
ltl formula formula --ltl=/tmp/560/ltl_4_
pnml2lts-mc( 0/ 4): Loading model from model.pnml
pnml2lts-mc( 0/ 4): Edge label is id
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
pnml2lts-mc( 1/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
pnml2lts-mc( 0/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
ltl formula name FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-05
ltl formula formula --ltl=/tmp/560/ltl_5_
pnml2lts-mc( 0/ 4): Loading model from model.pnml
pnml2lts-mc( 0/ 4): Edge label is id
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
pnml2lts-mc( 0/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
pnml2lts-mc( 2/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
ltl formula name FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-06
ltl formula formula --ltl=/tmp/560/ltl_6_
pnml2lts-mc( 0/ 4): Loading model from model.pnml
pnml2lts-mc( 0/ 4): Edge label is id
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
pnml2lts-mc( 0/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
pnml2lts-mc( 1/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
Warning: program compiled against libxml 210 using older 209
ltl formula name FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-07
ltl formula formula --ltl=/tmp/560/ltl_7_
pnml2lts-mc( 0/ 4): Loading model from model.pnml
pnml2lts-mc( 0/ 4): Edge label is id
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
pnml2lts-mc( 0/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
pnml2lts-mc( 1/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
ltl formula name FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-08
ltl formula formula --ltl=/tmp/560/ltl_8_
pnml2lts-mc( 0/ 4): Loading model from model.pnml
pnml2lts-mc( 0/ 4): Edge label is id
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
pnml2lts-mc( 0/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
Warning: program compiled against libxml 210 using older 209
pnml2lts-mc( 1/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
pnml2lts-mc( 2/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
ltl formula name FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-09
ltl formula formula --ltl=/tmp/560/ltl_9_
pnml2lts-mc( 0/ 4): Loading model from model.pnml
pnml2lts-mc( 0/ 4): Edge label is id
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
pnml2lts-mc( 0/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
pnml2lts-mc( 2/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
ltl formula name FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-10
ltl formula formula --ltl=/tmp/560/ltl_10_
pnml2lts-mc( 0/ 4): Loading model from model.pnml
pnml2lts-mc( 0/ 4): Edge label is id
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
pnml2lts-mc( 0/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
ltl formula name FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-11
ltl formula formula --ltl=/tmp/560/ltl_11_
pnml2lts-mc( 0/ 4): Loading model from model.pnml
pnml2lts-mc( 0/ 4): Edge label is id
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
pnml2lts-mc( 0/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
pnml2lts-mc( 1/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
ltl formula name FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-12
ltl formula formula --ltl=/tmp/560/ltl_12_
pnml2lts-mc( 0/ 4): Loading model from model.pnml
pnml2lts-mc( 0/ 4): Edge label is id
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
pnml2lts-mc( 0/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
pnml2lts-mc( 2/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
ltl formula name FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-13
ltl formula formula --ltl=/tmp/560/ltl_13_
pnml2lts-mc( 0/ 4): Loading model from model.pnml
pnml2lts-mc( 0/ 4): Edge label is id
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
pnml2lts-mc( 0/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
ltl formula name FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-14
ltl formula formula --ltl=/tmp/560/ltl_14_
pnml2lts-mc( 0/ 4): Loading model from model.pnml
pnml2lts-mc( 0/ 4): Edge label is id
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
pnml2lts-mc( 0/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
pnml2lts-mc( 2/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
ltl formula name FamilyReunion-COL-L01200M0120C060P060G030-LTLFireability-15
ltl formula formula --ltl=/tmp/560/ltl_15_
pnml2lts-mc( 0/ 4): Loading model from model.pnml
pnml2lts-mc( 0/ 4): Edge label is id
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
pnml2lts-mc( 2/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported
pnml2lts-mc( 0/ 4), ** error **: pnml type "http://www.pnml.org/version-2009/grammar/symmetricnet" is not supported

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-COL-L01200M0120C060P060G030"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is FamilyReunion-COL-L01200M0120C060P060G030, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r492-smll-171636266900444"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-COL-L01200M0120C060P060G030.tgz
mv FamilyReunion-COL-L01200M0120C060P060G030 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;