fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r492-smll-171636266900433
Last Updated
July 7, 2024

About the Execution of LTSMin+red for FamilyReunion-COL-L00800M0080C040P040G020

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15994.439 2139802.00 5573083.00 4210.70 ?T?T???????????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r492-smll-171636266900433.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is FamilyReunion-COL-L00800M0080C040P040G020, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r492-smll-171636266900433
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 616K
-rw-r--r-- 1 mcc users 7.1K Apr 11 20:13 CTLCardinality.txt
-rw-r--r-- 1 mcc users 73K Apr 11 20:13 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.4K Apr 11 20:13 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Apr 11 20:13 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.0K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Apr 22 14:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Apr 22 14:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.3K Apr 22 14:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 22 14:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.4K Apr 11 20:13 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 95K Apr 11 20:13 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Apr 11 20:13 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 70K Apr 11 20:13 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Apr 22 14:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Apr 22 14:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_pt
-rw-r--r-- 1 mcc users 24 May 18 16:42 instance
-rw-r--r-- 1 mcc users 5 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 185K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-00
FORMULA_NAME FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-01
FORMULA_NAME FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-02
FORMULA_NAME FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-03
FORMULA_NAME FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-04
FORMULA_NAME FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-05
FORMULA_NAME FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-06
FORMULA_NAME FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-07
FORMULA_NAME FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-08
FORMULA_NAME FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-09
FORMULA_NAME FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-10
FORMULA_NAME FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-11
FORMULA_NAME FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-12
FORMULA_NAME FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-13
FORMULA_NAME FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-14
FORMULA_NAME FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-15

=== Now, execution of the tool begins

BK_START 1717260999279

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FamilyReunion-COL-L00800M0080C040P040G020
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 16:56:41] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2024-06-01 16:56:41] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 16:56:42] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2024-06-01 16:56:42] [WARNING] Using fallBack plugin, rng conformance not checked
[2024-06-01 16:56:43] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 1383 ms
[2024-06-01 16:56:43] [INFO ] Detected 5 constant HL places corresponding to 206 PT places.
[2024-06-01 16:56:43] [INFO ] Imported 104 HL places and 66 HL transitions for a total of 2076109 PT places and 1977710.0 transition bindings in 125 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 33 ms.
[2024-06-01 16:56:43] [INFO ] Built PT skeleton of HLPN with 104 places and 66 transitions 198 arcs in 12 ms.
[2024-06-01 16:56:43] [INFO ] Skeletonized 16 HLPN properties in 4 ms.
Initial state reduction rules removed 2 formulas.
FORMULA FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 104 stabilizing places and 66 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 104 transition count 66
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 1 formulas.
Remains 14 properties that can be checked using skeleton over-approximation.
Reduce places removed 5 places and 0 transitions.
Computed a total of 99 stabilizing places and 66 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 99 transition count 66
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
RANDOM walk for 41712 steps (8 resets) in 225 ms. (184 steps per ms) remains 57/59 properties
BEST_FIRST walk for 4003 steps (8 resets) in 204 ms. (19 steps per ms) remains 51/57 properties
BEST_FIRST walk for 4004 steps (8 resets) in 127 ms. (31 steps per ms) remains 50/51 properties
BEST_FIRST walk for 4003 steps (8 resets) in 132 ms. (30 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 133 ms. (29 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 139 ms. (28 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4002 steps (8 resets) in 100 ms. (39 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 71 ms. (55 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4002 steps (8 resets) in 99 ms. (40 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4003 steps (8 resets) in 101 ms. (39 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4003 steps (8 resets) in 102 ms. (38 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 77 ms. (51 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 102 ms. (38 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4003 steps (8 resets) in 122 ms. (32 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 64 ms. (61 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4003 steps (8 resets) in 37 ms. (105 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4003 steps (8 resets) in 27 ms. (142 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4003 steps (8 resets) in 56 ms. (70 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 59 ms. (66 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 79 ms. (50 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 98 ms. (40 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 98 ms. (40 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 88 ms. (44 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 43 ms. (91 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4003 steps (8 resets) in 47 ms. (83 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4003 steps (8 resets) in 43 ms. (90 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 23 ms. (166 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4003 steps (8 resets) in 23 ms. (166 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 28 ms. (138 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 39 ms. (100 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 32 ms. (121 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 46 ms. (85 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 25 ms. (154 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 38 ms. (102 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4003 steps (8 resets) in 28 ms. (138 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 32 ms. (121 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4003 steps (8 resets) in 24 ms. (160 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 16 ms. (235 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4003 steps (8 resets) in 24 ms. (160 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 21 ms. (182 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4003 steps (8 resets) in 21 ms. (181 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 16 ms. (235 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4003 steps (8 resets) in 39 ms. (100 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 19 ms. (200 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4003 steps (8 resets) in 35 ms. (111 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4003 steps (8 resets) in 20 ms. (190 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 22 ms. (174 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 18 ms. (210 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4003 steps (8 resets) in 30 ms. (129 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 27 ms. (143 steps per ms) remains 50/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 25 ms. (154 steps per ms) remains 50/50 properties
// Phase 1: matrix 66 rows 99 cols
[2024-06-01 16:56:45] [INFO ] Computed 33 invariants in 11 ms
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/61 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 50 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/61 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 50 unsolved
Problem AtomicPropp6 is UNSAT
Problem AtomicPropp10 is UNSAT
Problem AtomicPropp18 is UNSAT
At refinement iteration 2 (OVERLAPS) 18/79 variables, 4/6 constraints. Problems are: Problem set: 3 solved, 47 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/79 variables, 6/12 constraints. Problems are: Problem set: 3 solved, 47 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/79 variables, 0/12 constraints. Problems are: Problem set: 3 solved, 47 unsolved
Problem AtomicPropp14 is UNSAT
Problem AtomicPropp27 is UNSAT
At refinement iteration 5 (OVERLAPS) 20/99 variables, 21/33 constraints. Problems are: Problem set: 5 solved, 45 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/99 variables, 0/33 constraints. Problems are: Problem set: 5 solved, 45 unsolved
At refinement iteration 7 (OVERLAPS) 66/165 variables, 99/132 constraints. Problems are: Problem set: 5 solved, 45 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/165 variables, 0/132 constraints. Problems are: Problem set: 5 solved, 45 unsolved
At refinement iteration 9 (OVERLAPS) 0/165 variables, 0/132 constraints. Problems are: Problem set: 5 solved, 45 unsolved
No progress, stopping.
After SMT solving in domain Real declared 165/165 variables, and 132 constraints, problems are : Problem set: 5 solved, 45 unsolved in 2070 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, Generalized P Invariants (flows): 29/29 constraints, State Equation: 99/99 constraints, PredecessorRefiner: 50/50 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 5 solved, 45 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/56 variables, 1/1 constraints. Problems are: Problem set: 5 solved, 45 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/56 variables, 0/1 constraints. Problems are: Problem set: 5 solved, 45 unsolved
At refinement iteration 2 (OVERLAPS) 19/75 variables, 4/5 constraints. Problems are: Problem set: 5 solved, 45 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/75 variables, 5/10 constraints. Problems are: Problem set: 5 solved, 45 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/75 variables, 0/10 constraints. Problems are: Problem set: 5 solved, 45 unsolved
At refinement iteration 5 (OVERLAPS) 24/99 variables, 23/33 constraints. Problems are: Problem set: 5 solved, 45 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/99 variables, 0/33 constraints. Problems are: Problem set: 5 solved, 45 unsolved
At refinement iteration 7 (OVERLAPS) 66/165 variables, 99/132 constraints. Problems are: Problem set: 5 solved, 45 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/165 variables, 45/177 constraints. Problems are: Problem set: 5 solved, 45 unsolved
At refinement iteration 9 (INCLUDED_ONLY) 0/165 variables, 0/177 constraints. Problems are: Problem set: 5 solved, 45 unsolved
At refinement iteration 10 (OVERLAPS) 0/165 variables, 0/177 constraints. Problems are: Problem set: 5 solved, 45 unsolved
No progress, stopping.
After SMT solving in domain Int declared 165/165 variables, and 177 constraints, problems are : Problem set: 5 solved, 45 unsolved in 2598 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, Generalized P Invariants (flows): 29/29 constraints, State Equation: 99/99 constraints, PredecessorRefiner: 45/50 constraints, Known Traps: 0/0 constraints]
After SMT, in 4768ms problems are : Problem set: 5 solved, 45 unsolved
Fused 45 Parikh solutions to 35 different solutions.
Parikh walk visited 42 properties in 34342 ms.
Support contains 4 out of 99 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 99/99 places, 66/66 transitions.
Graph (complete) has 123 edges and 99 vertex of which 93 are kept as prefixes of interest. Removing 6 places using SCC suffix rule.1 ms
Discarding 6 places :
Also discarding 1 output transitions
Drop transitions (Output transitions of discarded places.) removed 1 transitions
Discarding 18 places :
Implicit places reduction removed 18 places
Drop transitions (Trivial Post-Agglo cleanup.) removed 45 transitions
Trivial Post-agglo rules discarded 45 transitions
Performed 45 trivial Post agglomeration. Transition count delta: 45
Iterating post reduction 0 with 63 rules applied. Total rules applied 64 place count 75 transition count 20
Reduce places removed 45 places and 0 transitions.
Discarding 1 places :
Implicit places reduction removed 1 places
Drop transitions (Trivial Post-Agglo cleanup.) removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 1 with 48 rules applied. Total rules applied 112 place count 29 transition count 18
Reduce places removed 2 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 2 with 3 rules applied. Total rules applied 115 place count 27 transition count 17
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 116 place count 26 transition count 17
Performed 10 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 10 Pre rules applied. Total rules applied 116 place count 26 transition count 7
Deduced a syphon composed of 10 places in 0 ms
Ensure Unique test removed 4 places
Reduce places removed 14 places and 0 transitions.
Iterating global reduction 4 with 24 rules applied. Total rules applied 140 place count 12 transition count 7
Discarding 1 places :
Implicit places reduction removed 1 places
Drop transitions (Trivial Post-Agglo cleanup.) removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 4 with 2 rules applied. Total rules applied 142 place count 11 transition count 6
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 5 with 1 rules applied. Total rules applied 143 place count 10 transition count 6
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 6 with 1 Pre rules applied. Total rules applied 143 place count 10 transition count 5
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 6 with 2 rules applied. Total rules applied 145 place count 9 transition count 5
Applied a total of 145 rules in 78 ms. Remains 9 /99 variables (removed 90) and now considering 5/66 (removed 61) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 99 ms. Remains : 9/99 places, 5/66 transitions.
RANDOM walk for 9800 steps (0 resets) in 23 ms. (408 steps per ms) remains 0/3 properties
Successfully simplified 5 atomic propositions for a total of 14 simplifications.
[2024-06-01 16:57:24] [INFO ] Flatten gal took : 56 ms
[2024-06-01 16:57:24] [INFO ] Flatten gal took : 16 ms
Transition Gate2ANDJoin forces synchronizations/join behavior on parameter l of sort LegalResident
Transition ReceiveLangChoice forces synchronizations/join behavior on parameter m of sort MICSystem
Symmetric sort wr.t. initial and guards and successors and join/free detected :CINFORMI
Symmetric sort wr.t. initial detected :CINFORMI
Symmetric sort wr.t. initial and guards detected :CINFORMI
Applying symmetric unfolding of full symmetric sort :CINFORMI domain size was 41
Transition Gate1ANDJoin forces synchronizations/join behavior on parameter p of sort PublicAdminOffice
Symmetric sort wr.t. initial and guards and successors and join/free detected :GovernmentCommission
Symmetric sort wr.t. initial detected :GovernmentCommission
Symmetric sort wr.t. initial and guards detected :GovernmentCommission
Applying symmetric unfolding of full symmetric sort :GovernmentCommission domain size was 21
Symmetric sort wr.t. initial and guards and successors and join/free detected :Response
Symmetric sort wr.t. initial detected :Response
Transition SendClearanceToRel : guard parameter $r(Response:2) in guard (EQ $r 0)introduces in Response(2) partition with 2 elements
[2024-06-01 16:57:30] [INFO ] Unfolded HLPN to a Petri net with 1835549 places and 1592429 transitions 4577797 arcs in 5797 ms.
[2024-06-01 16:57:30] [INFO ] Unfolded 14 HLPN properties in 203 ms.
Deduced a syphon composed of 801 places in 7111 ms
Reduce places removed 927 places and 0 transitions.
Support contains 1137709 out of 1834622 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1834622/1834622 places, 1592429/1592429 transitions.
Reduce places removed 843 places and 0 transitions.
Discarding 130563 places :
Implicit places reduction removed 130563 places
Iterating post reduction 0 with 131406 rules applied. Total rules applied 131406 place count 1703216 transition count 1592429
Applied a total of 131406 rules in 1757359 ms. Remains 1703216 /1834622 variables (removed 131406) and now considering 1592429/1592429 (removed 0) transitions.
// Phase 1: matrix 1592429 rows 1703216 cols
[2024-06-01 17:29:44] [WARNING] Invariant computation timed out after 120 seconds.
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-00
Could not compute solution for formula : FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-01
Could not compute solution for formula : FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-02
Could not compute solution for formula : FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-03
Could not compute solution for formula : FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-04
Could not compute solution for formula : FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-05
Could not compute solution for formula : FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-06
Could not compute solution for formula : FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-07
Could not compute solution for formula : FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-08
Could not compute solution for formula : FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-09
Could not compute solution for formula : FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-10
Could not compute solution for formula : FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-11
Could not compute solution for formula : FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-12
Could not compute solution for formula : FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-13
Could not compute solution for formula : FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-14
Could not compute solution for formula : FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-15

BK_STOP 1717263139081

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
mcc2024
ctl formula name FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-00
ctl formula formula --ctl=/tmp/592/ctl_0_
ctl formula name FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-01
ctl formula formula --ctl=/tmp/592/ctl_1_
ctl formula name FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-02
ctl formula formula --ctl=/tmp/592/ctl_2_
ctl formula name FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-03
ctl formula formula --ctl=/tmp/592/ctl_3_
ctl formula name FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-04
ctl formula formula --ctl=/tmp/592/ctl_4_
ctl formula name FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-05
ctl formula formula --ctl=/tmp/592/ctl_5_
ctl formula name FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-06
ctl formula formula --ctl=/tmp/592/ctl_6_
ctl formula name FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-07
ctl formula formula --ctl=/tmp/592/ctl_7_
ctl formula name FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-08
ctl formula formula --ctl=/tmp/592/ctl_8_
ctl formula name FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-09
ctl formula formula --ctl=/tmp/592/ctl_9_
ctl formula name FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-10
ctl formula formula --ctl=/tmp/592/ctl_10_
ctl formula name FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-11
ctl formula formula --ctl=/tmp/592/ctl_11_
ctl formula name FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-12
ctl formula formula --ctl=/tmp/592/ctl_12_
ctl formula name FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-13
ctl formula formula --ctl=/tmp/592/ctl_13_
ctl formula name FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-14
ctl formula formula --ctl=/tmp/592/ctl_14_
ctl formula name FamilyReunion-COL-L00800M0080C040P040G020-CTLCardinality-2024-15
ctl formula formula --ctl=/tmp/592/ctl_15_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-COL-L00800M0080C040P040G020"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is FamilyReunion-COL-L00800M0080C040P040G020, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r492-smll-171636266900433"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-COL-L00800M0080C040P040G020.tgz
mv FamilyReunion-COL-L00800M0080C040P040G020 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;