fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r492-smll-171636266900425
Last Updated
July 7, 2024

About the Execution of LTSMin+red for FamilyReunion-COL-L00400M0040C020P020G001

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16195.855 653549.00 1206971.00 3127.40 ?????T?????????F normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r492-smll-171636266900425.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is FamilyReunion-COL-L00400M0040C020P020G001, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r492-smll-171636266900425
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 580K
-rw-r--r-- 1 mcc users 7.0K Apr 12 21:53 CTLCardinality.txt
-rw-r--r-- 1 mcc users 72K Apr 12 21:53 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.4K Apr 12 12:02 CTLFireability.txt
-rw-r--r-- 1 mcc users 54K Apr 12 12:02 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.0K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Apr 22 14:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K Apr 22 14:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.3K Apr 22 14:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 22 14:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.9K Apr 13 20:15 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 87K Apr 13 20:15 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.8K Apr 13 14:03 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 62K Apr 13 14:03 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Apr 22 14:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Apr 22 14:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_pt
-rw-r--r-- 1 mcc users 24 May 18 16:42 instance
-rw-r--r-- 1 mcc users 5 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 159K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-00
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-01
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-02
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-03
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-04
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-05
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-06
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-07
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-08
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-09
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-10
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-11
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-12
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-13
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-14
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-15

=== Now, execution of the tool begins

BK_START 1717257661260

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FamilyReunion-COL-L00400M0040C020P020G001
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 16:01:03] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2024-06-01 16:01:03] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 16:01:03] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2024-06-01 16:01:04] [WARNING] Using fallBack plugin, rng conformance not checked
[2024-06-01 16:01:05] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 1401 ms
[2024-06-01 16:01:05] [INFO ] Detected 5 constant HL places corresponding to 106 PT places.
[2024-06-01 16:01:05] [INFO ] Imported 104 HL places and 66 HL transitions for a total of 538109 PT places and 508890.0 transition bindings in 88 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 31 ms.
[2024-06-01 16:01:05] [INFO ] Built PT skeleton of HLPN with 104 places and 66 transitions 198 arcs in 8 ms.
[2024-06-01 16:01:05] [INFO ] Skeletonized 16 HLPN properties in 6 ms.
Computed a total of 104 stabilizing places and 66 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 104 transition count 66
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 1 formulas.
FORMULA FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Remains 15 properties that can be checked using skeleton over-approximation.
Reduce places removed 5 places and 0 transitions.
Computed a total of 99 stabilizing places and 66 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 99 transition count 66
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
RANDOM walk for 40208 steps (8 resets) in 119 ms. (335 steps per ms) remains 64/77 properties
BEST_FIRST walk for 4004 steps (8 resets) in 169 ms. (23 steps per ms) remains 63/64 properties
BEST_FIRST walk for 4004 steps (8 resets) in 137 ms. (29 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 184 ms. (21 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 113 ms. (35 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 249 ms. (16 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 123 ms. (32 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 112 ms. (35 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 109 ms. (36 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4003 steps (8 resets) in 110 ms. (36 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 105 ms. (37 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4003 steps (8 resets) in 35 ms. (111 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 55 ms. (71 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 44 ms. (88 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4003 steps (8 resets) in 27 ms. (142 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4003 steps (8 resets) in 19 ms. (200 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 21 ms. (182 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4003 steps (8 resets) in 24 ms. (160 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 21 ms. (182 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 25 ms. (154 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 39 ms. (100 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4003 steps (8 resets) in 48 ms. (81 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4003 steps (8 resets) in 23 ms. (166 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4002 steps (8 resets) in 29 ms. (133 steps per ms) remains 62/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 25 ms. (154 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4004 steps (8 resets) in 19 ms. (200 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4004 steps (8 resets) in 17 ms. (222 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4002 steps (8 resets) in 19 ms. (200 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4003 steps (8 resets) in 27 ms. (142 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4004 steps (8 resets) in 32 ms. (121 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4004 steps (8 resets) in 25 ms. (154 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4004 steps (8 resets) in 15 ms. (250 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4004 steps (8 resets) in 17 ms. (222 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4004 steps (8 resets) in 15 ms. (250 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4004 steps (8 resets) in 16 ms. (235 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4004 steps (8 resets) in 18 ms. (210 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4004 steps (8 resets) in 28 ms. (138 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4004 steps (8 resets) in 18 ms. (210 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4004 steps (8 resets) in 24 ms. (160 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4004 steps (8 resets) in 26 ms. (148 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4004 steps (8 resets) in 32 ms. (121 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4003 steps (8 resets) in 16 ms. (235 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4004 steps (8 resets) in 15 ms. (250 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4004 steps (8 resets) in 16 ms. (235 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4003 steps (8 resets) in 16 ms. (235 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4004 steps (8 resets) in 23 ms. (166 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4003 steps (8 resets) in 21 ms. (181 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4004 steps (8 resets) in 17 ms. (222 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4004 steps (8 resets) in 22 ms. (174 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4003 steps (8 resets) in 20 ms. (190 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4002 steps (8 resets) in 15 ms. (250 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4003 steps (8 resets) in 14 ms. (266 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4004 steps (8 resets) in 28 ms. (138 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4004 steps (8 resets) in 12 ms. (308 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4003 steps (8 resets) in 31 ms. (125 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4004 steps (8 resets) in 31 ms. (125 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4003 steps (8 resets) in 20 ms. (190 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4004 steps (8 resets) in 24 ms. (160 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4004 steps (8 resets) in 20 ms. (190 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4002 steps (8 resets) in 16 ms. (235 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4004 steps (8 resets) in 29 ms. (133 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4003 steps (8 resets) in 21 ms. (181 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4002 steps (8 resets) in 28 ms. (138 steps per ms) remains 62/62 properties
BEST_FIRST walk for 4003 steps (8 resets) in 15 ms. (250 steps per ms) remains 62/62 properties
// Phase 1: matrix 66 rows 99 cols
[2024-06-01 16:01:06] [INFO ] Computed 33 invariants in 9 ms
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/72 variables, 6/6 constraints. Problems are: Problem set: 0 solved, 62 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/72 variables, 0/6 constraints. Problems are: Problem set: 0 solved, 62 unsolved
Problem AtomicPropp5 is UNSAT
Problem AtomicPropp36 is UNSAT
Problem AtomicPropp46 is UNSAT
Problem AtomicPropp70 is UNSAT
At refinement iteration 2 (OVERLAPS) 15/87 variables, 4/10 constraints. Problems are: Problem set: 4 solved, 58 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/87 variables, 9/19 constraints. Problems are: Problem set: 4 solved, 58 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/87 variables, 0/19 constraints. Problems are: Problem set: 4 solved, 58 unsolved
Problem AtomicPropp34 is UNSAT
At refinement iteration 5 (OVERLAPS) 12/99 variables, 14/33 constraints. Problems are: Problem set: 5 solved, 57 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/99 variables, 0/33 constraints. Problems are: Problem set: 5 solved, 57 unsolved
At refinement iteration 7 (OVERLAPS) 66/165 variables, 99/132 constraints. Problems are: Problem set: 5 solved, 57 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/165 variables, 0/132 constraints. Problems are: Problem set: 5 solved, 57 unsolved
At refinement iteration 9 (OVERLAPS) 0/165 variables, 0/132 constraints. Problems are: Problem set: 5 solved, 57 unsolved
No progress, stopping.
After SMT solving in domain Real declared 165/165 variables, and 132 constraints, problems are : Problem set: 5 solved, 57 unsolved in 2382 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, Generalized P Invariants (flows): 29/29 constraints, State Equation: 99/99 constraints, PredecessorRefiner: 62/62 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 5 solved, 57 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/68 variables, 3/3 constraints. Problems are: Problem set: 5 solved, 57 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/68 variables, 0/3 constraints. Problems are: Problem set: 5 solved, 57 unsolved
At refinement iteration 2 (OVERLAPS) 18/86 variables, 4/7 constraints. Problems are: Problem set: 5 solved, 57 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/86 variables, 11/18 constraints. Problems are: Problem set: 5 solved, 57 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/86 variables, 0/18 constraints. Problems are: Problem set: 5 solved, 57 unsolved
At refinement iteration 5 (OVERLAPS) 13/99 variables, 15/33 constraints. Problems are: Problem set: 5 solved, 57 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/99 variables, 0/33 constraints. Problems are: Problem set: 5 solved, 57 unsolved
At refinement iteration 7 (OVERLAPS) 66/165 variables, 99/132 constraints. Problems are: Problem set: 5 solved, 57 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/165 variables, 57/189 constraints. Problems are: Problem set: 5 solved, 57 unsolved
At refinement iteration 9 (INCLUDED_ONLY) 0/165 variables, 0/189 constraints. Problems are: Problem set: 5 solved, 57 unsolved
At refinement iteration 10 (OVERLAPS) 0/165 variables, 0/189 constraints. Problems are: Problem set: 5 solved, 57 unsolved
No progress, stopping.
After SMT solving in domain Int declared 165/165 variables, and 189 constraints, problems are : Problem set: 5 solved, 57 unsolved in 4843 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, Generalized P Invariants (flows): 29/29 constraints, State Equation: 99/99 constraints, PredecessorRefiner: 57/62 constraints, Known Traps: 0/0 constraints]
After SMT, in 7330ms problems are : Problem set: 5 solved, 57 unsolved
Fused 57 Parikh solutions to 53 different solutions.
Parikh walk visited 47 properties in 35151 ms.
Support contains 8 out of 99 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 99/99 places, 66/66 transitions.
Graph (complete) has 123 edges and 99 vertex of which 79 are kept as prefixes of interest. Removing 20 places using SCC suffix rule.1 ms
Discarding 20 places :
Also discarding 9 output transitions
Drop transitions (Output transitions of discarded places.) removed 9 transitions
Discarding 15 places :
Implicit places reduction removed 15 places
Drop transitions (Trivial Post-Agglo cleanup.) removed 29 transitions
Trivial Post-agglo rules discarded 29 transitions
Performed 29 trivial Post agglomeration. Transition count delta: 29
Iterating post reduction 0 with 44 rules applied. Total rules applied 45 place count 64 transition count 28
Reduce places removed 29 places and 0 transitions.
Discarding 1 places :
Implicit places reduction removed 1 places
Drop transitions (Trivial Post-Agglo cleanup.) removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 1 with 32 rules applied. Total rules applied 77 place count 34 transition count 26
Reduce places removed 2 places and 0 transitions.
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Iterating post reduction 2 with 5 rules applied. Total rules applied 82 place count 32 transition count 23
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 3 with 3 rules applied. Total rules applied 85 place count 29 transition count 23
Performed 8 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 8 Pre rules applied. Total rules applied 85 place count 29 transition count 15
Deduced a syphon composed of 8 places in 0 ms
Ensure Unique test removed 4 places
Reduce places removed 12 places and 0 transitions.
Iterating global reduction 4 with 20 rules applied. Total rules applied 105 place count 17 transition count 15
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 4 with 1 rules applied. Total rules applied 106 place count 17 transition count 14
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 5 with 1 rules applied. Total rules applied 107 place count 16 transition count 14
Applied a total of 107 rules in 50 ms. Remains 16 /99 variables (removed 83) and now considering 14/66 (removed 52) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 79 ms. Remains : 16/99 places, 14/66 transitions.
RANDOM walk for 40212 steps (8 resets) in 93 ms. (427 steps per ms) remains 6/10 properties
BEST_FIRST walk for 40003 steps (8 resets) in 206 ms. (193 steps per ms) remains 6/6 properties
BEST_FIRST walk for 40004 steps (8 resets) in 151 ms. (263 steps per ms) remains 6/6 properties
BEST_FIRST walk for 40004 steps (8 resets) in 196 ms. (203 steps per ms) remains 6/6 properties
BEST_FIRST walk for 40003 steps (8 resets) in 205 ms. (194 steps per ms) remains 6/6 properties
BEST_FIRST walk for 40004 steps (8 resets) in 275 ms. (144 steps per ms) remains 5/6 properties
BEST_FIRST walk for 40003 steps (8 resets) in 247 ms. (161 steps per ms) remains 5/5 properties
// Phase 1: matrix 14 rows 16 cols
[2024-06-01 16:01:49] [INFO ] Computed 2 invariants in 3 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/3 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 1 (OVERLAPS) 13/16 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/16 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 3 (OVERLAPS) 14/30 variables, 16/18 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/30 variables, 0/18 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 5 (OVERLAPS) 0/30 variables, 0/18 constraints. Problems are: Problem set: 0 solved, 5 unsolved
No progress, stopping.
After SMT solving in domain Real declared 30/30 variables, and 18 constraints, problems are : Problem set: 0 solved, 5 unsolved in 134 ms.
Refiners :[Generalized P Invariants (flows): 2/2 constraints, State Equation: 16/16 constraints, PredecessorRefiner: 5/5 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 5 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/3 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 1 (OVERLAPS) 13/16 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/16 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 3 (OVERLAPS) 14/30 variables, 16/18 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/30 variables, 5/23 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/30 variables, 0/23 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 6 (OVERLAPS) 0/30 variables, 0/23 constraints. Problems are: Problem set: 0 solved, 5 unsolved
No progress, stopping.
After SMT solving in domain Int declared 30/30 variables, and 23 constraints, problems are : Problem set: 0 solved, 5 unsolved in 130 ms.
Refiners :[Generalized P Invariants (flows): 2/2 constraints, State Equation: 16/16 constraints, PredecessorRefiner: 5/5 constraints, Known Traps: 0/0 constraints]
After SMT, in 276ms problems are : Problem set: 0 solved, 5 unsolved
Fused 5 Parikh solutions to 4 different solutions.
Finished Parikh walk after 1400 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=700 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Parikh walk visited 5 properties in 2228 ms.
Successfully simplified 5 atomic propositions for a total of 15 simplifications.
[2024-06-01 16:01:52] [INFO ] Flatten gal took : 42 ms
[2024-06-01 16:01:52] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 16:01:52] [INFO ] Flatten gal took : 14 ms
Transition Gate2ANDJoin forces synchronizations/join behavior on parameter l of sort LegalResident
Transition ReceiveLangChoice forces synchronizations/join behavior on parameter m of sort MICSystem
Symmetric sort wr.t. initial and guards and successors and join/free detected :CINFORMI
Symmetric sort wr.t. initial detected :CINFORMI
Symmetric sort wr.t. initial and guards detected :CINFORMI
Applying symmetric unfolding of full symmetric sort :CINFORMI domain size was 21
Transition Gate1ANDJoin forces synchronizations/join behavior on parameter p of sort PublicAdminOffice
Symmetric sort wr.t. initial and guards and successors and join/free detected :GovernmentCommission
Symmetric sort wr.t. initial detected :GovernmentCommission
Symmetric sort wr.t. initial and guards detected :GovernmentCommission
Applying symmetric unfolding of full symmetric sort :GovernmentCommission domain size was 11
Symmetric sort wr.t. initial and guards and successors and join/free detected :Response
Symmetric sort wr.t. initial detected :Response
Transition SendClearanceToRel : guard parameter $r(Response:2) in guard (EQ $r 0)introduces in Response(2) partition with 2 elements
[2024-06-01 16:01:55] [INFO ] Unfolded HLPN to a Petri net with 477829 places and 412249 transitions 1184997 arcs in 2506 ms.
[2024-06-01 16:01:55] [INFO ] Unfolded 14 HLPN properties in 42 ms.
Deduced a syphon composed of 401 places in 1546 ms
Reduce places removed 467 places and 0 transitions.
Support contains 348978 out of 477362 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 477362/477362 places, 412249/412249 transitions.
Reduce places removed 21 places and 0 transitions.
Discarding 49724 places :
Implicit places reduction removed 49724 places
Iterating post reduction 0 with 49745 rules applied. Total rules applied 49745 place count 427617 transition count 412249
Applied a total of 49745 rules in 138135 ms. Remains 427617 /477362 variables (removed 49745) and now considering 412249/412249 (removed 0) transitions.
// Phase 1: matrix 412249 rows 427617 cols
[2024-06-01 16:06:22] [WARNING] Invariant computation timed out after 120 seconds.
[2024-06-01 16:09:02] [INFO ] Performed 237395/427617 implicitness test of which 0 returned IMPLICIT in 103 seconds.
[2024-06-01 16:09:02] [INFO ] Implicit Places using invariants in 280333 ms returned []
Implicit Place search using SMT only with invariants took 280343 ms to find 0 implicit places.
Running 411848 sub problems to find dead transitions.
// Phase 1: matrix 412249 rows 427617 cols
[2024-06-01 16:11:15] [WARNING] Invariant computation timed out after 120 seconds.
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-00
Could not compute solution for formula : FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-01
Could not compute solution for formula : FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-02
Could not compute solution for formula : FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-03
Could not compute solution for formula : FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-04
Could not compute solution for formula : FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-05
Could not compute solution for formula : FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-06
Could not compute solution for formula : FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-07
Could not compute solution for formula : FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-08
Could not compute solution for formula : FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-09
Could not compute solution for formula : FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-10
Could not compute solution for formula : FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-11
Could not compute solution for formula : FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-12
Could not compute solution for formula : FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-13
Could not compute solution for formula : FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-14
Could not compute solution for formula : FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-15

BK_STOP 1717258314809

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
mcc2024
ctl formula name FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-00
ctl formula formula --ctl=/tmp/533/ctl_0_
ctl formula name FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-01
ctl formula formula --ctl=/tmp/533/ctl_1_
ctl formula name FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-02
ctl formula formula --ctl=/tmp/533/ctl_2_
ctl formula name FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-03
ctl formula formula --ctl=/tmp/533/ctl_3_
ctl formula name FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-04
ctl formula formula --ctl=/tmp/533/ctl_4_
ctl formula name FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-05
ctl formula formula --ctl=/tmp/533/ctl_5_
ctl formula name FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-06
ctl formula formula --ctl=/tmp/533/ctl_6_
ctl formula name FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-07
ctl formula formula --ctl=/tmp/533/ctl_7_
ctl formula name FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-08
ctl formula formula --ctl=/tmp/533/ctl_8_
ctl formula name FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-09
ctl formula formula --ctl=/tmp/533/ctl_9_
ctl formula name FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-10
ctl formula formula --ctl=/tmp/533/ctl_10_
ctl formula name FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-11
ctl formula formula --ctl=/tmp/533/ctl_11_
ctl formula name FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-12
ctl formula formula --ctl=/tmp/533/ctl_12_
ctl formula name FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-13
ctl formula formula --ctl=/tmp/533/ctl_13_
ctl formula name FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-14
ctl formula formula --ctl=/tmp/533/ctl_14_
ctl formula name FamilyReunion-COL-L00400M0040C020P020G001-CTLCardinality-2024-15
ctl formula formula --ctl=/tmp/533/ctl_15_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-COL-L00400M0040C020P020G001"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is FamilyReunion-COL-L00400M0040C020P020G001, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r492-smll-171636266900425"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-COL-L00400M0040C020P020G001.tgz
mv FamilyReunion-COL-L00400M0040C020P020G001 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;