About the Execution of LTSMin+red for FamilyReunion-COL-L00200M0020C010P010G005
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
16196.363 | 1942261.00 | 2198694.00 | 6010.50 | ???????????????F | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r492-smll-171636266800418.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is FamilyReunion-COL-L00200M0020C010P010G005, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r492-smll-171636266800418
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 580K
-rw-r--r-- 1 mcc users 7.2K Apr 12 04:00 CTLCardinality.txt
-rw-r--r-- 1 mcc users 75K Apr 12 04:00 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.3K Apr 12 01:10 CTLFireability.txt
-rw-r--r-- 1 mcc users 42K Apr 12 01:10 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.0K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Apr 22 14:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 22 14:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.2K Apr 22 14:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 22 14:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.4K Apr 12 11:43 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 82K Apr 12 11:43 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 14K Apr 12 09:45 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 91K Apr 12 09:45 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Apr 22 14:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Apr 22 14:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_pt
-rw-r--r-- 1 mcc users 24 May 18 16:42 instance
-rw-r--r-- 1 mcc users 5 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 146K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-00
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-01
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-02
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-03
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-04
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-05
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-06
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-07
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-08
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-09
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-10
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-11
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-12
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-13
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-14
FORMULA_NAME FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-15
=== Now, execution of the tool begins
BK_START 1717251122944
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FamilyReunion-COL-L00200M0020C010P010G005
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 14:12:05] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 14:12:05] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 14:12:05] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2024-06-01 14:12:06] [WARNING] Using fallBack plugin, rng conformance not checked
[2024-06-01 14:12:07] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 1523 ms
[2024-06-01 14:12:07] [INFO ] Detected 5 constant HL places corresponding to 56 PT places.
[2024-06-01 14:12:07] [INFO ] Imported 104 HL places and 66 HL transitions for a total of 144109 PT places and 134480.0 transition bindings in 82 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 24 ms.
[2024-06-01 14:12:07] [INFO ] Built PT skeleton of HLPN with 104 places and 66 transitions 198 arcs in 12 ms.
[2024-06-01 14:12:07] [INFO ] Skeletonized 16 HLPN properties in 5 ms.
Computed a total of 104 stabilizing places and 66 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 104 transition count 66
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 8 formulas.
Remains 16 properties that can be checked using skeleton over-approximation.
Initial state reduction rules removed 1 formulas.
Reduce places removed 5 places and 0 transitions.
FORMULA FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 99 stabilizing places and 66 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 99 transition count 66
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
RANDOM walk for 40411 steps (8 resets) in 338 ms. (119 steps per ms) remains 30/40 properties
BEST_FIRST walk for 4003 steps (8 resets) in 140 ms. (28 steps per ms) remains 29/30 properties
BEST_FIRST walk for 4004 steps (8 resets) in 113 ms. (35 steps per ms) remains 28/29 properties
BEST_FIRST walk for 4003 steps (8 resets) in 102 ms. (38 steps per ms) remains 27/28 properties
BEST_FIRST walk for 4001 steps (8 resets) in 125 ms. (31 steps per ms) remains 27/27 properties
BEST_FIRST walk for 4003 steps (8 resets) in 111 ms. (35 steps per ms) remains 27/27 properties
BEST_FIRST walk for 4004 steps (8 resets) in 106 ms. (37 steps per ms) remains 27/27 properties
BEST_FIRST walk for 4004 steps (8 resets) in 99 ms. (40 steps per ms) remains 27/27 properties
BEST_FIRST walk for 4004 steps (8 resets) in 108 ms. (36 steps per ms) remains 27/27 properties
BEST_FIRST walk for 4004 steps (8 resets) in 88 ms. (44 steps per ms) remains 27/27 properties
BEST_FIRST walk for 4004 steps (8 resets) in 77 ms. (51 steps per ms) remains 27/27 properties
BEST_FIRST walk for 4004 steps (8 resets) in 43 ms. (91 steps per ms) remains 27/27 properties
BEST_FIRST walk for 4003 steps (8 resets) in 48 ms. (81 steps per ms) remains 27/27 properties
BEST_FIRST walk for 4003 steps (8 resets) in 51 ms. (76 steps per ms) remains 27/27 properties
BEST_FIRST walk for 4004 steps (8 resets) in 50 ms. (78 steps per ms) remains 25/27 properties
BEST_FIRST walk for 4004 steps (8 resets) in 69 ms. (57 steps per ms) remains 25/25 properties
BEST_FIRST walk for 4004 steps (8 resets) in 51 ms. (77 steps per ms) remains 25/25 properties
BEST_FIRST walk for 4003 steps (8 resets) in 50 ms. (78 steps per ms) remains 25/25 properties
BEST_FIRST walk for 4004 steps (8 resets) in 37 ms. (105 steps per ms) remains 25/25 properties
BEST_FIRST walk for 4004 steps (8 resets) in 50 ms. (78 steps per ms) remains 25/25 properties
BEST_FIRST walk for 4003 steps (8 resets) in 42 ms. (93 steps per ms) remains 25/25 properties
BEST_FIRST walk for 4004 steps (8 resets) in 19 ms. (200 steps per ms) remains 25/25 properties
BEST_FIRST walk for 4004 steps (8 resets) in 27 ms. (143 steps per ms) remains 25/25 properties
BEST_FIRST walk for 4004 steps (8 resets) in 26 ms. (148 steps per ms) remains 25/25 properties
BEST_FIRST walk for 4004 steps (8 resets) in 49 ms. (80 steps per ms) remains 25/25 properties
BEST_FIRST walk for 4004 steps (8 resets) in 33 ms. (117 steps per ms) remains 23/25 properties
BEST_FIRST walk for 4003 steps (8 resets) in 29 ms. (133 steps per ms) remains 23/23 properties
BEST_FIRST walk for 4003 steps (8 resets) in 36 ms. (108 steps per ms) remains 23/23 properties
// Phase 1: matrix 66 rows 99 cols
[2024-06-01 14:12:08] [INFO ] Computed 33 invariants in 14 ms
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/39 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 23 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/39 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 23 unsolved
At refinement iteration 2 (OVERLAPS) 29/68 variables, 4/5 constraints. Problems are: Problem set: 0 solved, 23 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/68 variables, 3/8 constraints. Problems are: Problem set: 0 solved, 23 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/68 variables, 0/8 constraints. Problems are: Problem set: 0 solved, 23 unsolved
At refinement iteration 5 (OVERLAPS) 31/99 variables, 25/33 constraints. Problems are: Problem set: 0 solved, 23 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/99 variables, 0/33 constraints. Problems are: Problem set: 0 solved, 23 unsolved
At refinement iteration 7 (OVERLAPS) 66/165 variables, 99/132 constraints. Problems are: Problem set: 0 solved, 23 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/165 variables, 0/132 constraints. Problems are: Problem set: 0 solved, 23 unsolved
At refinement iteration 9 (OVERLAPS) 0/165 variables, 0/132 constraints. Problems are: Problem set: 0 solved, 23 unsolved
No progress, stopping.
After SMT solving in domain Real declared 165/165 variables, and 132 constraints, problems are : Problem set: 0 solved, 23 unsolved in 1318 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, Generalized P Invariants (flows): 29/29 constraints, State Equation: 99/99 constraints, PredecessorRefiner: 23/23 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 23 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/39 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 23 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/39 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 23 unsolved
At refinement iteration 2 (OVERLAPS) 29/68 variables, 4/5 constraints. Problems are: Problem set: 0 solved, 23 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/68 variables, 3/8 constraints. Problems are: Problem set: 0 solved, 23 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/68 variables, 0/8 constraints. Problems are: Problem set: 0 solved, 23 unsolved
At refinement iteration 5 (OVERLAPS) 31/99 variables, 25/33 constraints. Problems are: Problem set: 0 solved, 23 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/99 variables, 0/33 constraints. Problems are: Problem set: 0 solved, 23 unsolved
At refinement iteration 7 (OVERLAPS) 66/165 variables, 99/132 constraints. Problems are: Problem set: 0 solved, 23 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/165 variables, 23/155 constraints. Problems are: Problem set: 0 solved, 23 unsolved
At refinement iteration 9 (INCLUDED_ONLY) 0/165 variables, 0/155 constraints. Problems are: Problem set: 0 solved, 23 unsolved
At refinement iteration 10 (OVERLAPS) 0/165 variables, 0/155 constraints. Problems are: Problem set: 0 solved, 23 unsolved
No progress, stopping.
After SMT solving in domain Int declared 165/165 variables, and 155 constraints, problems are : Problem set: 0 solved, 23 unsolved in 1590 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, Generalized P Invariants (flows): 29/29 constraints, State Equation: 99/99 constraints, PredecessorRefiner: 23/23 constraints, Known Traps: 0/0 constraints]
After SMT, in 2994ms problems are : Problem set: 0 solved, 23 unsolved
Fused 23 Parikh solutions to 6 different solutions.
Finished Parikh walk after 900 steps, including 0 resets, run visited all 23 properties in 69 ms. (steps per millisecond=13 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Parikh walk visited 23 properties in 82 ms.
[2024-06-01 14:12:11] [INFO ] Flatten gal took : 57 ms
[2024-06-01 14:12:11] [INFO ] Flatten gal took : 16 ms
Transition Gate2ANDJoin forces synchronizations/join behavior on parameter l of sort LegalResident
Transition ReceiveLangChoice forces synchronizations/join behavior on parameter m of sort MICSystem
Symmetric sort wr.t. initial and guards and successors and join/free detected :CINFORMI
Symmetric sort wr.t. initial detected :CINFORMI
Symmetric sort wr.t. initial and guards detected :CINFORMI
Applying symmetric unfolding of full symmetric sort :CINFORMI domain size was 11
Transition Gate1ANDJoin forces synchronizations/join behavior on parameter p of sort PublicAdminOffice
Symmetric sort wr.t. initial and guards and successors and join/free detected :GovernmentCommission
Symmetric sort wr.t. initial detected :GovernmentCommission
Symmetric sort wr.t. initial and guards detected :GovernmentCommission
Applying symmetric unfolding of full symmetric sort :GovernmentCommission domain size was 6
Symmetric sort wr.t. initial and guards and successors and join/free detected :Response
Symmetric sort wr.t. initial detected :Response
Transition SendClearanceToRel : guard parameter $r(Response:2) in guard (EQ $r 0)introduces in Response(2) partition with 2 elements
[2024-06-01 14:12:12] [INFO ] Unfolded HLPN to a Petri net with 128969 places and 110159 transitions 316597 arcs in 1109 ms.
[2024-06-01 14:12:12] [INFO ] Unfolded 15 HLPN properties in 57 ms.
[2024-06-01 14:12:12] [INFO ] Reduced 201 identical enabling conditions.
[2024-06-01 14:12:12] [INFO ] Reduced 201 identical enabling conditions.
[2024-06-01 14:12:12] [INFO ] Reduced 2010 identical enabling conditions.
[2024-06-01 14:12:12] [INFO ] Reduced 4020 identical enabling conditions.
[2024-06-01 14:12:12] [INFO ] Reduced 201 identical enabling conditions.
[2024-06-01 14:12:12] [INFO ] Reduced 4020 identical enabling conditions.
[2024-06-01 14:12:13] [INFO ] Reduced 2010 identical enabling conditions.
Deduced a syphon composed of 201 places in 674 ms
Reduce places removed 237 places and 0 transitions.
Support contains 105559 out of 128732 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 128732/128732 places, 110159/110159 transitions.
Reduce places removed 649 places and 0 transitions.
Discarding 8643 places :
Implicit places reduction removed 8643 places
Iterating post reduction 0 with 9292 rules applied. Total rules applied 9292 place count 119440 transition count 110159
Applied a total of 9292 rules in 9385 ms. Remains 119440 /128732 variables (removed 9292) and now considering 110159/110159 (removed 0) transitions.
// Phase 1: matrix 110159 rows 119440 cols
[2024-06-01 14:14:41] [WARNING] Invariant computation timed out after 120 seconds.
[2024-06-01 14:14:47] [INFO ] Computed 21512 invariants in 126571 ms
[2024-06-01 14:16:03] [INFO ] Performed 53668/119440 implicitness test of which 0 returned IMPLICIT in 64 seconds.
[2024-06-01 14:16:33] [INFO ] Performed 115042/119440 implicitness test of which 0 returned IMPLICIT in 94 seconds.
[2024-06-01 14:16:44] [INFO ] Implicit Places using invariants in 243101 ms returned []
Implicit Place search using SMT only with invariants took 243118 ms to find 0 implicit places.
Running 109958 sub problems to find dead transitions.
[2024-06-01 14:16:46] [INFO ] Invariant cache hit.
SMT process timed out in 1585604ms, After SMT, problems are : Problem set: 0 solved, 109958 unsolved
Search for dead transitions found 0 dead transitions in 1587517ms
Starting structural reductions in LTL mode, iteration 1 : 119440/128732 places, 110159/110159 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1840338 ms. Remains : 119440/128732 places, 110159/110159 transitions.
Support contains 105559 out of 119440 places after structural reductions.
[2024-06-01 14:43:18] [INFO ] Flatten gal took : 4446 ms
[2024-06-01 14:43:29] [INFO ] Flatten gal took : 4605 ms
[2024-06-01 14:43:41] [INFO ] Input system was already deterministic with 110159 transitions.
Reduction of identical properties reduced properties to check from 53 to 50
RANDOM walk for 40000 steps (8 resets) in 98501 ms. (0 steps per ms) remains 20/50 properties
BEST_FIRST walk for 4004 steps (8 resets) in 97 ms. (40 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 998 ms. (4 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 95 ms. (41 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 94 ms. (42 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 144 ms. (27 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 97 ms. (40 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 64 ms. (61 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 104 ms. (38 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 102 ms. (38 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 110 ms. (36 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 96 ms. (41 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 2833 ms. (1 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 129 ms. (30 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 3573 ms. (1 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 80 ms. (49 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 123 ms. (32 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 259 ms. (15 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 182 ms. (21 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 126 ms. (31 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 447 ms. (8 steps per ms) remains 20/20 properties
[2024-06-01 14:44:11] [INFO ] Invariant cache hit.
Usage: pnml2lts-sym [-gvqh] [--order=
[--mu-opt] [--saturation=
[--sat-granularity=
[--guidance=
[--action=
[--trace=
[--mu=
[--ctl=
[--save-levels=STRING] [--pg-solve] [--attr=
[--saturating-attractor] [--write-strategy=
[--check-strategy] [--interactive-play] [--player]
[--pg-write=
[--edge-label=
[--mucalc=
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por=
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=
[--cw-max-cols=
[--mh-timeout=
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=
[--ldd32-cache=
[--cache-ratio=
[--min-free-nodes=
[--fdd-reorder=
[--vset-cache-diff=
[--next-union] [--peak-nodes] [--maxsum=
[--block-size=
[--debug=
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS]
Could not compute solution for formula : FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-00
Could not compute solution for formula : FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-01
Could not compute solution for formula : FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-02
Could not compute solution for formula : FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-03
Could not compute solution for formula : FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-04
Could not compute solution for formula : FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-05
Could not compute solution for formula : FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-06
Could not compute solution for formula : FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-07
Could not compute solution for formula : FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-08
Could not compute solution for formula : FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-09
Could not compute solution for formula : FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-10
Could not compute solution for formula : FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-11
Could not compute solution for formula : FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-12
Could not compute solution for formula : FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-13
Could not compute solution for formula : FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-14
Could not compute solution for formula : FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-15
BK_STOP 1717253065205
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/558/ctl_0_
ctl formula name FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/558/ctl_1_
ctl formula name FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/558/ctl_2_
ctl formula name FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/558/ctl_3_
ctl formula name FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/558/ctl_4_
ctl formula name FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/558/ctl_5_
ctl formula name FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/558/ctl_6_
ctl formula name FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/558/ctl_7_
ctl formula name FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/558/ctl_8_
ctl formula name FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/558/ctl_9_
ctl formula name FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/558/ctl_10_
ctl formula name FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/558/ctl_11_
ctl formula name FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-12
ctl formula formula --ctl=/tmp/558/ctl_12_
ctl formula name FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-13
ctl formula formula --ctl=/tmp/558/ctl_13_
ctl formula name FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-14
ctl formula formula --ctl=/tmp/558/ctl_14_
ctl formula name FamilyReunion-COL-L00200M0020C010P010G005-CTLFireability-2024-15
ctl formula formula --ctl=/tmp/558/ctl_15_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-COL-L00200M0020C010P010G005"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is FamilyReunion-COL-L00200M0020C010P010G005, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r492-smll-171636266800418"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-COL-L00200M0020C010P010G005.tgz
mv FamilyReunion-COL-L00200M0020C010P010G005 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;