fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r492-smll-171636266100090
Last Updated
July 7, 2024

About the Execution of LTSMin+red for Echo-PT-d02r15

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1826.504 182136.00 228788.00 739.80 ?????F?TT??????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r492-smll-171636266100090.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is Echo-PT-d02r15, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r492-smll-171636266100090
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.4M
-rw-r--r-- 1 mcc users 7.6K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 86K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.3K May 19 07:09 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K May 19 15:50 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 19 07:17 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 19 18:17 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Apr 12 04:44 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 107K Apr 12 04:44 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.8K Apr 12 04:42 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 88K Apr 12 04:42 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:42 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:42 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 7 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 917K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Echo-PT-d02r15-CTLFireability-2024-00
FORMULA_NAME Echo-PT-d02r15-CTLFireability-2024-01
FORMULA_NAME Echo-PT-d02r15-CTLFireability-2024-02
FORMULA_NAME Echo-PT-d02r15-CTLFireability-2024-03
FORMULA_NAME Echo-PT-d02r15-CTLFireability-2024-04
FORMULA_NAME Echo-PT-d02r15-CTLFireability-2024-05
FORMULA_NAME Echo-PT-d02r15-CTLFireability-2024-06
FORMULA_NAME Echo-PT-d02r15-CTLFireability-2024-07
FORMULA_NAME Echo-PT-d02r15-CTLFireability-2024-08
FORMULA_NAME Echo-PT-d02r15-CTLFireability-2024-09
FORMULA_NAME Echo-PT-d02r15-CTLFireability-2024-10
FORMULA_NAME Echo-PT-d02r15-CTLFireability-2024-11
FORMULA_NAME Echo-PT-d02r15-CTLFireability-2023-12
FORMULA_NAME Echo-PT-d02r15-CTLFireability-2023-13
FORMULA_NAME Echo-PT-d02r15-CTLFireability-2023-14
FORMULA_NAME Echo-PT-d02r15-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717198369334

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Echo-PT-d02r15
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-05-31 23:32:51] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-05-31 23:32:51] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-31 23:32:51] [INFO ] Load time of PNML (sax parser for PT used): 346 ms
[2024-05-31 23:32:51] [INFO ] Transformed 2127 places.
[2024-05-31 23:32:51] [INFO ] Transformed 1674 transitions.
[2024-05-31 23:32:51] [INFO ] Found NUPN structural information;
[2024-05-31 23:32:51] [INFO ] Parsed PT model containing 2127 places and 1674 transitions and 9700 arcs in 546 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 117 ms.
Support contains 290 out of 2127 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 2127/2127 places, 1674/1674 transitions.
Reduce places removed 225 places and 0 transitions.
Iterating post reduction 0 with 225 rules applied. Total rules applied 225 place count 1902 transition count 1674
Applied a total of 225 rules in 305 ms. Remains 1902 /2127 variables (removed 225) and now considering 1674/1674 (removed 0) transitions.
// Phase 1: matrix 1674 rows 1902 cols
[2024-05-31 23:32:55] [INFO ] Computed 840 invariants in 2905 ms
[2024-05-31 23:33:05] [INFO ] Implicit Places using invariants in 13205 ms returned []
[2024-05-31 23:33:05] [INFO ] Invariant cache hit.
[2024-05-31 23:33:15] [INFO ] Implicit Places using invariants and state equation in 10139 ms returned []
Implicit Place search using SMT with State Equation took 23529 ms to find 0 implicit places.
Running 1673 sub problems to find dead transitions.
[2024-05-31 23:33:15] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/1901 variables, 1901/1901 constraints. Problems are: Problem set: 0 solved, 1673 unsolved
SMT process timed out in 31441ms, After SMT, problems are : Problem set: 0 solved, 1673 unsolved
Search for dead transitions found 0 dead transitions in 31498ms
Starting structural reductions in LTL mode, iteration 1 : 1902/2127 places, 1674/1674 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 55382 ms. Remains : 1902/2127 places, 1674/1674 transitions.
Support contains 290 out of 1902 places after structural reductions.
[2024-05-31 23:33:48] [INFO ] Flatten gal took : 420 ms
[2024-05-31 23:33:48] [INFO ] Flatten gal took : 170 ms
[2024-05-31 23:33:48] [INFO ] Input system was already deterministic with 1674 transitions.
Reduction of identical properties reduced properties to check from 94 to 93
RANDOM walk for 40000 steps (88 resets) in 4232 ms. (9 steps per ms) remains 4/93 properties
BEST_FIRST walk for 40004 steps (8 resets) in 584 ms. (68 steps per ms) remains 3/4 properties
BEST_FIRST walk for 40004 steps (8 resets) in 507 ms. (78 steps per ms) remains 3/3 properties
BEST_FIRST walk for 40004 steps (8 resets) in 467 ms. (85 steps per ms) remains 3/3 properties
BEST_FIRST walk for 40004 steps (8 resets) in 612 ms. (65 steps per ms) remains 2/3 properties
[2024-05-31 23:33:50] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/13 variables, 13/13 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/13 variables, 0/13 constraints. Problems are: Problem set: 0 solved, 2 unsolved
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 1394/3576 variables, and 431 constraints, problems are : Problem set: 0 solved, 2 unsolved in 3825 ms.
Refiners :[Domain max(s): 13/1902 constraints, Generalized P Invariants (flows): 418/840 constraints, State Equation: 0/1902 constraints, PredecessorRefiner: 2/2 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 2 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/13 variables, 13/13 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/13 variables, 0/13 constraints. Problems are: Problem set: 0 solved, 2 unsolved
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 1394/3576 variables, and 431 constraints, problems are : Problem set: 0 solved, 2 unsolved in 3826 ms.
Refiners :[Domain max(s): 13/1902 constraints, Generalized P Invariants (flows): 418/840 constraints, State Equation: 0/1902 constraints, PredecessorRefiner: 0/2 constraints, Known Traps: 0/0 constraints]
After SMT, in 7820ms problems are : Problem set: 0 solved, 2 unsolved
Skipping Parikh replay, no witness traces provided.
Support contains 13 out of 1902 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Graph (complete) has 5685 edges and 1902 vertex of which 1893 are kept as prefixes of interest. Removing 9 places using SCC suffix rule.13 ms
Discarding 9 places :
Also discarding 1 output transitions
Drop transitions (Output transitions of discarded places.) removed 1 transitions
Drop transitions (Empty/Sink Transition effects.) removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 5 place count 1893 transition count 1669
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 1 with 1 rules applied. Total rules applied 6 place count 1892 transition count 1668
Applied a total of 6 rules in 323 ms. Remains 1892 /1902 variables (removed 10) and now considering 1668/1674 (removed 6) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 326 ms. Remains : 1892/1902 places, 1668/1674 transitions.
RANDOM walk for 40000 steps (88 resets) in 1095 ms. (36 steps per ms) remains 2/2 properties
BEST_FIRST walk for 40004 steps (8 resets) in 541 ms. (73 steps per ms) remains 2/2 properties
BEST_FIRST walk for 40004 steps (8 resets) in 494 ms. (80 steps per ms) remains 2/2 properties
Interrupted probabilistic random walk after 217375 steps, run timeout after 3001 ms. (steps per millisecond=72 ) properties seen :0 out of 2
Probabilistic random walk after 217375 steps, saw 59812 distinct states, run finished after 3011 ms. (steps per millisecond=72 ) properties seen :0
// Phase 1: matrix 1668 rows 1892 cols
[2024-05-31 23:34:04] [INFO ] Computed 832 invariants in 2439 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/13 variables, 13/13 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/13 variables, 0/13 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 2 (OVERLAPS) 1517/1530 variables, 500/513 constraints. Problems are: Problem set: 0 solved, 2 unsolved
All remaining problems are real, not stopping.
At refinement iteration 3 (INCLUDED_ONLY) 0/1530 variables, 1517/2030 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/1530 variables, 0/2030 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 5 (OVERLAPS) 362/1892 variables, 332/2362 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/1892 variables, 362/2724 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/1892 variables, 0/2724 constraints. Problems are: Problem set: 0 solved, 2 unsolved
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 3560/3560 variables, and 4616 constraints, problems are : Problem set: 0 solved, 2 unsolved in 45019 ms.
Refiners :[Domain max(s): 1892/1892 constraints, Generalized P Invariants (flows): 832/832 constraints, State Equation: 1892/1892 constraints, PredecessorRefiner: 2/2 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 2 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/13 variables, 13/13 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/13 variables, 0/13 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 2 (OVERLAPS) 1517/1530 variables, 500/513 constraints. Problems are: Problem set: 0 solved, 2 unsolved
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 1530/3560 variables, and 2030 constraints, problems are : Problem set: 0 solved, 2 unsolved in 45013 ms.
Refiners :[Domain max(s): 1530/1892 constraints, Generalized P Invariants (flows): 500/832 constraints, State Equation: 0/1892 constraints, PredecessorRefiner: 0/2 constraints, Known Traps: 0/0 constraints]
After SMT, in 92723ms problems are : Problem set: 0 solved, 2 unsolved
Skipping Parikh replay, no witness traces provided.
Support contains 13 out of 1892 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1892/1892 places, 1668/1668 transitions.
Applied a total of 0 rules in 105 ms. Remains 1892 /1892 variables (removed 0) and now considering 1668/1668 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 106 ms. Remains : 1892/1892 places, 1668/1668 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1892/1892 places, 1668/1668 transitions.
Applied a total of 0 rules in 93 ms. Remains 1892 /1892 variables (removed 0) and now considering 1668/1668 (removed 0) transitions.
[2024-05-31 23:35:35] [INFO ] Invariant cache hit.
[2024-05-31 23:35:44] [INFO ] Implicit Places using invariants in 8647 ms returned [2, 55, 1837, 1890]
Discarding 4 places :
Implicit Place search using SMT only with invariants took 8654 ms to find 4 implicit places.
Starting structural reductions in REACHABILITY mode, iteration 1 : 1888/1892 places, 1668/1668 transitions.
Applied a total of 0 rules in 91 ms. Remains 1888 /1888 variables (removed 0) and now considering 1668/1668 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 2 iterations and 8840 ms. Remains : 1888/1892 places, 1668/1668 transitions.
[2024-05-31 23:35:44] [INFO ] Flatten gal took : 116 ms
[2024-05-31 23:35:44] [INFO ] Flatten gal took : 124 ms
[2024-05-31 23:35:44] [INFO ] Input system was already deterministic with 1674 transitions.
Computed a total of 1902 stabilizing places and 1674 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 1902 transition count 1674
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 3 formulas.
FORMULA Echo-PT-d02r15-CTLFireability-2024-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Echo-PT-d02r15-CTLFireability-2024-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in LTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Applied a total of 0 rules in 206 ms. Remains 1902 /1902 variables (removed 0) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 207 ms. Remains : 1902/1902 places, 1674/1674 transitions.
[2024-05-31 23:35:45] [INFO ] Flatten gal took : 97 ms
[2024-05-31 23:35:45] [INFO ] Flatten gal took : 108 ms
[2024-05-31 23:35:45] [INFO ] Input system was already deterministic with 1674 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Applied a total of 0 rules in 80 ms. Remains 1902 /1902 variables (removed 0) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 81 ms. Remains : 1902/1902 places, 1674/1674 transitions.
[2024-05-31 23:35:45] [INFO ] Flatten gal took : 87 ms
[2024-05-31 23:35:45] [INFO ] Flatten gal took : 92 ms
[2024-05-31 23:35:45] [INFO ] Input system was already deterministic with 1674 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Applied a total of 0 rules in 83 ms. Remains 1902 /1902 variables (removed 0) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 84 ms. Remains : 1902/1902 places, 1674/1674 transitions.
[2024-05-31 23:35:46] [INFO ] Flatten gal took : 78 ms
[2024-05-31 23:35:46] [INFO ] Flatten gal took : 89 ms
[2024-05-31 23:35:46] [INFO ] Input system was already deterministic with 1674 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Graph (complete) has 5685 edges and 1902 vertex of which 1897 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.13 ms
Discarding 5 places :
Also discarding 1 output transitions
Drop transitions (Output transitions of discarded places.) removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 121 ms. Remains 1896 /1902 variables (removed 6) and now considering 1672/1674 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 122 ms. Remains : 1896/1902 places, 1672/1674 transitions.
[2024-05-31 23:35:46] [INFO ] Flatten gal took : 72 ms
[2024-05-31 23:35:46] [INFO ] Flatten gal took : 78 ms
[2024-05-31 23:35:46] [INFO ] Input system was already deterministic with 1672 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Applied a total of 0 rules in 81 ms. Remains 1902 /1902 variables (removed 0) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 82 ms. Remains : 1902/1902 places, 1674/1674 transitions.
[2024-05-31 23:35:47] [INFO ] Flatten gal took : 70 ms
[2024-05-31 23:35:47] [INFO ] Flatten gal took : 77 ms
[2024-05-31 23:35:47] [INFO ] Input system was already deterministic with 1674 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Applied a total of 0 rules in 82 ms. Remains 1902 /1902 variables (removed 0) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 82 ms. Remains : 1902/1902 places, 1674/1674 transitions.
[2024-05-31 23:35:47] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2024-05-31 23:35:47] [INFO ] Flatten gal took : 69 ms
FORMULA Echo-PT-d02r15-CTLFireability-2024-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-05-31 23:35:47] [INFO ] Flatten gal took : 77 ms
[2024-05-31 23:35:47] [INFO ] Input system was already deterministic with 1674 transitions.
Support contains 0 out of 1902 places (down from 9) after GAL structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Applied a total of 0 rules in 82 ms. Remains 1902 /1902 variables (removed 0) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 83 ms. Remains : 1902/1902 places, 1674/1674 transitions.
[2024-05-31 23:35:47] [INFO ] Flatten gal took : 69 ms
[2024-05-31 23:35:47] [INFO ] Flatten gal took : 78 ms
[2024-05-31 23:35:48] [INFO ] Input system was already deterministic with 1674 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Applied a total of 0 rules in 80 ms. Remains 1902 /1902 variables (removed 0) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 80 ms. Remains : 1902/1902 places, 1674/1674 transitions.
[2024-05-31 23:35:48] [INFO ] Flatten gal took : 67 ms
[2024-05-31 23:35:48] [INFO ] Flatten gal took : 75 ms
[2024-05-31 23:35:48] [INFO ] Input system was already deterministic with 1674 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Applied a total of 0 rules in 80 ms. Remains 1902 /1902 variables (removed 0) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 81 ms. Remains : 1902/1902 places, 1674/1674 transitions.
[2024-05-31 23:35:48] [INFO ] Flatten gal took : 68 ms
[2024-05-31 23:35:48] [INFO ] Flatten gal took : 80 ms
[2024-05-31 23:35:48] [INFO ] Input system was already deterministic with 1674 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Applied a total of 0 rules in 91 ms. Remains 1902 /1902 variables (removed 0) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 91 ms. Remains : 1902/1902 places, 1674/1674 transitions.
[2024-05-31 23:35:48] [INFO ] Flatten gal took : 67 ms
[2024-05-31 23:35:49] [INFO ] Flatten gal took : 74 ms
[2024-05-31 23:35:49] [INFO ] Input system was already deterministic with 1674 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Graph (complete) has 5685 edges and 1902 vertex of which 1897 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.7 ms
Discarding 5 places :
Also discarding 1 output transitions
Drop transitions (Output transitions of discarded places.) removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 213 ms. Remains 1896 /1902 variables (removed 6) and now considering 1672/1674 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 213 ms. Remains : 1896/1902 places, 1672/1674 transitions.
[2024-05-31 23:35:49] [INFO ] Flatten gal took : 68 ms
[2024-05-31 23:35:49] [INFO ] Flatten gal took : 74 ms
[2024-05-31 23:35:49] [INFO ] Input system was already deterministic with 1672 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Graph (complete) has 5685 edges and 1902 vertex of which 1897 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.7 ms
Discarding 5 places :
Also discarding 1 output transitions
Drop transitions (Output transitions of discarded places.) removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 118 ms. Remains 1896 /1902 variables (removed 6) and now considering 1672/1674 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 118 ms. Remains : 1896/1902 places, 1672/1674 transitions.
[2024-05-31 23:35:49] [INFO ] Flatten gal took : 65 ms
[2024-05-31 23:35:49] [INFO ] Flatten gal took : 73 ms
[2024-05-31 23:35:50] [INFO ] Input system was already deterministic with 1672 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Graph (complete) has 5685 edges and 1902 vertex of which 1897 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.5 ms
Discarding 5 places :
Also discarding 1 output transitions
Drop transitions (Output transitions of discarded places.) removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 106 ms. Remains 1896 /1902 variables (removed 6) and now considering 1672/1674 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 106 ms. Remains : 1896/1902 places, 1672/1674 transitions.
[2024-05-31 23:35:50] [INFO ] Flatten gal took : 65 ms
[2024-05-31 23:35:50] [INFO ] Flatten gal took : 71 ms
[2024-05-31 23:35:50] [INFO ] Input system was already deterministic with 1672 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Applied a total of 0 rules in 81 ms. Remains 1902 /1902 variables (removed 0) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 81 ms. Remains : 1902/1902 places, 1674/1674 transitions.
[2024-05-31 23:35:50] [INFO ] Flatten gal took : 67 ms
[2024-05-31 23:35:50] [INFO ] Flatten gal took : 74 ms
[2024-05-31 23:35:50] [INFO ] Input system was already deterministic with 1674 transitions.
[2024-05-31 23:35:50] [INFO ] Flatten gal took : 72 ms
[2024-05-31 23:35:50] [INFO ] Flatten gal took : 73 ms
[2024-05-31 23:35:51] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 9 ms.
[2024-05-31 23:35:51] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 1902 places, 1674 transitions and 8863 arcs took 19 ms.
Total runtime 179968 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : Echo-PT-d02r15-CTLFireability-2024-00
Could not compute solution for formula : Echo-PT-d02r15-CTLFireability-2024-01
Could not compute solution for formula : Echo-PT-d02r15-CTLFireability-2024-02
Could not compute solution for formula : Echo-PT-d02r15-CTLFireability-2024-03
Could not compute solution for formula : Echo-PT-d02r15-CTLFireability-2024-04
Could not compute solution for formula : Echo-PT-d02r15-CTLFireability-2024-06
Could not compute solution for formula : Echo-PT-d02r15-CTLFireability-2024-09
Could not compute solution for formula : Echo-PT-d02r15-CTLFireability-2024-10
Could not compute solution for formula : Echo-PT-d02r15-CTLFireability-2024-11
Could not compute solution for formula : Echo-PT-d02r15-CTLFireability-2023-12
Could not compute solution for formula : Echo-PT-d02r15-CTLFireability-2023-13
Could not compute solution for formula : Echo-PT-d02r15-CTLFireability-2023-14
Could not compute solution for formula : Echo-PT-d02r15-CTLFireability-2023-15

BK_STOP 1717198551470

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name Echo-PT-d02r15-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/547/ctl_0_
ctl formula name Echo-PT-d02r15-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/547/ctl_1_
ctl formula name Echo-PT-d02r15-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/547/ctl_2_
ctl formula name Echo-PT-d02r15-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/547/ctl_3_
ctl formula name Echo-PT-d02r15-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/547/ctl_4_
ctl formula name Echo-PT-d02r15-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/547/ctl_5_
ctl formula name Echo-PT-d02r15-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/547/ctl_6_
ctl formula name Echo-PT-d02r15-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/547/ctl_7_
ctl formula name Echo-PT-d02r15-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/547/ctl_8_
ctl formula name Echo-PT-d02r15-CTLFireability-2023-12
ctl formula formula --ctl=/tmp/547/ctl_9_
ctl formula name Echo-PT-d02r15-CTLFireability-2023-13
ctl formula formula --ctl=/tmp/547/ctl_10_
ctl formula name Echo-PT-d02r15-CTLFireability-2023-14
ctl formula formula --ctl=/tmp/547/ctl_11_
ctl formula name Echo-PT-d02r15-CTLFireability-2023-15
ctl formula formula --ctl=/tmp/547/ctl_12_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Echo-PT-d02r15"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is Echo-PT-d02r15, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r492-smll-171636266100090"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Echo-PT-d02r15.tgz
mv Echo-PT-d02r15 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;