Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r488-tall-171631133100626.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is DoubleLock-PT-p3s1, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r488-tall-171631133100626
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 568K
-rw-r--r-- 1 mcc users 7.3K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 85K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K Apr 22 14:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Apr 22 14:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 19 07:17 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 19 18:16 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Apr 12 13:18 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 172K Apr 12 13:18 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Apr 12 13:17 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 105K Apr 12 13:17 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K May 19 07:11 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 19 15:25 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 39K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DoubleLock-PT-p3s1-CTLFireability-2024-00
FORMULA_NAME DoubleLock-PT-p3s1-CTLFireability-2024-01
FORMULA_NAME DoubleLock-PT-p3s1-CTLFireability-2024-02
FORMULA_NAME DoubleLock-PT-p3s1-CTLFireability-2024-03
FORMULA_NAME DoubleLock-PT-p3s1-CTLFireability-2024-04
FORMULA_NAME DoubleLock-PT-p3s1-CTLFireability-2024-05
FORMULA_NAME DoubleLock-PT-p3s1-CTLFireability-2024-06
FORMULA_NAME DoubleLock-PT-p3s1-CTLFireability-2024-07
FORMULA_NAME DoubleLock-PT-p3s1-CTLFireability-2024-08
FORMULA_NAME DoubleLock-PT-p3s1-CTLFireability-2024-09
FORMULA_NAME DoubleLock-PT-p3s1-CTLFireability-2024-10
FORMULA_NAME DoubleLock-PT-p3s1-CTLFireability-2024-11
FORMULA_NAME DoubleLock-PT-p3s1-CTLFireability-2023-12
FORMULA_NAME DoubleLock-PT-p3s1-CTLFireability-2023-13
FORMULA_NAME DoubleLock-PT-p3s1-CTLFireability-2023-14
FORMULA_NAME DoubleLock-PT-p3s1-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717202490117

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DoubleLock-PT-p3s1
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 00:41:31] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 00:41:31] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 00:41:31] [INFO ] Load time of PNML (sax parser for PT used): 53 ms
[2024-06-01 00:41:31] [INFO ] Transformed 46 places.
[2024-06-01 00:41:31] [INFO ] Transformed 80 transitions.
[2024-06-01 00:41:31] [INFO ] Parsed PT model containing 46 places and 80 transitions and 324 arcs in 142 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 12 ms.
Deduced a syphon composed of 6 places in 1 ms
Reduce places removed 6 places and 4 transitions.
FORMULA DoubleLock-PT-p3s1-CTLFireability-2023-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 32 out of 40 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 40/40 places, 76/76 transitions.
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 37 transition count 76
Applied a total of 3 rules in 13 ms. Remains 37 /40 variables (removed 3) and now considering 76/76 (removed 0) transitions.
[2024-06-01 00:41:31] [INFO ] Flow matrix only has 61 transitions (discarded 15 similar events)
// Phase 1: matrix 61 rows 37 cols
[2024-06-01 00:41:31] [INFO ] Computed 2 invariants in 9 ms
[2024-06-01 00:41:31] [INFO ] Implicit Places using invariants in 165 ms returned []
[2024-06-01 00:41:31] [INFO ] Flow matrix only has 61 transitions (discarded 15 similar events)
[2024-06-01 00:41:31] [INFO ] Invariant cache hit.
[2024-06-01 00:41:31] [INFO ] State equation strengthened by 12 read => feed constraints.
[2024-06-01 00:41:31] [INFO ] Implicit Places using invariants and state equation in 91 ms returned []
Implicit Place search using SMT with State Equation took 283 ms to find 0 implicit places.
Running 74 sub problems to find dead transitions.
[2024-06-01 00:41:31] [INFO ] Flow matrix only has 61 transitions (discarded 15 similar events)
[2024-06-01 00:41:31] [INFO ] Invariant cache hit.
[2024-06-01 00:41:31] [INFO ] State equation strengthened by 12 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/37 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 74 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/37 variables, 1/2 constraints. Problems are: Problem set: 0 solved, 74 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/37 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 74 unsolved
At refinement iteration 3 (OVERLAPS) 61/98 variables, 37/39 constraints. Problems are: Problem set: 0 solved, 74 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/98 variables, 12/51 constraints. Problems are: Problem set: 0 solved, 74 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/98 variables, 0/51 constraints. Problems are: Problem set: 0 solved, 74 unsolved
At refinement iteration 6 (OVERLAPS) 0/98 variables, 0/51 constraints. Problems are: Problem set: 0 solved, 74 unsolved
No progress, stopping.
After SMT solving in domain Real declared 98/98 variables, and 51 constraints, problems are : Problem set: 0 solved, 74 unsolved in 894 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, Generalized P Invariants (flows): 1/1 constraints, State Equation: 37/37 constraints, ReadFeed: 12/12 constraints, PredecessorRefiner: 74/74 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 74 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/37 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 74 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/37 variables, 1/2 constraints. Problems are: Problem set: 0 solved, 74 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/37 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 74 unsolved
At refinement iteration 3 (OVERLAPS) 61/98 variables, 37/39 constraints. Problems are: Problem set: 0 solved, 74 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/98 variables, 12/51 constraints. Problems are: Problem set: 0 solved, 74 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/98 variables, 74/125 constraints. Problems are: Problem set: 0 solved, 74 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/98 variables, 0/125 constraints. Problems are: Problem set: 0 solved, 74 unsolved
At refinement iteration 7 (OVERLAPS) 0/98 variables, 0/125 constraints. Problems are: Problem set: 0 solved, 74 unsolved
No progress, stopping.
After SMT solving in domain Int declared 98/98 variables, and 125 constraints, problems are : Problem set: 0 solved, 74 unsolved in 1152 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, Generalized P Invariants (flows): 1/1 constraints, State Equation: 37/37 constraints, ReadFeed: 12/12 constraints, PredecessorRefiner: 74/74 constraints, Known Traps: 0/0 constraints]
After SMT, in 2131ms problems are : Problem set: 0 solved, 74 unsolved
Search for dead transitions found 0 dead transitions in 2144ms
Starting structural reductions in LTL mode, iteration 1 : 37/40 places, 76/76 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2458 ms. Remains : 37/40 places, 76/76 transitions.
Support contains 32 out of 37 places after structural reductions.
[2024-06-01 00:41:34] [INFO ] Flatten gal took : 23 ms
[2024-06-01 00:41:34] [INFO ] Flatten gal took : 9 ms
[2024-06-01 00:41:34] [INFO ] Input system was already deterministic with 76 transitions.
Reduction of identical properties reduced properties to check from 58 to 54
RANDOM walk for 40000 steps (274 resets) in 1278 ms. (31 steps per ms) remains 4/54 properties
BEST_FIRST walk for 40003 steps (8 resets) in 210 ms. (189 steps per ms) remains 4/4 properties
BEST_FIRST walk for 40002 steps (46 resets) in 122 ms. (325 steps per ms) remains 4/4 properties
BEST_FIRST walk for 40004 steps (27 resets) in 81 ms. (487 steps per ms) remains 4/4 properties
BEST_FIRST walk for 40002 steps (31 resets) in 110 ms. (360 steps per ms) remains 4/4 properties
[2024-06-01 00:41:34] [INFO ] Flow matrix only has 61 transitions (discarded 15 similar events)
[2024-06-01 00:41:34] [INFO ] Invariant cache hit.
[2024-06-01 00:41:34] [INFO ] State equation strengthened by 12 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/11 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 1 (OVERLAPS) 3/14 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/14 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 3 (OVERLAPS) 54/68 variables, 14/15 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/68 variables, 5/20 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/68 variables, 0/20 constraints. Problems are: Problem set: 0 solved, 4 unsolved
Problem AtomicPropp8 is UNSAT
Problem AtomicPropp16 is UNSAT
Problem AtomicPropp21 is UNSAT
Problem AtomicPropp43 is UNSAT
After SMT solving in domain Real declared 98/98 variables, and 43 constraints, problems are : Problem set: 4 solved, 0 unsolved in 63 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, Generalized P Invariants (flows): 0/1 constraints, State Equation: 37/37 constraints, ReadFeed: 5/12 constraints, PredecessorRefiner: 4/4 constraints, Known Traps: 0/0 constraints]
After SMT, in 75ms problems are : Problem set: 4 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 4 atomic propositions for a total of 15 simplifications.
FORMULA DoubleLock-PT-p3s1-CTLFireability-2024-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 00:41:34] [INFO ] Flatten gal took : 7 ms
[2024-06-01 00:41:34] [INFO ] Flatten gal took : 6 ms
[2024-06-01 00:41:34] [INFO ] Input system was already deterministic with 76 transitions.
Computed a total of 3 stabilizing places and 8 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 37/37 places, 76/76 transitions.
Applied a total of 0 rules in 2 ms. Remains 37 /37 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 37/37 places, 76/76 transitions.
[2024-06-01 00:41:34] [INFO ] Flatten gal took : 5 ms
[2024-06-01 00:41:34] [INFO ] Flatten gal took : 6 ms
[2024-06-01 00:41:34] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 37/37 places, 76/76 transitions.
Applied a total of 0 rules in 1 ms. Remains 37 /37 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 37/37 places, 76/76 transitions.
[2024-06-01 00:41:34] [INFO ] Flatten gal took : 5 ms
[2024-06-01 00:41:34] [INFO ] Flatten gal took : 5 ms
[2024-06-01 00:41:34] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 37/37 places, 76/76 transitions.
Applied a total of 0 rules in 1 ms. Remains 37 /37 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 37/37 places, 76/76 transitions.
[2024-06-01 00:41:34] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:41:34] [INFO ] Flatten gal took : 5 ms
[2024-06-01 00:41:34] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 37/37 places, 76/76 transitions.
Applied a total of 0 rules in 1 ms. Remains 37 /37 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 37/37 places, 76/76 transitions.
[2024-06-01 00:41:34] [INFO ] Flatten gal took : 5 ms
[2024-06-01 00:41:34] [INFO ] Flatten gal took : 5 ms
[2024-06-01 00:41:34] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 37/37 places, 76/76 transitions.
Applied a total of 0 rules in 1 ms. Remains 37 /37 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 37/37 places, 76/76 transitions.
[2024-06-01 00:41:34] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:41:34] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:41:34] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 37/37 places, 76/76 transitions.
Applied a total of 0 rules in 1 ms. Remains 37 /37 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 37/37 places, 76/76 transitions.
[2024-06-01 00:41:34] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:41:34] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:41:35] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 37/37 places, 76/76 transitions.
Applied a total of 0 rules in 6 ms. Remains 37 /37 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 37/37 places, 76/76 transitions.
[2024-06-01 00:41:35] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:41:35] [INFO ] Flatten gal took : 5 ms
[2024-06-01 00:41:35] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 37/37 places, 76/76 transitions.
Applied a total of 0 rules in 1 ms. Remains 37 /37 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 37/37 places, 76/76 transitions.
[2024-06-01 00:41:35] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:41:35] [INFO ] Flatten gal took : 5 ms
[2024-06-01 00:41:35] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 37/37 places, 76/76 transitions.
Applied a total of 0 rules in 1 ms. Remains 37 /37 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 37/37 places, 76/76 transitions.
[2024-06-01 00:41:35] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:41:35] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:41:35] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 37/37 places, 76/76 transitions.
Applied a total of 0 rules in 1 ms. Remains 37 /37 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 37/37 places, 76/76 transitions.
[2024-06-01 00:41:35] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:41:35] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:41:35] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 37/37 places, 76/76 transitions.
Applied a total of 0 rules in 1 ms. Remains 37 /37 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 37/37 places, 76/76 transitions.
[2024-06-01 00:41:35] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:41:35] [INFO ] Flatten gal took : 5 ms
[2024-06-01 00:41:35] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 37/37 places, 76/76 transitions.
Applied a total of 0 rules in 0 ms. Remains 37 /37 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 37/37 places, 76/76 transitions.
[2024-06-01 00:41:35] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:41:35] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:41:35] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 37/37 places, 76/76 transitions.
Applied a total of 0 rules in 1 ms. Remains 37 /37 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 37/37 places, 76/76 transitions.
[2024-06-01 00:41:35] [INFO ] Flatten gal took : 7 ms
[2024-06-01 00:41:35] [INFO ] Flatten gal took : 5 ms
[2024-06-01 00:41:35] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 37/37 places, 76/76 transitions.
Applied a total of 0 rules in 3 ms. Remains 37 /37 variables (removed 0) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 37/37 places, 76/76 transitions.
[2024-06-01 00:41:35] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:41:35] [INFO ] Flatten gal took : 5 ms
[2024-06-01 00:41:35] [INFO ] Input system was already deterministic with 76 transitions.
[2024-06-01 00:41:35] [INFO ] Flatten gal took : 5 ms
[2024-06-01 00:41:35] [INFO ] Flatten gal took : 5 ms
[2024-06-01 00:41:35] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2024-06-01 00:41:35] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 37 places, 76 transitions and 304 arcs took 3 ms.
Total runtime 4024 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : DoubleLock-PT-p3s1-CTLFireability-2024-00
Could not compute solution for formula : DoubleLock-PT-p3s1-CTLFireability-2024-01
Could not compute solution for formula : DoubleLock-PT-p3s1-CTLFireability-2024-02
Could not compute solution for formula : DoubleLock-PT-p3s1-CTLFireability-2024-03
Could not compute solution for formula : DoubleLock-PT-p3s1-CTLFireability-2024-04
Could not compute solution for formula : DoubleLock-PT-p3s1-CTLFireability-2024-06
Could not compute solution for formula : DoubleLock-PT-p3s1-CTLFireability-2024-07
Could not compute solution for formula : DoubleLock-PT-p3s1-CTLFireability-2024-08
Could not compute solution for formula : DoubleLock-PT-p3s1-CTLFireability-2024-09
Could not compute solution for formula : DoubleLock-PT-p3s1-CTLFireability-2024-10
Could not compute solution for formula : DoubleLock-PT-p3s1-CTLFireability-2024-11
Could not compute solution for formula : DoubleLock-PT-p3s1-CTLFireability-2023-12
Could not compute solution for formula : DoubleLock-PT-p3s1-CTLFireability-2023-13
Could not compute solution for formula : DoubleLock-PT-p3s1-CTLFireability-2023-14

BK_STOP 1717202495580

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name DoubleLock-PT-p3s1-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/504/ctl_0_
ctl formula name DoubleLock-PT-p3s1-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/504/ctl_1_
ctl formula name DoubleLock-PT-p3s1-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/504/ctl_2_
ctl formula name DoubleLock-PT-p3s1-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/504/ctl_3_
ctl formula name DoubleLock-PT-p3s1-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/504/ctl_4_
ctl formula name DoubleLock-PT-p3s1-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/504/ctl_5_
ctl formula name DoubleLock-PT-p3s1-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/504/ctl_6_
ctl formula name DoubleLock-PT-p3s1-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/504/ctl_7_
ctl formula name DoubleLock-PT-p3s1-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/504/ctl_8_
ctl formula name DoubleLock-PT-p3s1-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/504/ctl_9_
ctl formula name DoubleLock-PT-p3s1-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/504/ctl_10_
ctl formula name DoubleLock-PT-p3s1-CTLFireability-2023-12
ctl formula formula --ctl=/tmp/504/ctl_11_
ctl formula name DoubleLock-PT-p3s1-CTLFireability-2023-13
ctl formula formula --ctl=/tmp/504/ctl_12_
ctl formula name DoubleLock-PT-p3s1-CTLFireability-2023-14
ctl formula formula --ctl=/tmp/504/ctl_13_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DoubleLock-PT-p3s1"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is DoubleLock-PT-p3s1, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r488-tall-171631133100626"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DoubleLock-PT-p3s1.tgz
mv DoubleLock-PT-p3s1 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;