Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r488-tall-171631133000610.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is DoubleLock-PT-p2s1, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r488-tall-171631133000610
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 480K
-rw-r--r-- 1 mcc users 5.4K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 57K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.0K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 46K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K May 19 07:09 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K May 19 15:48 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Apr 22 14:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Apr 22 14:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.9K Apr 12 13:38 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 98K Apr 12 13:38 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.9K Apr 12 13:37 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 68K Apr 12 13:37 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K May 19 07:11 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 19 15:25 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 97K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DoubleLock-PT-p2s1-CTLFireability-2024-00
FORMULA_NAME DoubleLock-PT-p2s1-CTLFireability-2024-01
FORMULA_NAME DoubleLock-PT-p2s1-CTLFireability-2024-02
FORMULA_NAME DoubleLock-PT-p2s1-CTLFireability-2024-03
FORMULA_NAME DoubleLock-PT-p2s1-CTLFireability-2024-04
FORMULA_NAME DoubleLock-PT-p2s1-CTLFireability-2024-05
FORMULA_NAME DoubleLock-PT-p2s1-CTLFireability-2024-06
FORMULA_NAME DoubleLock-PT-p2s1-CTLFireability-2024-07
FORMULA_NAME DoubleLock-PT-p2s1-CTLFireability-2024-08
FORMULA_NAME DoubleLock-PT-p2s1-CTLFireability-2024-09
FORMULA_NAME DoubleLock-PT-p2s1-CTLFireability-2024-10
FORMULA_NAME DoubleLock-PT-p2s1-CTLFireability-2024-11
FORMULA_NAME DoubleLock-PT-p2s1-CTLFireability-2023-12
FORMULA_NAME DoubleLock-PT-p2s1-CTLFireability-2023-13
FORMULA_NAME DoubleLock-PT-p2s1-CTLFireability-2023-14
FORMULA_NAME DoubleLock-PT-p2s1-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717202024181

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DoubleLock-PT-p2s1
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 00:33:45] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 00:33:45] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 00:33:45] [INFO ] Load time of PNML (sax parser for PT used): 72 ms
[2024-06-01 00:33:45] [INFO ] Transformed 64 places.
[2024-06-01 00:33:45] [INFO ] Transformed 212 transitions.
[2024-06-01 00:33:45] [INFO ] Parsed PT model containing 64 places and 212 transitions and 860 arcs in 165 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 12 ms.
Deduced a syphon composed of 8 places in 2 ms
Reduce places removed 8 places and 8 transitions.
Support contains 49 out of 56 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 204/204 transitions.
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 52 transition count 204
Applied a total of 4 rules in 15 ms. Remains 52 /56 variables (removed 4) and now considering 204/204 (removed 0) transitions.
[2024-06-01 00:33:45] [INFO ] Flow matrix only has 152 transitions (discarded 52 similar events)
// Phase 1: matrix 152 rows 52 cols
[2024-06-01 00:33:45] [INFO ] Computed 2 invariants in 11 ms
[2024-06-01 00:33:45] [INFO ] Implicit Places using invariants in 166 ms returned []
[2024-06-01 00:33:45] [INFO ] Flow matrix only has 152 transitions (discarded 52 similar events)
[2024-06-01 00:33:45] [INFO ] Invariant cache hit.
[2024-06-01 00:33:45] [INFO ] State equation strengthened by 27 read => feed constraints.
[2024-06-01 00:33:45] [INFO ] Implicit Places using invariants and state equation in 107 ms returned []
Implicit Place search using SMT with State Equation took 300 ms to find 0 implicit places.
Running 202 sub problems to find dead transitions.
[2024-06-01 00:33:45] [INFO ] Flow matrix only has 152 transitions (discarded 52 similar events)
[2024-06-01 00:33:45] [INFO ] Invariant cache hit.
[2024-06-01 00:33:45] [INFO ] State equation strengthened by 27 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/52 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 202 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/52 variables, 1/2 constraints. Problems are: Problem set: 0 solved, 202 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/52 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 202 unsolved
At refinement iteration 3 (OVERLAPS) 152/204 variables, 52/54 constraints. Problems are: Problem set: 0 solved, 202 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/204 variables, 27/81 constraints. Problems are: Problem set: 0 solved, 202 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/204 variables, 0/81 constraints. Problems are: Problem set: 0 solved, 202 unsolved
At refinement iteration 6 (OVERLAPS) 0/204 variables, 0/81 constraints. Problems are: Problem set: 0 solved, 202 unsolved
No progress, stopping.
After SMT solving in domain Real declared 204/204 variables, and 81 constraints, problems are : Problem set: 0 solved, 202 unsolved in 3363 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, Generalized P Invariants (flows): 1/1 constraints, State Equation: 52/52 constraints, ReadFeed: 27/27 constraints, PredecessorRefiner: 202/202 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 202 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/52 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 202 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/52 variables, 1/2 constraints. Problems are: Problem set: 0 solved, 202 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/52 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 202 unsolved
At refinement iteration 3 (OVERLAPS) 152/204 variables, 52/54 constraints. Problems are: Problem set: 0 solved, 202 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/204 variables, 27/81 constraints. Problems are: Problem set: 0 solved, 202 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/204 variables, 202/283 constraints. Problems are: Problem set: 0 solved, 202 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/204 variables, 0/283 constraints. Problems are: Problem set: 0 solved, 202 unsolved
At refinement iteration 7 (OVERLAPS) 0/204 variables, 0/283 constraints. Problems are: Problem set: 0 solved, 202 unsolved
No progress, stopping.
After SMT solving in domain Int declared 204/204 variables, and 283 constraints, problems are : Problem set: 0 solved, 202 unsolved in 5640 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, Generalized P Invariants (flows): 1/1 constraints, State Equation: 52/52 constraints, ReadFeed: 27/27 constraints, PredecessorRefiner: 202/202 constraints, Known Traps: 0/0 constraints]
After SMT, in 9224ms problems are : Problem set: 0 solved, 202 unsolved
Search for dead transitions found 0 dead transitions in 9241ms
Starting structural reductions in LTL mode, iteration 1 : 52/56 places, 204/204 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9583 ms. Remains : 52/56 places, 204/204 transitions.
Support contains 49 out of 52 places after structural reductions.
[2024-06-01 00:33:55] [INFO ] Flatten gal took : 53 ms
[2024-06-01 00:33:55] [INFO ] Flatten gal took : 17 ms
[2024-06-01 00:33:55] [INFO ] Input system was already deterministic with 204 transitions.
Reduction of identical properties reduced properties to check from 67 to 66
RANDOM walk for 40007 steps (203 resets) in 1451 ms. (27 steps per ms) remains 4/66 properties
BEST_FIRST walk for 40003 steps (8 resets) in 160 ms. (248 steps per ms) remains 4/4 properties
BEST_FIRST walk for 40003 steps (47 resets) in 129 ms. (307 steps per ms) remains 4/4 properties
BEST_FIRST walk for 40002 steps (37 resets) in 76 ms. (519 steps per ms) remains 4/4 properties
BEST_FIRST walk for 40003 steps (8 resets) in 117 ms. (339 steps per ms) remains 4/4 properties
[2024-06-01 00:33:56] [INFO ] Flow matrix only has 152 transitions (discarded 52 similar events)
[2024-06-01 00:33:56] [INFO ] Invariant cache hit.
[2024-06-01 00:33:56] [INFO ] State equation strengthened by 27 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/13 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 1 (OVERLAPS) 6/19 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/19 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 3 (OVERLAPS) 14/33 variables, 1/2 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/33 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 5 (OVERLAPS) 142/175 variables, 33/35 constraints. Problems are: Problem set: 0 solved, 4 unsolved
All remaining problems are real, not stopping.
At refinement iteration 6 (INCLUDED_ONLY) 0/175 variables, 21/56 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/175 variables, 0/56 constraints. Problems are: Problem set: 0 solved, 4 unsolved
Problem AtomicPropp34 is UNSAT
Problem AtomicPropp35 is UNSAT
Problem AtomicPropp47 is UNSAT
Problem AtomicPropp57 is UNSAT
After SMT solving in domain Real declared 204/204 variables, and 75 constraints, problems are : Problem set: 4 solved, 0 unsolved in 174 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, Generalized P Invariants (flows): 1/1 constraints, State Equation: 52/52 constraints, ReadFeed: 21/27 constraints, PredecessorRefiner: 4/4 constraints, Known Traps: 0/0 constraints]
After SMT, in 199ms problems are : Problem set: 4 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 4 atomic propositions for a total of 16 simplifications.
[2024-06-01 00:33:56] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2024-06-01 00:33:56] [INFO ] Flatten gal took : 11 ms
FORMULA DoubleLock-PT-p2s1-CTLFireability-2024-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 00:33:56] [INFO ] Flatten gal took : 13 ms
[2024-06-01 00:33:56] [INFO ] Input system was already deterministic with 204 transitions.
Computed a total of 4 stabilizing places and 24 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 52/52 places, 204/204 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 51 transition count 200
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 51 transition count 200
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 3 place count 50 transition count 196
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 50 transition count 196
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 5 place count 49 transition count 192
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 49 transition count 192
Applied a total of 6 rules in 22 ms. Remains 49 /52 variables (removed 3) and now considering 192/204 (removed 12) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 22 ms. Remains : 49/52 places, 192/204 transitions.
[2024-06-01 00:33:56] [INFO ] Flatten gal took : 10 ms
[2024-06-01 00:33:56] [INFO ] Flatten gal took : 11 ms
[2024-06-01 00:33:56] [INFO ] Input system was already deterministic with 192 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 204/204 transitions.
Applied a total of 0 rules in 2 ms. Remains 52 /52 variables (removed 0) and now considering 204/204 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 52/52 places, 204/204 transitions.
[2024-06-01 00:33:56] [INFO ] Flatten gal took : 9 ms
[2024-06-01 00:33:56] [INFO ] Flatten gal took : 11 ms
[2024-06-01 00:33:56] [INFO ] Input system was already deterministic with 204 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 204/204 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 51 transition count 200
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 51 transition count 200
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 3 place count 50 transition count 196
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 50 transition count 196
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 5 place count 49 transition count 192
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 49 transition count 192
Applied a total of 6 rules in 6 ms. Remains 49 /52 variables (removed 3) and now considering 192/204 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 49/52 places, 192/204 transitions.
[2024-06-01 00:33:56] [INFO ] Flatten gal took : 9 ms
[2024-06-01 00:33:56] [INFO ] Flatten gal took : 32 ms
[2024-06-01 00:33:56] [INFO ] Input system was already deterministic with 192 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 204/204 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 51 transition count 200
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 51 transition count 200
Applied a total of 2 rules in 3 ms. Remains 51 /52 variables (removed 1) and now considering 200/204 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 51/52 places, 200/204 transitions.
[2024-06-01 00:33:56] [INFO ] Flatten gal took : 8 ms
[2024-06-01 00:33:56] [INFO ] Flatten gal took : 9 ms
[2024-06-01 00:33:56] [INFO ] Input system was already deterministic with 200 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 204/204 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 51 transition count 200
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 51 transition count 200
Applied a total of 2 rules in 3 ms. Remains 51 /52 variables (removed 1) and now considering 200/204 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 51/52 places, 200/204 transitions.
[2024-06-01 00:33:56] [INFO ] Flatten gal took : 8 ms
[2024-06-01 00:33:56] [INFO ] Flatten gal took : 9 ms
[2024-06-01 00:33:56] [INFO ] Input system was already deterministic with 200 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 52/52 places, 204/204 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 51 transition count 200
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 51 transition count 200
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 3 place count 50 transition count 196
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 50 transition count 196
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 5 place count 49 transition count 192
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 49 transition count 192
Applied a total of 6 rules in 13 ms. Remains 49 /52 variables (removed 3) and now considering 192/204 (removed 12) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 49/52 places, 192/204 transitions.
[2024-06-01 00:33:56] [INFO ] Flatten gal took : 8 ms
[2024-06-01 00:33:56] [INFO ] Flatten gal took : 8 ms
[2024-06-01 00:33:56] [INFO ] Input system was already deterministic with 192 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 52/52 places, 204/204 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 51 transition count 200
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 51 transition count 200
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 3 place count 50 transition count 196
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 50 transition count 196
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 5 place count 49 transition count 192
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 49 transition count 192
Applied a total of 6 rules in 16 ms. Remains 49 /52 variables (removed 3) and now considering 192/204 (removed 12) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 16 ms. Remains : 49/52 places, 192/204 transitions.
[2024-06-01 00:33:56] [INFO ] Flatten gal took : 7 ms
[2024-06-01 00:33:56] [INFO ] Flatten gal took : 8 ms
[2024-06-01 00:33:56] [INFO ] Input system was already deterministic with 192 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 52/52 places, 204/204 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 51 transition count 200
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 51 transition count 200
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 3 place count 50 transition count 196
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 50 transition count 196
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 5 place count 49 transition count 192
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 49 transition count 192
Applied a total of 6 rules in 12 ms. Remains 49 /52 variables (removed 3) and now considering 192/204 (removed 12) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 12 ms. Remains : 49/52 places, 192/204 transitions.
[2024-06-01 00:33:56] [INFO ] Flatten gal took : 7 ms
[2024-06-01 00:33:56] [INFO ] Flatten gal took : 8 ms
[2024-06-01 00:33:56] [INFO ] Input system was already deterministic with 192 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 204/204 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 51 transition count 200
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 51 transition count 200
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 3 place count 50 transition count 196
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 50 transition count 196
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 5 place count 49 transition count 192
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 49 transition count 192
Applied a total of 6 rules in 5 ms. Remains 49 /52 variables (removed 3) and now considering 192/204 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 49/52 places, 192/204 transitions.
[2024-06-01 00:33:56] [INFO ] Flatten gal took : 9 ms
[2024-06-01 00:33:56] [INFO ] Flatten gal took : 7 ms
[2024-06-01 00:33:57] [INFO ] Input system was already deterministic with 192 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 204/204 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 51 transition count 200
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 51 transition count 200
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 3 place count 50 transition count 196
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 50 transition count 196
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 5 place count 49 transition count 192
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 49 transition count 192
Applied a total of 6 rules in 17 ms. Remains 49 /52 variables (removed 3) and now considering 192/204 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 17 ms. Remains : 49/52 places, 192/204 transitions.
[2024-06-01 00:33:57] [INFO ] Flatten gal took : 27 ms
[2024-06-01 00:33:57] [INFO ] Flatten gal took : 6 ms
[2024-06-01 00:33:57] [INFO ] Input system was already deterministic with 192 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 204/204 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 51 transition count 200
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 51 transition count 200
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 3 place count 50 transition count 196
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 50 transition count 196
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 5 place count 49 transition count 192
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 49 transition count 192
Applied a total of 6 rules in 3 ms. Remains 49 /52 variables (removed 3) and now considering 192/204 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 49/52 places, 192/204 transitions.
[2024-06-01 00:33:57] [INFO ] Flatten gal took : 31 ms
[2024-06-01 00:33:57] [INFO ] Flatten gal took : 7 ms
[2024-06-01 00:33:57] [INFO ] Input system was already deterministic with 192 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 52/52 places, 204/204 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 51 transition count 200
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 51 transition count 200
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 3 place count 50 transition count 196
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 50 transition count 196
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 5 place count 49 transition count 192
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 49 transition count 192
Applied a total of 6 rules in 10 ms. Remains 49 /52 variables (removed 3) and now considering 192/204 (removed 12) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 49/52 places, 192/204 transitions.
[2024-06-01 00:33:57] [INFO ] Flatten gal took : 7 ms
[2024-06-01 00:33:57] [INFO ] Flatten gal took : 7 ms
[2024-06-01 00:33:57] [INFO ] Input system was already deterministic with 192 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 52/52 places, 204/204 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 51 transition count 200
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 51 transition count 200
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 3 place count 50 transition count 196
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 50 transition count 196
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 5 place count 49 transition count 192
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 49 transition count 192
Applied a total of 6 rules in 10 ms. Remains 49 /52 variables (removed 3) and now considering 192/204 (removed 12) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 49/52 places, 192/204 transitions.
[2024-06-01 00:33:57] [INFO ] Flatten gal took : 6 ms
[2024-06-01 00:33:57] [INFO ] Flatten gal took : 6 ms
[2024-06-01 00:33:57] [INFO ] Input system was already deterministic with 192 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 52/52 places, 204/204 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 51 transition count 200
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 51 transition count 200
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 3 place count 50 transition count 196
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 50 transition count 196
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 5 place count 49 transition count 192
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 49 transition count 192
Applied a total of 6 rules in 9 ms. Remains 49 /52 variables (removed 3) and now considering 192/204 (removed 12) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 49/52 places, 192/204 transitions.
[2024-06-01 00:33:57] [INFO ] Flatten gal took : 6 ms
[2024-06-01 00:33:57] [INFO ] Flatten gal took : 6 ms
[2024-06-01 00:33:57] [INFO ] Input system was already deterministic with 192 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 204/204 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 51 transition count 200
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 51 transition count 200
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 3 place count 50 transition count 196
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 50 transition count 196
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 5 place count 49 transition count 192
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 49 transition count 192
Applied a total of 6 rules in 2 ms. Remains 49 /52 variables (removed 3) and now considering 192/204 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 49/52 places, 192/204 transitions.
[2024-06-01 00:33:57] [INFO ] Flatten gal took : 5 ms
[2024-06-01 00:33:57] [INFO ] Flatten gal took : 6 ms
[2024-06-01 00:33:57] [INFO ] Input system was already deterministic with 192 transitions.
[2024-06-01 00:33:57] [INFO ] Flatten gal took : 7 ms
[2024-06-01 00:33:57] [INFO ] Flatten gal took : 6 ms
[2024-06-01 00:33:57] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2024-06-01 00:33:57] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 52 places, 204 transitions and 812 arcs took 5 ms.
Total runtime 12109 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : DoubleLock-PT-p2s1-CTLFireability-2024-00
Could not compute solution for formula : DoubleLock-PT-p2s1-CTLFireability-2024-01
Could not compute solution for formula : DoubleLock-PT-p2s1-CTLFireability-2024-02
Could not compute solution for formula : DoubleLock-PT-p2s1-CTLFireability-2024-03
Could not compute solution for formula : DoubleLock-PT-p2s1-CTLFireability-2024-04
Could not compute solution for formula : DoubleLock-PT-p2s1-CTLFireability-2024-06
Could not compute solution for formula : DoubleLock-PT-p2s1-CTLFireability-2024-07
Could not compute solution for formula : DoubleLock-PT-p2s1-CTLFireability-2024-08
Could not compute solution for formula : DoubleLock-PT-p2s1-CTLFireability-2024-09
Could not compute solution for formula : DoubleLock-PT-p2s1-CTLFireability-2024-10
Could not compute solution for formula : DoubleLock-PT-p2s1-CTLFireability-2024-11
Could not compute solution for formula : DoubleLock-PT-p2s1-CTLFireability-2023-12
Could not compute solution for formula : DoubleLock-PT-p2s1-CTLFireability-2023-13
Could not compute solution for formula : DoubleLock-PT-p2s1-CTLFireability-2023-14
Could not compute solution for formula : DoubleLock-PT-p2s1-CTLFireability-2023-15

BK_STOP 1717202037802

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name DoubleLock-PT-p2s1-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/522/ctl_0_
ctl formula name DoubleLock-PT-p2s1-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/522/ctl_1_
ctl formula name DoubleLock-PT-p2s1-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/522/ctl_2_
ctl formula name DoubleLock-PT-p2s1-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/522/ctl_3_
ctl formula name DoubleLock-PT-p2s1-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/522/ctl_4_
ctl formula name DoubleLock-PT-p2s1-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/522/ctl_5_
ctl formula name DoubleLock-PT-p2s1-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/522/ctl_6_
ctl formula name DoubleLock-PT-p2s1-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/522/ctl_7_
ctl formula name DoubleLock-PT-p2s1-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/522/ctl_8_
ctl formula name DoubleLock-PT-p2s1-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/522/ctl_9_
ctl formula name DoubleLock-PT-p2s1-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/522/ctl_10_
ctl formula name DoubleLock-PT-p2s1-CTLFireability-2023-12
ctl formula formula --ctl=/tmp/522/ctl_11_
ctl formula name DoubleLock-PT-p2s1-CTLFireability-2023-13
ctl formula formula --ctl=/tmp/522/ctl_12_
ctl formula name DoubleLock-PT-p2s1-CTLFireability-2023-14
ctl formula formula --ctl=/tmp/522/ctl_13_
ctl formula name DoubleLock-PT-p2s1-CTLFireability-2023-15
ctl formula formula --ctl=/tmp/522/ctl_14_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DoubleLock-PT-p2s1"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is DoubleLock-PT-p2s1, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r488-tall-171631133000610"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DoubleLock-PT-p2s1.tgz
mv DoubleLock-PT-p2s1 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;