fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r488-tall-171631132400307
Last Updated
July 7, 2024

About the Execution of LTSMin+red for Diffusion2D-PT-D40N050

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
7077.207 989682.00 1477710.00 1956.40 FFFFFTFFTFFFFFTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r488-tall-171631132400307.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...............
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is Diffusion2D-PT-D40N050, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r488-tall-171631132400307
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 5.2M
-rw-r--r-- 1 mcc users 12K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 112K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.0K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 58K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Apr 22 14:40 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 22 14:40 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Apr 22 14:40 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 22 14:40 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Apr 11 14:20 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 112K Apr 11 14:20 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Apr 11 14:19 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 71K Apr 11 14:19 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 22 14:40 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Apr 22 14:40 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 8 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 4.7M May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Diffusion2D-PT-D40N050-LTLCardinality-00
FORMULA_NAME Diffusion2D-PT-D40N050-LTLCardinality-01
FORMULA_NAME Diffusion2D-PT-D40N050-LTLCardinality-02
FORMULA_NAME Diffusion2D-PT-D40N050-LTLCardinality-03
FORMULA_NAME Diffusion2D-PT-D40N050-LTLCardinality-04
FORMULA_NAME Diffusion2D-PT-D40N050-LTLCardinality-05
FORMULA_NAME Diffusion2D-PT-D40N050-LTLCardinality-06
FORMULA_NAME Diffusion2D-PT-D40N050-LTLCardinality-07
FORMULA_NAME Diffusion2D-PT-D40N050-LTLCardinality-08
FORMULA_NAME Diffusion2D-PT-D40N050-LTLCardinality-09
FORMULA_NAME Diffusion2D-PT-D40N050-LTLCardinality-10
FORMULA_NAME Diffusion2D-PT-D40N050-LTLCardinality-11
FORMULA_NAME Diffusion2D-PT-D40N050-LTLCardinality-12
FORMULA_NAME Diffusion2D-PT-D40N050-LTLCardinality-13
FORMULA_NAME Diffusion2D-PT-D40N050-LTLCardinality-14
FORMULA_NAME Diffusion2D-PT-D40N050-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1717189602153

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=LTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Diffusion2D-PT-D40N050
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-05-31 21:06:43] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -timeout, 360, -rebuildPNML]
[2024-05-31 21:06:43] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-31 21:06:43] [INFO ] Load time of PNML (sax parser for PT used): 421 ms
[2024-05-31 21:06:43] [INFO ] Transformed 1600 places.
[2024-05-31 21:06:43] [INFO ] Transformed 12324 transitions.
[2024-05-31 21:06:43] [INFO ] Parsed PT model containing 1600 places and 12324 transitions and 24648 arcs in 568 ms.
Parsed 16 properties from file /home/mcc/execution/LTLCardinality.xml in 30 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 4 formulas.
FORMULA Diffusion2D-PT-D40N050-LTLCardinality-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Diffusion2D-PT-D40N050-LTLCardinality-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Diffusion2D-PT-D40N050-LTLCardinality-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Diffusion2D-PT-D40N050-LTLCardinality-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 38 out of 1600 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Applied a total of 0 rules in 413 ms. Remains 1600 /1600 variables (removed 0) and now considering 12324/12324 (removed 0) transitions.
// Phase 1: matrix 12324 rows 1600 cols
[2024-05-31 21:06:44] [INFO ] Computed 1 invariants in 133 ms
[2024-05-31 21:06:45] [INFO ] Implicit Places using invariants in 575 ms returned []
Implicit Place search using SMT only with invariants took 609 ms to find 0 implicit places.
Running 12316 sub problems to find dead transitions.
[2024-05-31 21:06:45] [INFO ] Invariant cache hit.
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 1599/13924 variables, and 0 constraints, problems are : Problem set: 0 solved, 12316 unsolved in 30185 ms.
Refiners :[Positive P Invariants (semi-flows): 0/1 constraints, State Equation: 0/1600 constraints, PredecessorRefiner: 12316/12316 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 12316 unsolved
Error getting values : (error "Error writing to Z3 solver: java.io.IOException: Broken pipe")
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 1599/13924 variables, and 0 constraints, problems are : Problem set: 0 solved, 12316 unsolved in 30129 ms.
Refiners :[Positive P Invariants (semi-flows): 0/1 constraints, State Equation: 0/1600 constraints, PredecessorRefiner: 0/12316 constraints, Known Traps: 0/0 constraints]
After SMT, in 77030ms problems are : Problem set: 0 solved, 12316 unsolved
Search for dead transitions found 0 dead transitions in 77206ms
Finished structural reductions in LTL mode , in 1 iterations and 78304 ms. Remains : 1600/1600 places, 12324/12324 transitions.
Support contains 38 out of 1600 places after structural reductions.
[2024-05-31 21:08:03] [INFO ] Flatten gal took : 387 ms
[2024-05-31 21:08:03] [INFO ] Flatten gal took : 233 ms
[2024-05-31 21:08:04] [INFO ] Input system was already deterministic with 12324 transitions.
RANDOM walk for 40037 steps (8 resets) in 326 ms. (122 steps per ms) remains 20/25 properties
BEST_FIRST walk for 4004 steps (8 resets) in 20 ms. (190 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 22 ms. (174 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4003 steps (8 resets) in 9 ms. (400 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4003 steps (8 resets) in 9 ms. (400 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4003 steps (8 resets) in 17 ms. (222 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 10 ms. (364 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 19 ms. (200 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 9 ms. (400 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 8 ms. (444 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 13 ms. (286 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 14 ms. (266 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 12 ms. (308 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 10 ms. (364 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 10 ms. (364 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 8 ms. (444 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 11 ms. (333 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4003 steps (8 resets) in 15 ms. (250 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (8 resets) in 7 ms. (500 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4003 steps (8 resets) in 7 ms. (500 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4003 steps (8 resets) in 10 ms. (363 steps per ms) remains 20/20 properties
[2024-05-31 21:08:04] [INFO ] Invariant cache hit.
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/29 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 20 unsolved
At refinement iteration 1 (OVERLAPS) 1571/1600 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 20 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/1600 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 20 unsolved
At refinement iteration 3 (OVERLAPS) 12324/13924 variables, 1600/1601 constraints. Problems are: Problem set: 0 solved, 20 unsolved
Error getting values : (error "ParserException while parsing response: (timeout
org.smtlib.IParser$ParserException: Unbalanced parentheses at end of input")
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 13924/13924 variables, and 1601 constraints, problems are : Problem set: 0 solved, 20 unsolved in 5029 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, State Equation: 1600/1600 constraints, PredecessorRefiner: 20/20 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 20 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/29 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 20 unsolved
At refinement iteration 1 (OVERLAPS) 1571/1600 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 20 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/1600 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 20 unsolved
At refinement iteration 3 (OVERLAPS) 12324/13924 variables, 1600/1601 constraints. Problems are: Problem set: 0 solved, 20 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/13924 variables, 20/1621 constraints. Problems are: Problem set: 0 solved, 20 unsolved
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 13924/13924 variables, and 1621 constraints, problems are : Problem set: 0 solved, 20 unsolved in 5018 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, State Equation: 1600/1600 constraints, PredecessorRefiner: 20/20 constraints, Known Traps: 0/0 constraints]
After SMT, in 10149ms problems are : Problem set: 0 solved, 20 unsolved
Skipping Parikh replay, no witness traces provided.
Support contains 29 out of 1600 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Graph (trivial) has 11868 edges and 1600 vertex of which 1571 / 1600 are part of one of the 1 SCC in 24 ms
Free SCC test removed 1570 places
Drop transitions (Empty/Sink Transition effects.) removed 11868 transitions
Ensure Unique test removed 396 transitions
Reduce isomorphic transitions removed 12264 transitions.
Drop transitions (Redundant composition of simpler transitions.) removed 3 transitions
Redundant transition composition rules discarded 3 transitions
Iterating global reduction 0 with 3 rules applied. Total rules applied 4 place count 30 transition count 57
Applied a total of 4 rules in 58 ms. Remains 30 /1600 variables (removed 1570) and now considering 57/12324 (removed 12267) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 58 ms. Remains : 30/1600 places, 57/12324 transitions.
RANDOM walk for 37555 steps (8 resets) in 50 ms. (736 steps per ms) remains 0/20 properties
Computed a total of 0 stabilizing places and 0 stable transitions
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(X(X(X(G(p0))))))'
Support contains 3 out of 1600 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Applied a total of 0 rules in 457 ms. Remains 1600 /1600 variables (removed 0) and now considering 12324/12324 (removed 0) transitions.
[2024-05-31 21:08:15] [INFO ] Invariant cache hit.
[2024-05-31 21:08:15] [INFO ] Implicit Places using invariants in 178 ms returned []
Implicit Place search using SMT only with invariants took 179 ms to find 0 implicit places.
Running 12316 sub problems to find dead transitions.
[2024-05-31 21:08:15] [INFO ] Invariant cache hit.
(s1197 1.0timeout
^^^^^^^^^^
(error "Invalid token: 1.0timeout")
Error getting values : (error "ParserException while parsing response: ((s0 1.0)
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)
(s1198 org.smtlib.IParser$ParserException: Unbalanced parentheses at end of input")
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 1599/13924 variables, and 0 constraints, problems are : Problem set: 0 solved, 12316 unsolved in 30150 ms.
Refiners :[Positive P Invariants (semi-flows): 0/1 constraints, State Equation: 0/1600 constraints, PredecessorRefiner: 12316/12316 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 12316 unsolved
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 1599/13924 variables, and 0 constraints, problems are : Problem set: 0 solved, 12316 unsolved in 30127 ms.
Refiners :[Positive P Invariants (semi-flows): 0/1 constraints, State Equation: 0/1600 constraints, PredecessorRefiner: 0/12316 constraints, Known Traps: 0/0 constraints]
After SMT, in 76132ms problems are : Problem set: 0 solved, 12316 unsolved
Search for dead transitions found 0 dead transitions in 76235ms
Finished structural reductions in LTL mode , in 1 iterations and 76902 ms. Remains : 1600/1600 places, 12324/12324 transitions.
Stuttering acceptance computed with spot in 299 ms :[true, (NOT p0), (NOT p0), (NOT p0), (NOT p0), (NOT p0)]
Running random walk in product with property : Diffusion2D-PT-D40N050-LTLCardinality-00
Entered a terminal (fully accepting) state of product in 4 steps with 0 reset in 3 ms.
FORMULA Diffusion2D-PT-D40N050-LTLCardinality-00 FALSE TECHNIQUES STUTTER_TEST
Treatment of property Diffusion2D-PT-D40N050-LTLCardinality-00 finished in 77280 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(p0))'
Support contains 1 out of 1600 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Graph (trivial) has 12308 edges and 1600 vertex of which 1599 / 1600 are part of one of the 1 SCC in 13 ms
Free SCC test removed 1598 places
Ensure Unique test removed 12321 transitions
Reduce isomorphic transitions removed 12321 transitions.
Applied a total of 1 rules in 32 ms. Remains 2 /1600 variables (removed 1598) and now considering 3/12324 (removed 12321) transitions.
// Phase 1: matrix 3 rows 2 cols
[2024-05-31 21:09:32] [INFO ] Computed 1 invariants in 1 ms
[2024-05-31 21:09:32] [INFO ] Implicit Places using invariants in 15 ms returned []
[2024-05-31 21:09:32] [INFO ] Invariant cache hit.
[2024-05-31 21:09:32] [INFO ] Implicit Places using invariants and state equation in 17 ms returned []
Implicit Place search using SMT with State Equation took 34 ms to find 0 implicit places.
[2024-05-31 21:09:32] [INFO ] Redundant transitions in 0 ms returned []
Running 1 sub problems to find dead transitions.
[2024-05-31 21:09:32] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/1 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 1 (OVERLAPS) 1/2 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/2 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 3 (OVERLAPS) 2/4 variables, 2/3 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/4 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 5 (OVERLAPS) 0/4 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 1 unsolved
No progress, stopping.
After SMT solving in domain Real declared 4/5 variables, and 3 constraints, problems are : Problem set: 0 solved, 1 unsolved in 16 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, State Equation: 2/2 constraints, PredecessorRefiner: 1/1 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 1 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/1 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 1 (OVERLAPS) 1/2 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/2 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 3 (OVERLAPS) 2/4 variables, 2/3 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/4 variables, 1/4 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/4 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 6 (OVERLAPS) 0/4 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 1 unsolved
No progress, stopping.
After SMT solving in domain Int declared 4/5 variables, and 4 constraints, problems are : Problem set: 0 solved, 1 unsolved in 21 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, State Equation: 2/2 constraints, PredecessorRefiner: 1/1 constraints, Known Traps: 0/0 constraints]
After SMT, in 47ms problems are : Problem set: 0 solved, 1 unsolved
Search for dead transitions found 0 dead transitions in 47ms
Starting structural reductions in SI_LTL mode, iteration 1 : 2/1600 places, 3/12324 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 119 ms. Remains : 2/1600 places, 3/12324 transitions.
Stuttering acceptance computed with spot in 27 ms :[(NOT p0)]
Running random walk in product with property : Diffusion2D-PT-D40N050-LTLCardinality-01
Stuttering criterion allowed to conclude after 0 steps with 0 reset in 0 ms.
FORMULA Diffusion2D-PT-D40N050-LTLCardinality-01 FALSE TECHNIQUES STUTTER_TEST
Treatment of property Diffusion2D-PT-D40N050-LTLCardinality-01 finished in 164 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(G((F(G(p0)) U p1))))'
Support contains 4 out of 1600 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Applied a total of 0 rules in 153 ms. Remains 1600 /1600 variables (removed 0) and now considering 12324/12324 (removed 0) transitions.
// Phase 1: matrix 12324 rows 1600 cols
[2024-05-31 21:09:32] [INFO ] Computed 1 invariants in 69 ms
[2024-05-31 21:09:32] [INFO ] Implicit Places using invariants in 231 ms returned []
Implicit Place search using SMT only with invariants took 234 ms to find 0 implicit places.
Running 12316 sub problems to find dead transitions.
[2024-05-31 21:09:32] [INFO ] Invariant cache hit.
Error getting values : (error "ParserException while parsing response: (timeout
org.smtlib.IParser$ParserException: Unbalanced parentheses at end of input")
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 1599/13924 variables, and 0 constraints, problems are : Problem set: 0 solved, 12316 unsolved in 30241 ms.
Refiners :[Positive P Invariants (semi-flows): 0/1 constraints, State Equation: 0/1600 constraints, PredecessorRefiner: 12316/12316 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 12316 unsolved
Error getting values : (error "Error writing to Z3 solver: java.io.IOException: Broken pipe")
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 1599/13924 variables, and 0 constraints, problems are : Problem set: 0 solved, 12316 unsolved in 30127 ms.
Refiners :[Positive P Invariants (semi-flows): 0/1 constraints, State Equation: 0/1600 constraints, PredecessorRefiner: 0/12316 constraints, Known Traps: 0/0 constraints]
After SMT, in 75620ms problems are : Problem set: 0 solved, 12316 unsolved
Search for dead transitions found 0 dead transitions in 75716ms
Finished structural reductions in LTL mode , in 1 iterations and 76132 ms. Remains : 1600/1600 places, 12324/12324 transitions.
Stuttering acceptance computed with spot in 170 ms :[(NOT p1), (NOT p1), (NOT p0), (NOT p1)]
Running random walk in product with property : Diffusion2D-PT-D40N050-LTLCardinality-02
Product exploration explored 100000 steps with 0 reset in 2660 ms.
Stack based approach found an accepted trace after 34 steps with 0 reset with depth 35 and stack size 35 in 2 ms.
FORMULA Diffusion2D-PT-D40N050-LTLCardinality-02 FALSE TECHNIQUES STACK_TEST
Treatment of property Diffusion2D-PT-D40N050-LTLCardinality-02 finished in 79012 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(X(X(F((p0&&((p1||F(p2)) U p3)))))))'
Support contains 5 out of 1600 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Applied a total of 0 rules in 149 ms. Remains 1600 /1600 variables (removed 0) and now considering 12324/12324 (removed 0) transitions.
[2024-05-31 21:10:51] [INFO ] Invariant cache hit.
[2024-05-31 21:10:51] [INFO ] Implicit Places using invariants in 192 ms returned []
Implicit Place search using SMT only with invariants took 193 ms to find 0 implicit places.
Running 12316 sub problems to find dead transitions.
[2024-05-31 21:10:51] [INFO ] Invariant cache hit.
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 1599/13924 variables, and 0 constraints, problems are : Problem set: 0 solved, 12316 unsolved in 30130 ms.
Refiners :[Positive P Invariants (semi-flows): 0/1 constraints, State Equation: 0/1600 constraints, PredecessorRefiner: 12316/12316 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 12316 unsolved
Error getting values : (error "Error writing to Z3 solver: java.io.IOException: Broken pipe")
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 1599/13924 variables, and 0 constraints, problems are : Problem set: 0 solved, 12316 unsolved in 30124 ms.
Refiners :[Positive P Invariants (semi-flows): 0/1 constraints, State Equation: 0/1600 constraints, PredecessorRefiner: 0/12316 constraints, Known Traps: 0/0 constraints]
After SMT, in 75269ms problems are : Problem set: 0 solved, 12316 unsolved
Search for dead transitions found 0 dead transitions in 75366ms
Finished structural reductions in LTL mode , in 1 iterations and 75765 ms. Remains : 1600/1600 places, 12324/12324 transitions.
Stuttering acceptance computed with spot in 364 ms :[(OR (NOT p0) (NOT p3)), (OR (NOT p0) (NOT p3)), (OR (NOT p0) (NOT p3)), (OR (NOT p0) (NOT p3)), (OR (AND (NOT p0) (NOT p2)) (AND (NOT p2) (NOT p3))), (NOT p3), (AND (NOT p2) (NOT p3))]
Running random walk in product with property : Diffusion2D-PT-D40N050-LTLCardinality-03
Product exploration explored 100000 steps with 12 reset in 1911 ms.
Stack based approach found an accepted trace after 31 steps with 0 reset with depth 32 and stack size 32 in 1 ms.
FORMULA Diffusion2D-PT-D40N050-LTLCardinality-03 FALSE TECHNIQUES STACK_TEST
Treatment of property Diffusion2D-PT-D40N050-LTLCardinality-03 finished in 78085 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(F(p0)))'
Support contains 2 out of 1600 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Applied a total of 0 rules in 144 ms. Remains 1600 /1600 variables (removed 0) and now considering 12324/12324 (removed 0) transitions.
[2024-05-31 21:12:09] [INFO ] Invariant cache hit.
[2024-05-31 21:12:09] [INFO ] Implicit Places using invariants in 150 ms returned []
Implicit Place search using SMT only with invariants took 151 ms to find 0 implicit places.
Running 12316 sub problems to find dead transitions.
[2024-05-31 21:12:09] [INFO ] Invariant cache hit.
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 1599/13924 variables, and 0 constraints, problems are : Problem set: 0 solved, 12316 unsolved in 30130 ms.
Refiners :[Positive P Invariants (semi-flows): 0/1 constraints, State Equation: 0/1600 constraints, PredecessorRefiner: 12316/12316 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 12316 unsolved
Error getting values : (error "Error writing to Z3 solver: java.io.IOException: Broken pipe")
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 1599/13924 variables, and 0 constraints, problems are : Problem set: 0 solved, 12316 unsolved in 30123 ms.
Refiners :[Positive P Invariants (semi-flows): 0/1 constraints, State Equation: 0/1600 constraints, PredecessorRefiner: 0/12316 constraints, Known Traps: 0/0 constraints]
After SMT, in 75374ms problems are : Problem set: 0 solved, 12316 unsolved
Search for dead transitions found 0 dead transitions in 75471ms
Finished structural reductions in LTL mode , in 1 iterations and 75793 ms. Remains : 1600/1600 places, 12324/12324 transitions.
Stuttering acceptance computed with spot in 65 ms :[(NOT p0), (NOT p0)]
Running random walk in product with property : Diffusion2D-PT-D40N050-LTLCardinality-05
Product exploration explored 100000 steps with 50000 reset in 802 ms.
Product exploration explored 100000 steps with 50000 reset in 804 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [p0, (X p0), (X (X p0))]
False Knowledge obtained : []
Property proved to be true thanks to knowledge (Minato strategy)
Knowledge based reduction with 3 factoid took 14 ms. Reduced automaton from 2 states, 2 edges and 1 AP (stutter sensitive) to 1 states, 0 edges and 0 AP (stutter insensitive).
FORMULA Diffusion2D-PT-D40N050-LTLCardinality-05 TRUE TECHNIQUES KNOWLEDGE
Treatment of property Diffusion2D-PT-D40N050-LTLCardinality-05 finished in 77552 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(F(G(F((X(p0) U p1))))))'
Support contains 1 out of 1600 places. Attempting structural reductions.
Property had overlarge support with respect to TGBA, discarding it for now.
Starting structural reductions in SI_LTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Graph (trivial) has 12282 edges and 1600 vertex of which 1597 / 1600 are part of one of the 1 SCC in 8 ms
Free SCC test removed 1596 places
Ensure Unique test removed 12317 transitions
Reduce isomorphic transitions removed 12317 transitions.
Applied a total of 1 rules in 16 ms. Remains 4 /1600 variables (removed 1596) and now considering 7/12324 (removed 12317) transitions.
// Phase 1: matrix 7 rows 4 cols
[2024-05-31 21:13:27] [INFO ] Computed 1 invariants in 0 ms
[2024-05-31 21:13:27] [INFO ] Implicit Places using invariants in 14 ms returned []
[2024-05-31 21:13:27] [INFO ] Invariant cache hit.
[2024-05-31 21:13:27] [INFO ] Implicit Places using invariants and state equation in 16 ms returned []
Implicit Place search using SMT with State Equation took 33 ms to find 0 implicit places.
[2024-05-31 21:13:27] [INFO ] Redundant transitions in 0 ms returned []
Running 3 sub problems to find dead transitions.
[2024-05-31 21:13:27] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/3 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 1 (OVERLAPS) 1/4 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/4 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 3 (OVERLAPS) 6/10 variables, 4/5 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/10 variables, 0/5 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 5 (OVERLAPS) 0/10 variables, 0/5 constraints. Problems are: Problem set: 0 solved, 3 unsolved
No progress, stopping.
After SMT solving in domain Real declared 10/11 variables, and 5 constraints, problems are : Problem set: 0 solved, 3 unsolved in 24 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, State Equation: 4/4 constraints, PredecessorRefiner: 3/3 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 3 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/3 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 1 (OVERLAPS) 1/4 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/4 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 3 (OVERLAPS) 6/10 variables, 4/5 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/10 variables, 3/8 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/10 variables, 0/8 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 6 (OVERLAPS) 0/10 variables, 0/8 constraints. Problems are: Problem set: 0 solved, 3 unsolved
No progress, stopping.
After SMT solving in domain Int declared 10/11 variables, and 8 constraints, problems are : Problem set: 0 solved, 3 unsolved in 25 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, State Equation: 4/4 constraints, PredecessorRefiner: 3/3 constraints, Known Traps: 0/0 constraints]
After SMT, in 50ms problems are : Problem set: 0 solved, 3 unsolved
Search for dead transitions found 0 dead transitions in 51ms
Starting structural reductions in SI_LTL mode, iteration 1 : 4/1600 places, 7/12324 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 103 ms. Remains : 4/1600 places, 7/12324 transitions.
Stuttering acceptance computed with spot in 136 ms :[(NOT p1), (NOT p1)]
Running random walk in product with property : Diffusion2D-PT-D40N050-LTLCardinality-06
Stuttering criterion allowed to conclude after 0 steps with 0 reset in 0 ms.
FORMULA Diffusion2D-PT-D40N050-LTLCardinality-06 FALSE TECHNIQUES STUTTER_TEST
Treatment of property Diffusion2D-PT-D40N050-LTLCardinality-06 finished in 262 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G(F(p0)))'
Support contains 1 out of 1600 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Graph (trivial) has 12314 edges and 1600 vertex of which 1599 / 1600 are part of one of the 1 SCC in 10 ms
Free SCC test removed 1598 places
Ensure Unique test removed 12321 transitions
Reduce isomorphic transitions removed 12321 transitions.
Applied a total of 1 rules in 19 ms. Remains 2 /1600 variables (removed 1598) and now considering 3/12324 (removed 12321) transitions.
// Phase 1: matrix 3 rows 2 cols
[2024-05-31 21:13:27] [INFO ] Computed 1 invariants in 0 ms
[2024-05-31 21:13:27] [INFO ] Implicit Places using invariants in 13 ms returned []
[2024-05-31 21:13:27] [INFO ] Invariant cache hit.
[2024-05-31 21:13:27] [INFO ] Implicit Places using invariants and state equation in 13 ms returned []
Implicit Place search using SMT with State Equation took 28 ms to find 0 implicit places.
[2024-05-31 21:13:27] [INFO ] Redundant transitions in 0 ms returned []
Running 1 sub problems to find dead transitions.
[2024-05-31 21:13:27] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/1 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 1 (OVERLAPS) 1/2 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/2 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 3 (OVERLAPS) 2/4 variables, 2/3 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/4 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 5 (OVERLAPS) 0/4 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 1 unsolved
No progress, stopping.
After SMT solving in domain Real declared 4/5 variables, and 3 constraints, problems are : Problem set: 0 solved, 1 unsolved in 19 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, State Equation: 2/2 constraints, PredecessorRefiner: 1/1 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 1 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/1 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 1 (OVERLAPS) 1/2 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/2 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 3 (OVERLAPS) 2/4 variables, 2/3 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/4 variables, 1/4 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/4 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 6 (OVERLAPS) 0/4 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 1 unsolved
No progress, stopping.
After SMT solving in domain Int declared 4/5 variables, and 4 constraints, problems are : Problem set: 0 solved, 1 unsolved in 18 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, State Equation: 2/2 constraints, PredecessorRefiner: 1/1 constraints, Known Traps: 0/0 constraints]
After SMT, in 38ms problems are : Problem set: 0 solved, 1 unsolved
Search for dead transitions found 0 dead transitions in 38ms
Starting structural reductions in SI_LTL mode, iteration 1 : 2/1600 places, 3/12324 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 91 ms. Remains : 2/1600 places, 3/12324 transitions.
Stuttering acceptance computed with spot in 58 ms :[(NOT p0), (NOT p0)]
Running random walk in product with property : Diffusion2D-PT-D40N050-LTLCardinality-07
Stuttering criterion allowed to conclude after 4 steps with 0 reset in 0 ms.
FORMULA Diffusion2D-PT-D40N050-LTLCardinality-07 FALSE TECHNIQUES STUTTER_TEST
Treatment of property Diffusion2D-PT-D40N050-LTLCardinality-07 finished in 168 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X((p0 U G((p1&&F(G(p1)))))))'
Support contains 3 out of 1600 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Applied a total of 0 rules in 142 ms. Remains 1600 /1600 variables (removed 0) and now considering 12324/12324 (removed 0) transitions.
// Phase 1: matrix 12324 rows 1600 cols
[2024-05-31 21:13:27] [INFO ] Computed 1 invariants in 62 ms
[2024-05-31 21:13:27] [INFO ] Implicit Places using invariants in 219 ms returned []
Implicit Place search using SMT only with invariants took 231 ms to find 0 implicit places.
Running 12316 sub problems to find dead transitions.
[2024-05-31 21:13:28] [INFO ] Invariant cache hit.
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 1599/13924 variables, and 0 constraints, problems are : Problem set: 0 solved, 12316 unsolved in 30130 ms.
Refiners :[Positive P Invariants (semi-flows): 0/1 constraints, State Equation: 0/1600 constraints, PredecessorRefiner: 12316/12316 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 12316 unsolved
Error getting values : (error "Error writing to Z3 solver: java.io.IOException: Broken pipe")
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 1599/13924 variables, and 0 constraints, problems are : Problem set: 0 solved, 12316 unsolved in 30125 ms.
Refiners :[Positive P Invariants (semi-flows): 0/1 constraints, State Equation: 0/1600 constraints, PredecessorRefiner: 0/12316 constraints, Known Traps: 0/0 constraints]
After SMT, in 75488ms problems are : Problem set: 0 solved, 12316 unsolved
Search for dead transitions found 0 dead transitions in 75579ms
Finished structural reductions in LTL mode , in 1 iterations and 75967 ms. Remains : 1600/1600 places, 12324/12324 transitions.
Stuttering acceptance computed with spot in 126 ms :[(NOT p1), (NOT p1), true, (NOT p1)]
Running random walk in product with property : Diffusion2D-PT-D40N050-LTLCardinality-09
Entered a terminal (fully accepting) state of product in 265 steps with 0 reset in 6 ms.
FORMULA Diffusion2D-PT-D40N050-LTLCardinality-09 FALSE TECHNIQUES STUTTER_TEST
Treatment of property Diffusion2D-PT-D40N050-LTLCardinality-09 finished in 76128 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G((X(G(p0))||F((!p0&&X((p1 U (p2||G(p1)))))))))'
Support contains 3 out of 1600 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Applied a total of 0 rules in 151 ms. Remains 1600 /1600 variables (removed 0) and now considering 12324/12324 (removed 0) transitions.
[2024-05-31 21:14:43] [INFO ] Invariant cache hit.
[2024-05-31 21:14:43] [INFO ] Implicit Places using invariants in 168 ms returned []
Implicit Place search using SMT only with invariants took 168 ms to find 0 implicit places.
Running 12316 sub problems to find dead transitions.
[2024-05-31 21:14:44] [INFO ] Invariant cache hit.
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 1599/13924 variables, and 0 constraints, problems are : Problem set: 0 solved, 12316 unsolved in 30130 ms.
Refiners :[Positive P Invariants (semi-flows): 0/1 constraints, State Equation: 0/1600 constraints, PredecessorRefiner: 12316/12316 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 12316 unsolved
Error getting values : (error "Error writing to Z3 solver: java.io.IOException: Broken pipe")
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 1599/13924 variables, and 0 constraints, problems are : Problem set: 0 solved, 12316 unsolved in 30139 ms.
Refiners :[Positive P Invariants (semi-flows): 0/1 constraints, State Equation: 0/1600 constraints, PredecessorRefiner: 0/12316 constraints, Known Traps: 0/0 constraints]
After SMT, in 75272ms problems are : Problem set: 0 solved, 12316 unsolved
Search for dead transitions found 0 dead transitions in 75364ms
Finished structural reductions in LTL mode , in 1 iterations and 75699 ms. Remains : 1600/1600 places, 12324/12324 transitions.
Stuttering acceptance computed with spot in 284 ms :[(AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p1) (NOT p2)), (OR p0 (AND (NOT p1) (NOT p2)))]
Running random walk in product with property : Diffusion2D-PT-D40N050-LTLCardinality-10
Product exploration explored 100000 steps with 33279 reset in 946 ms.
Product exploration explored 100000 steps with 33329 reset in 992 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p0) p2 p1), (X p2), (X (NOT (AND p0 (NOT p2) p1))), (X (NOT (AND (NOT p0) (NOT p2)))), (X (NOT p0)), (X p1), (X (X p2)), (X (X (NOT (AND p0 (NOT p2) p1)))), (X (X (NOT (AND (NOT p2) p1)))), (X (X (NOT (AND (NOT p0) (NOT p2) (NOT p1))))), (X (X (NOT (AND p0 (NOT p2) (NOT p1))))), (X (X (NOT (AND (NOT p0) (NOT p2))))), (X (X (NOT p0))), (X (X p1))]
False Knowledge obtained : []
Knowledge based reduction with 14 factoid took 132 ms. Reduced automaton from 5 states, 11 edges and 3 AP (stutter sensitive) to 5 states, 11 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 207 ms :[(AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p1) (NOT p2)), (OR p0 (AND (NOT p1) (NOT p2)))]
RANDOM walk for 40023 steps (8 resets) in 84 ms. (470 steps per ms) remains 3/8 properties
BEST_FIRST walk for 40004 steps (8 resets) in 297 ms. (134 steps per ms) remains 3/3 properties
BEST_FIRST walk for 40004 steps (8 resets) in 80 ms. (493 steps per ms) remains 3/3 properties
BEST_FIRST walk for 40004 steps (8 resets) in 93 ms. (425 steps per ms) remains 3/3 properties
[2024-05-31 21:16:02] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/3 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 1 (OVERLAPS) 1597/1600 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/1600 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 3 (OVERLAPS) 12324/13924 variables, 1600/1601 constraints. Problems are: Problem set: 0 solved, 3 unsolved
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 13924/13924 variables, and 1601 constraints, problems are : Problem set: 0 solved, 3 unsolved in 5019 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, State Equation: 1600/1600 constraints, PredecessorRefiner: 3/3 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 3 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/3 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 1 (OVERLAPS) 1597/1600 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/1600 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 3 (OVERLAPS) 12324/13924 variables, 1600/1601 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/13924 variables, 3/1604 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/13924 variables, 0/1604 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 6 (OVERLAPS) 0/13924 variables, 0/1604 constraints. Problems are: Problem set: 0 solved, 3 unsolved
No progress, stopping.
After SMT solving in domain Int declared 13924/13924 variables, and 1604 constraints, problems are : Problem set: 0 solved, 3 unsolved in 4865 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, State Equation: 1600/1600 constraints, PredecessorRefiner: 3/3 constraints, Known Traps: 0/0 constraints]
After SMT, in 9923ms problems are : Problem set: 0 solved, 3 unsolved
Finished Parikh walk after 15932 steps, including 0 resets, run visited all 3 properties in 367 ms. (steps per millisecond=43 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Parikh walk visited 3 properties in 382 ms.
Knowledge obtained : [(AND (NOT p0) p2 p1), (X p2), (X (NOT (AND p0 (NOT p2) p1))), (X (NOT (AND (NOT p0) (NOT p2)))), (X (NOT p0)), (X p1), (X (X p2)), (X (X (NOT (AND p0 (NOT p2) p1)))), (X (X (NOT (AND (NOT p2) p1)))), (X (X (NOT (AND (NOT p0) (NOT p2) (NOT p1))))), (X (X (NOT (AND p0 (NOT p2) (NOT p1))))), (X (X (NOT (AND (NOT p0) (NOT p2))))), (X (X (NOT p0))), (X (X p1))]
False Knowledge obtained : [(F (NOT (OR p2 p0 p1))), (F (NOT (OR p2 (NOT p0) (NOT p1)))), (F (NOT p1)), (F p0), (F (NOT p2)), (F (NOT (OR p2 (NOT p0) p1))), (F (NOT (OR p2 (NOT p1)))), (F (NOT (OR p2 p0)))]
Knowledge based reduction with 14 factoid took 412 ms. Reduced automaton from 5 states, 11 edges and 3 AP (stutter sensitive) to 5 states, 11 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 194 ms :[(AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p1) (NOT p2)), (OR p0 (AND (NOT p1) (NOT p2)))]
Stuttering acceptance computed with spot in 326 ms :[(AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p1) (NOT p2)), (OR p0 (AND (NOT p1) (NOT p2)))]
Support contains 3 out of 1600 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Applied a total of 0 rules in 146 ms. Remains 1600 /1600 variables (removed 0) and now considering 12324/12324 (removed 0) transitions.
[2024-05-31 21:16:13] [INFO ] Invariant cache hit.
[2024-05-31 21:16:13] [INFO ] Implicit Places using invariants in 176 ms returned []
Implicit Place search using SMT only with invariants took 178 ms to find 0 implicit places.
Running 12316 sub problems to find dead transitions.
[2024-05-31 21:16:13] [INFO ] Invariant cache hit.
Error getting values : (error "ParserException while parsing response: (timeout
org.smtlib.IParser$ParserException: Unbalanced parentheses at end of input")
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 1599/13924 variables, and 0 constraints, problems are : Problem set: 0 solved, 12316 unsolved in 30133 ms.
Refiners :[Positive P Invariants (semi-flows): 0/1 constraints, State Equation: 0/1600 constraints, PredecessorRefiner: 12316/12316 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 12316 unsolved
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 1599/13924 variables, and 0 constraints, problems are : Problem set: 0 solved, 12316 unsolved in 30133 ms.
Refiners :[Positive P Invariants (semi-flows): 0/1 constraints, State Equation: 0/1600 constraints, PredecessorRefiner: 0/12316 constraints, Known Traps: 0/0 constraints]
After SMT, in 77198ms problems are : Problem set: 0 solved, 12316 unsolved
Search for dead transitions found 0 dead transitions in 77289ms
Finished structural reductions in LTL mode , in 1 iterations and 77647 ms. Remains : 1600/1600 places, 12324/12324 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p0) p2 p1), (X p2), (X (NOT (AND (NOT p2) p0 p1))), (X (NOT p0)), (X p1), (X (NOT (AND (NOT p2) (NOT p0)))), (X (X p2)), (X (X (NOT (AND (NOT p2) p1)))), (X (X (NOT (AND (NOT p2) p0 (NOT p1))))), (X (X (NOT (AND (NOT p2) p0 p1)))), (X (X (NOT (AND (NOT p2) (NOT p0) (NOT p1))))), (X (X (NOT p0))), (X (X p1)), (X (X (NOT (AND (NOT p2) (NOT p0)))))]
False Knowledge obtained : []
Knowledge based reduction with 14 factoid took 134 ms. Reduced automaton from 5 states, 11 edges and 3 AP (stutter sensitive) to 5 states, 11 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 187 ms :[(AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p1) (NOT p2)), (OR p0 (AND (NOT p1) (NOT p2)))]
RANDOM walk for 40061 steps (8 resets) in 44 ms. (890 steps per ms) remains 4/8 properties
BEST_FIRST walk for 40004 steps (8 resets) in 47 ms. (833 steps per ms) remains 4/4 properties
BEST_FIRST walk for 40004 steps (8 resets) in 36 ms. (1081 steps per ms) remains 4/4 properties
BEST_FIRST walk for 40004 steps (8 resets) in 40 ms. (975 steps per ms) remains 4/4 properties
BEST_FIRST walk for 40004 steps (8 resets) in 96 ms. (412 steps per ms) remains 4/4 properties
[2024-05-31 21:17:31] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/3 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 1 (OVERLAPS) 1597/1600 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/1600 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 3 (OVERLAPS) 12324/13924 variables, 1600/1601 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/13924 variables, 0/1601 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 5 (OVERLAPS) 0/13924 variables, 0/1601 constraints. Problems are: Problem set: 0 solved, 4 unsolved
No progress, stopping.
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(t595 0.0)
(t596 0.0)
(t597 0.0)
(t598 0.0)
(t599 0.0)
(t600 0.0)
(t601 0.0)
(t602 2.0)
(t603 0.0)
(t604 0.0)
(t605 0.0)
(t606 0.0)
(t607 0.0)
(t608 0.0)
(t609 0.0)
(t610 0.0)
(t611 0.0)
(t612 0.0)
(t613 0.0)
(t614 0.0)
(t615 0.0)
(t616 0.0)
(t617 0.0)
(t618 0.0)
(t619 0.0)
(t620 0.0)
(t621 0.0)
(t622 0.0)
(t623 0.0)
(t624 0.0)
(t625 0.0)
(t626 0.0)
(t627 0.0)
(t628 0.0)
(t629 0.0)
(t630 0.0)
(t631 0.0)
(t632 0.0)
(t633 2.0)
(t634 0.0)
(t635 0.0)
(t636 0.0)
(t637 0.0)
(t638 0.0)
(t639 0.0)
(t640 (/ 91.0 2.0))
(t641 0.0)
(t642 0.0)
(t643 0.0)
(t644 0.0)
(t645 0.0)
(t646 0.0)
(t647 0.0)
(t648 0.0)
(t649 0.0)
(t650 (/ 91.0 2.0))
(t651 0.0)
(t652 0.0)
(t653 (/ 91.0 2.0))
(t654 0.0)
(t655 0.0)
(t656 0.0)
(t657 0.0)
(t658 0.0)
(t659 0.0)
(t660 0.0)
(t661 0.0)
(t662 0.0)
(t663 0.0)
(t664 0.0)
(t665 0.0)
(t666 0.0)
(t667 0.0)
(t668 0.0)
(t669 0.0)
(t670 0.0)
(t671 0.0)
(t672 0.0)
(t673 0.0)
(t674 0.0)
(t675 (/ 91.0 2.0))
(t676 0.0)
(t677 0.0)
(t678 0.0)
(t679 (/ 91.0 2.0))
(t680 0.0)
(t681 0.0)
(t682 0.0)
(t683 0.0)
(t684 0.0)
(t685 (/ 95.0 2.0))
(t686 0.0)
(t687 0.0)
(t688 0.0)
(t689 0.0)
(t690 0.0)
(t691 0.0)
(t692 0.0)
(t693 0.0)
(t694 0.0)
(t695 (/ 95.0 2.0))
(t696 0.0)
(t697 0.0)
(t698 0.0)
(t699 0.0)
(t700 0.0)
(t701 0.0)
(t702 0.0)
(t703 0.0)
(t704 0.0)
(t705 (/ 95.0 2.0))
(t706 0.0)
(t707 0.0)
(t708 0.0)
(t709 0.0)
(t710 0.0)
(t711 0.0)
(t712 0.0)
(t713 (/ 95.0 2.0))
(t714 0.0)
(t715 0.0)
(t716 0.0)
(t717 0.0)
(t718 0.0)
(t719 0.0)
(t720 0.0)
(t721 0.0)
(t722 0.0)
(t723 0.0)
(t724 0.0)
(t725 0.0)
(t726 (/ 95.0 2.0))
(t727 0.0)
(t728 0.0)
(t729 0.0)
(t730 (/ 99.0 2.0))
(t731 0.0)
(t732 0.0)
(t733 0.0)
(t734 0.0)
(t735 0.0)
(t736 0.0)
(t737 0.0)
(t738 0.0)
(t739 (/ 95.0 2.0))
(t740 0.0)
(t741 0.0)
(t742 0.0)
(t743 0.0)
(t744 0.0)
(t745 (/ 99.0 2.0))
(t746 0.0)
(t747 0.0)
(t748 0.0)
(t749 0.0)
(t750 0.0)
(t751 0.0)
(t752 0.0)
(t753 0.0)
(t754 0.0)
(t755 (/ 99.0 2.0))
(t756 0.0)
(t757 0.0)
(t758 0.0)
(t759 0.0)
(t760 0.0)
(t761 0.0)
(t762 0.0)
(t763 0.0)
(t764 0.0)
(t765 2.0)
(t766 0.0)
(t767 0.0)
(t768 0.0)
(t769 0.0)
(t770 2.0)
(t771 0.0)
(t772 0.0)
(t773 0.0)
(t774 0.0)
(t775 0.0)
(t776 0.0)
(t777 0.0)
(t778 0.0)
(t779 0.0)
(t780 0.0)
(t781 0.0)
(t782 2.0)
(t783 0.0)
(t784 0.0)
(t785 0.0)
(t786 0.0)
(t787 0.0)
(t788 0.0)
(t789 0.0)
(t790 2.0)
(t791 0.0)
(t792 0.0)
(t793 0.0)
(t794 0.0)
(t795 0.0)
(t796 0.0)
(t797 0.0)
(t798 0.0)
(t799 0.0)
(t800 0.0)
(t801 0.0)
(t802 0.0)
(t803 0.0)
(t804 2.0)
(t805 0.0)
(t806 0.0)
(t807 0.0)
(t808 0.0)
(t809 0.0)
(t810 0.0)
(t811 0.0)
(t812 0.0)
(t813 0.0)
(t814 2.0)
(t815 0.0)
(t816 0.0)
(t817 0.0)
(t818 0.0)
(t819 0.0)
(t820 0.0)
(t821 2.0)
(t822 0.0)
(t823 0.0)
(t824 0.0)
(t825 0.0)
(t826 2.0)
(t827 0.0)
(t828 0.0)
(t829 0.0)
(t830 0.0)
(t831 0.0)
(t832 0.0)
(t833 0.0)
(t834 0.0)
(t835 0.0)
(t836 0.0)
(t837 0.0)
(t838 0.0)
(t839 0.0)
(t840 0.0)
(t841 0.0)
(t842 0.0)
(t843 0.0)
(t844 0.0)
(t845 0.0)
(t846 0.0)
(t847 0.0)
(t848 0.0)
(t849 0.0)
(t850 0.0)
(t851 2.0)
(t852 0.0)
(t853 0.0)
(t854 0.0)
(t855 0.0)
(t856 0.0)
(t857 0.0)
(t858 0.0)
(t859 0.0)
(t860 0.0)
(t861 0.0)
(t862 2.0)
(t863 0.0)
(t864 0.0)
(t865 0.0)
(t866 2.0)
(t867 0.0)
(t868 0.0)
(t869 0.0)
(t870 0.0)
(t871 0.0)
(t872 0.0)
(t873 0.0)
(t874 0.0)
(t875 0.0)
(t876 0.0)
(t877 0.0)
(t878 0.0)
(t879 0.0)
(t880 2.0)
(t881 0.0)
(t882 0.0)
(t883 0.0)
(t884 0.0)
(t885 0.0)
(t886 0.0)
(t887 0.0)
(t888 0.0)
(t889 0.0)
(t890 0.0)
(t891 0.0)
(t892 2.0)
(t893 0.0)
(t894 0.0)
(t895 0.0)
(t896 0.0)
(t897 0.0)
(t898 0.0)
(t899 0.0)
(t900 0.0)
(t901 0.0)
(t902 0.0)
(t903 0.0)
(t904 0.0)
(t905 0.0)
(t906 0.0)
(t907 0.0)
(t908 0.0)
(t909 0.0)
(t910 0.0)
(t911 0.0)
(t912 0.0)
(t913 0.0)
(t914 0.0)
(t915 0.0)
(t916 0.0)
(t917 2.0)
(t918 0.0)
(t919 0.0)
(t920 0.0)
(t921 0.0)
(t922 0.0)
(t923 0.0)
(t924 0.0)
(t925 0.0)
(t926 0.0)
(t927 0.0)
(t928 0.0)
(t929 0.0)
(t930 0.0)
(t931 0.0)
(t932 2.0)
(t933 0.0)
(t934 0.0)
(t935 0.0)
(t936 0.0)
(t937 0.0)
(t938 0.0)
(t939 0.0)
(t940 0.0)
(t941 0.0)
(t942 0.0)
(t943 0.0)
(t944 0.0)
(t945 0.0)
(t946 0.0)
(t947 0.0)
(t948 0.0)
(t949 2.0)
(t950 0.0)
(t951 0.0)
(t952 0.0)
(t953 0.0)
(t954 0.0)
(t955 0.0)
(t956 0.0)
(t957 0.0)
(t958 0.0)
(t959 0.0)
(t960 0.0)
(t961 0.0)
(t962 (/ 91.0 2.0))
(t963 0.0)
(t964 0.0)
(t965 0.0)
(t966 0.0)
(t967 0.0)
(t968 0.0)
(t969 0.0)
(t970 0.0)
(t971 0.0)
(t972 (/ 91.0 2.0))
(t973 0.0)
(t974 (/ 91.0 2.0))
(t975 0.0)
(t976 0.0)
(t977 0.0)
(t978 0.0)
(t979 0.0)
(t980 0.0)
(t981 0.0)
(t982 0.0)
(t983 0.0)
(t984 0.0)
(t985 (/ 91.0 2.0))
(t986 0.0)
(t987 0.0)
(t988 0.0)
(t989 0.0)
(t990 0.0)
(t991 0.0)
(t992 0.0)
(t993 (/ 91.0 2.0))
(t994 0.0)
(t995 0.0)
(t996 0.0)
(t997 0.0)
(t998 0.0)
(t999 0.0)
(t1000 0.0)
(t1001 0.0)
(t1002 0.0)
(t1003 0.0)
(t1004 0.0)
(t1005 0.0)
(t1006 0.0)
(t1007 0.0)
(t1008 0.0)
(t1009 0.0)
(t1010 0.0)
(t1011 0.0)
(t1012 (/ 95.0 2.0))
(t1013 0.0)
(t1014 0.0)
(t1015 0.0)
(t1016 0.0)
(t1017 0.0)
(t1018 0.0)
(t1019 0.0)
(t1020 0.0)
(t1021 0.0)
(t1022 0.0)
(t1023 0.0)
(t1024 0.0)
(t1025 0.0)
(t1026 0.0)
(t1027 0.0)
(t1028 0.0)
(t1029 0.0)
(t1030 0.0)
(t1031 (/ 95.0 2.0))
(t1032 0.0)
(t1033 0.0)
(t1034 0.0)
(t1035 (/ 95.0 2.0))
(t1036 0.0)
(t1037 0.0)
(t1038 0.0)
(t1039 0.0)
(t1040 0.0)
(t1041 0.0)
(t1042 0.0)
(t1043 0.0)
(t1044 0.0)
(t1045 0.0)
(t1046 0.0)
(t1047 0.0)
(t1048 0.0)
(t1049 (/ 95.0 2.0))
(t1050 0.0)
(t1051 0.0)
(t1052 (/ 95.0 2.0))
(t1053 0.0)
(t1054 0.0)
(t1055 0.0)
(t1056 0.0)
(t1057 0.0)
(t1058 0.0)
(t1059 0.0)
(t1060 0.0)
(t1061 0.0)
(t1062 0.0)
(t1063 0.0)
(t1064 0.0)
(t1065 (/ 95.0 2.0))
(t1066 0.0)
(t1067 0.0)
(t1068 0.0)
(t1069 0.0)
(t1070 0.0)
(t1071 0.0)
(t1072 0.0)
(t1073 0.0)
(t1074 0.0)
(t1075 (/ 99.0 2.0))
(t1076 0.0)
(t1077 0.0)
(t1078 0.0)
(t1079 0.0)
(t1080 0.0)
(t1081 0.0)
(t1082 0.0)
(t1083 2.0)
(t1084 0.0)
(t1085 0.0)
(t1086 0.0)
(t1087 0.0)
(t1088 0.0)
(t1089 0.0)
(t1090 0.0)
(t1091 0.0)
(t1092 0.0)
(t1093 0.0)
(t1094 0.0)
(t1095 0.0)
(t1096 0.0)
(t1097 0.0)
(t1098 0.0)
(t1099 2.0)
(t1100 0.0)
(t1101 0.0)
(t1102 0.0)
(t1103 0.0)
(t1104 0.0)
(t1105 0.0)
(t1106 0.0)
(t1107 0.0)
(t1108 0.0)
(t1109 0.0)
(t1110 0.0)
(t1111 0.0)
(t1112 0.0)
(t1113 0.0)
(t1114 0.0)
(t1115 0.0)
(t1116 0.0)
(t1117 0.0)
(t1118 0.0)
(t1119 2.0)
(t1120 0.0)
(t1121 0.0)
(t1122 0.0)
(t1123 2.0)
(t1124 0.0)
(t1125 0.0)
(t1126 0.0)
(t1127 0.0)
(t1128 0.0)
(t1129 0.0)
(t1130 0.0)
(t1131 0.0)
(t1132 0.0)
(t1133 0.0)
(t1134 0.0)
(t1135 0.0)
(t1136 0.0)
(t1137 0.0)
(t1138 0.0)
(t1139 2.0)
(t1140 0.0)
(t1141 0.0)
(t1142 0.0)
(t1143 0.0)
(t1144 0.0)
(t1145 0.0)
(t1146 0.0)
(t1147 0.0)
(t1148 0.0)
(t1149 0.0)
(t1150 0.0)
(t1151 0.0)
(t1152 0.0)
(t1153 0.0)
(t1154 0.0)
(t1155 0.0)
(t1156 0.0)
(t1157 0.0)
(t1158 0.0)
(t1159 0.0)
(t1160 0.0)
(t1161 0.0)
(t1162 0.0)
(t1163 0.0)
(t1164 0.0)
(t1165 0.0)
(t1166 0.0)
(t1167 0.0)
(t1168 2.0)
(t1169 0.0)
(t1170 0.0)
(t1171 2.0)
(t1172 0.0)
(t1173 0.0)
(t1174 0.0)
(t1175 0.0)
(t1176 0.0)
(t1177 0.0)
(t1178 0.0)
(t1179 0.0)
(t1180 0.0)
(t1181 0.0)
(t1182 0.0)
(t1183 0.0)
(t1184 0.0)
(t1185 0.0)
(t1186 0.0)
(t1187 2.0)
(t1188 0.0)
(t1189 0.0)
(t1190 0.0)
(t1191 0.0)
(t1192 0.0)
(t1193 0.0)
(t1194 0.0)
(t1195 0.0)
(t1196 0.0)
(t1197 0.0)
(t1198 0.0)
(t1199 0.0)
(t1200 0.0)
(t1201 0.0)
(t1202 0.0)
(t1203 0.0)
(t1204 0.0)
(t1205 0.0)
(t1206 0.0)
(t1207 2.0)
(t1208 0.0)
(t1209 0.0)
(t1210 0.0)
(t1211 0.0)
(t1212 0.0)
(t1213 0.0)
(t1214 0.0)
(t1215 0.0)
(t1216 0.0)
(t1217 0.0)
(t1218 0.0)
(t1219 0.0)
(t1220 0.0)
(t1221 0.0)
(t1222 0.0)
(t1223 0.0)
(t1224 0.0)
(t1225 0.0)
(t1226 0.0)
(t1227 0.0)
(t1228 0.0)
(t1229 0.0)
(t1230 0.0)
(t1231 0.0)
(t1232 0.0)
(t1233 0.0)
(t1234 2.0)
(t1235 0.0)
(t1236 0.0)
(t1237 0.0)
(t1238 0.0)
(t1239 0.0)
(t1240 0.0)
(t1241 0.0)
(t1242 0.0)
(t1243 0.0)
(t1244 2.0)
(t1245 0.0)
(t1246 0.0)
(t1247 0.0)
(t1248 2.0)
(t1249 0.0)
(t1250 0.0)
(t1251 0.0)
(t1252 0.0)
(t1253 0.0)
(t1254 0.0)
(t1255 0.0)
(t1256 0.0)
(t1257 0.0)
(t1258 0.0)
(t1259 0.0)
(t1260 0.0)
(t1261 0.0)
(t1262 0.0)
(t1263 0.0)
(t1264 0.0)
(t1265 0.0)
(t1266 0.0)
(t1267 0.0)
(t1268 0.0)
(t1269 0.0)
(t1270 0.0)
(t1271 0.0)
(t1272 0.0)
(t1273 0.0)
(t1274 0.0)
(t1275 0.0)
(t1276 0.0)
(t1277 (/ 91.0 2.0))
(t1278 0.0)
(t1279 0.0)
(t1280 0.0)
(t1281 0.0)
(t1282 0.0)
(t1283 0.0)
(t1284 (/ 91.0 2.0))
(t1285 0.0)
(t1286 0.0)
(t1287 0.0)
(t1288 0.0)
(t1289 0.0)
(t1290 0.0)
(t1291 0.0)
(t1292 0.0)
(t1293 (/ 91.0 2.0))
(t1294 0.0)
(t1295 0.0)
(t1296 0.0)
(t1297 0.0)
(t1298 0.0)
(t1299 0.0)
(t1300 0.0)
(t1301 0.0)
(t1302 0.0)
(t1303 0.0)
(t1304 0.0)
(t1305 0.0)
(t1306 0.0)
(t1307 0.0)
(t1308 0.0)
(t1309 0.0)
(t1310 0.0)
(t1311 0.0)
(t1312 0.0)
(t1313 0.0)
(t1314 0.0)
(t1315 0.0)
(t1316 0.0)
(t1317 0.0)
(t1318 0.0)
(t1319 0.0)
(t1320 0.0)
(t1321 0.0)
(t1322 0.0)
(t1323 0.0)
(t1324 0.0)
(t1325 0.0)
(t1326 0.0)
(t1327 (/ 95.0 2.0))
(t1328 0.0)
(t1329 0.0)
(t1330 0.0)
(t1331 0.0)
(t1332 0.0)
(t1333 0.0)
(t1334 0.0)
(t1335 0.0)
(t1336 0.0)
(t1337 0.0)
(t1338 0.0)
(t1339 0.0)
(t1340 0.0)
(t1341 0.0)
(t1342 0.0)
(t1343 0.0)
(t1344 0.0)
(t1345 0.0)
(t1346 0.0)
(t1347 (/ 95.0 2.0))
(t1348 0.0)
(t1349 0.0)
(t1350 0.0)
(t1351 (/ 95.0 2.0))
(t1352 0.0)
(t1353 0.0)
(t1354 0.0)
(t1355 0.0)
(t1356 0.0)
(t1357 0.0)
(t1358 0.0)
(t1359 0.0)
(t1360 0.0)
(t1361 (/ 95.0 2.0))
(t1362 0.0)
(t1363 0.0)
(t1364 0.0)
(t1365 0.0)
(t1366 0.0)
(t1367 (/ 95.0 2.0))
(t1368 0.0)
(t1369 0.0)
(t1370 0.0)
(t1371 0.0)
(t1372 0.0)
(t1373 (/ 95.0 2.0))
(t1374 0.0)
(t1375 0.0)
(t1376 0.0)
(t1377 0.0)
(t1378 0.0)
(t1379 0.0)
(t1380 0.0)
(t1381 0.0)
(t1382 0.0)
(t1383 0.0)
(t1384 0.0)
(t1385 0.0)
(t1386 0.0)
(t1387 0.0)
(t1388 0.0)
(t1389 0.0)
(t1390 (/ 99.0 2.0))
(t1391 0.0)
(t1392 0.0)
(t1393 0.0)
(t1394 0.0)
(t1395 0.0)
(t1396 0.0)
(t1397 0.0)
(t1398 0.0)
(t1399 0.0)
(t1400 (/ 99.0 2.0))
(t1401 0.0)
(t1402 0.0)
(t1403 0.0)
(t1404 0.0)
(t1405 0.0)
(t1406 0.0)
(t1407 0.0)
(t1408 (/ 99.0 2.0))
(t1409 0.0)
(t1410 0.0)
(t1411 0.0)
(t1412 0.0)
(t1413 0.0)
(t1414 0.0)
(t1415 0.0)
(t1416 (/ 99.0 2.0))
(t1417 0.0)
(t1418 0.0)
(t1419 0.0)
(t1420 0.0)
(t1421 0.0)
(t1422 0.0)
(t1423 0.0)
(t1424 0.0)
(t1425 0.0)
(t1426 0.0)
(t1427 0.0)
(t1428 0.0)
(t1429 2.0)
(t1430 0.0)
(t1431 0.0)
(t1432 0.0)
(t1433 0.0)
(t1434 0.0)
(t1435 0.0)
(t1436 0.0)
(t1437 0.0)
(t1438 0.0)
(t1439 0.0)
(t1440 2.0)
(t1441 0.0)
(t1442 0.0)
(t1443 0.0)
(t1444 0.0)
(t1445 0.0)
(t1446 0.0)
(t1447 0.0)
(t1448 0.0)
(t1449 0.0)
(t1450 2.0)
(t1451 0.0)
(t1452 0.0)
(t1453 0.0)
(t1454 0.0)
(t1455 0.0)
(t1456 2.0)
(t1457 0.0)
(t1458 0.0)
(t1459 0.0)
(t1460 0.0)
(t1461 2.0)
(t1462 0.0)
(t1463 0.0)
(t1464 0.0)
(t1465 0.0)
(t1466 0.0)
(t1467 0.0)
(t1468 0.0)
(t1469 0.0)
(t1470 0.0)
(t1471 0.0)
(t1472 0.0)
(t1473 0.0)
(t1474 2.0)
(t1475 0.0)
(t1476 0.0)
(t1477 0.0)
(t1478 0.0)
(t1479 0.0)
(t1480 0.0)
(t1481 0.0)
(t1482 0.0)
(t1483 0.0)
(t1484 0.0)
(t1485 0.0)
(t1486 2.0)
(t1487 0.0)
(t1488 0.0)
(t1489 0.0)
(t1490 0.0)
(t1491 0.0)
(t1492 0.0)
(t1493 0.0)
(t1494 0.0)
(t1495 0.0)
(t1496 0.0)
(t1497 0.0)
(t1498 0.0)
(t1499 0.0)
(t1500 0.0)
(t1501 0.0)
(t1502 0.0)
(t1503 0.0)
(t1504 0.0)
(t1505 0.0)
(t1506 0.0)
(t1507 2.0)
(t1508 0.0)
(t1509 0.0)
(t1510 0.0)
(t1511 0.0)
(t1512 0.0)
(t1513 0.0)
(t1514 0.0)
(t1515 0.0)
(t1516 0.0)
(t1517 0.0)
(t1518 0.0)
(t1519 2.0)
(t1520 0.0)
(t1521 0.0)
(t1522 0.0)
(t1523 0.0)
(t1524 0.0)
(t1525 0.0)
(t1526 0.0)
(t1527 0.0)
(t1528 0.0)
(t1529 0.0)
(t1530 0.0)
(t1531 0.0)
(t1532 0.0)
(t1533 0.0)
(t1534 0.0)
(t1535 0.0)
(t1536 0.0)
(t1537 0.0)
(t1538 0.0)
(t1539 0.0)
(t1540 0.0)
(t1541 0.0)
(t1542 0.0)
(t1543 0.0)
(t1544 0.0)
(t1545 0.0)
(t1546 0.0)
(t1547 0.0)
(t1548 0.0)
(t1549 0.0)
(t1550 0.0)
(t1551 0.0)
(t1552 0.0)
(t1553 2.0)
(t1554 0.0)
(t1555 0.0)
(t1556 0.0)
(t1557 2.0)
(t1558 0.0)
(t1559 0.0)
(t1560 0.0)
(t1561 0.0)
(t1562 0.0)
(t1563 0.0)
(t1564 0.0)
(t1565 0.0)
(t1566 0.0)
(t1567 0.0)
(t1568 0.0)
(t1569 2.0)
(t1570 0.0)
(t1571 0.0)
(t1572 0.0)
(t1573 0.0)
(t1574 0.0)
(t1575 0.0)
(t1576 0.0)
(t1577 0.0)
(t1578 0.0)
(t1579 0.0)
(t1580 0.0)
(t1581 0.0)
(t1582 0.0)
(t1583 0.0)
(t1584 0.0)
(t1585 (/ 91.0 2.0))
(t1586 0.0)
(t1587 0.0)
(t1588 0.0)
(t1589 0.0)
(t1590 0.0)
(t1591 0.0)
(t1592 0.0)
(t1593 0.0)
(t1594 (/ 91.0 2.0))
(t1595 0.0)
(t1596 0.0)
(t1597 0.0)
(t1598 0.0)
(t1599 0.0)
(t1600 0.0)
(t1601 0.0)
(t1602 0.0)
(t1603 0.0)
(t1604 0.0)
(t1605 0.0)
(t1606 0.0)
(t1607 0.0)
(t1608 0.0)
(t1609 0.0)
(t1610 0.0)
(t1611 0.0)
(t1612 0.0)
(t1613 0.0)
(t1614 0.0)
(t1615 0.0)
(t1616 0.0)
(t1617 0.0)
(t1618 0.0)
(t1619 0.0)
(t1620 0.0)
(t1621 0.0)
(t1622 0.0)
(t1623 0.0)
(t1624 0.0)
(t1625 0.0)
(t1626 0.0)
(t1627 0.0)
(t1628 0.0)
(t1629 0.0)
(t1630 0.0)
(t1631 0.0)
(t1632 0.0)
(t1633 0.0)
(t1634 0.0)
(t1635 0.0)
(t1636 0.0)
(t1637 0.0)
(t1638 0.0)
(t1639 0.0)
(t1640 0.0)
(t1641 0.0)
(t1642 0.0)
(t1643 0.0)
(t1644 (/ 95.0 2.0))
(t1645 0.0)
(t1646 0.0)
(t1647 0.0)
(t1648 0.0)
(t1649 0.0)
(t1650 0.0)
(t1651 0.0)
(t1652 0.0)
(t1653 0.0)
(t1654 0.0)
(t1655 0.0)
(t1656 0.0)
(t1657 0.0)
(t1658 0.0)
(t1659 (/ 95.0 2.0))
(t1660 0.0)
(t1661 0.0)
(t1662 0.0)
(t1663 0.0)
(t1664 0.0)
(t1665 0.0)
(t1666 0.0)
(t1667 0.0)
(t1668 0.0)
(t1669 0.0)
(t1670 (/ 95.0 2.0))
(t1671 (/ 95.0 2.0))
(t1672 0.0)
(t1673 0.0)
(t1674 0.0)
(t1675 0.0)
(t1676 0.0)
(t1677 0.0)
(t1678 0.0)
(t1679 0.0)
(t1680 0.0)
(t1681 0.0)
(t1682 0.0)
(t1683 0.0)
(t1684 0.0)
(t1685 0.0)
(t1686 0.0)
(t1687 0.0)
(t1688 0.0)
(t1689 0.0)
(t1690 0.0)
(t1691 0.0)
(t1692 0.0)
(t1693 0.0)
(t1694 0.0)
(t1695 0.0)
(t1696 0.0)
(t1697 0.0)
(t1698 0.0)
(t1699 0.0)
(t1700 0.0)
(t1701 0.0)
(t1702 0.0)
(t1703 0.0)
(t1704 0.0)
(t1705 0.0)
(t1706 0.0)
(t1707 0.0)
(t1708 0.0)
(t1709 0.0)
(t1710 0.0)
(t1711 0.0)
(t1712 0.0)
(t1713 0.0)
(t1714 0.0)
(t1715 0.0)
(t1716 0.0)
(t1717 0.0)
(t1718 0.0)
(t1719 0.0)
(t1720 0.0)
(t1721 0.0)
(t1722 0.0)
(t1723 0.0)
(t1724 0.0)
(t1725 0.0)
(t1726 (/ 99.0 2.0))
(t1727 0.0)
(t1728 0.0)
(t1729 0.0)
(t1730 0.0)
(t1731 (/ 99.0 2.0))
(t1732 0.0)
(t1733 0.0)
(t1734 0.0)
(t1735 0.0)
(t1736 0.0)
(t1737 0.0)
(t1738 0.0)
(t1739 0.0)
(t1740 0.0)
(t1741 0.0)
(t1742 0.0)
(t1743 (/ 99.0 2.0))
(t1744 0.0)
(t1745 0.0)
(t1746 0.0)
(t1747 0.0)
(t1748 0.0)
(t1749 0.0)
(t1750 0.0)
(t1751 0.0)
(t1752 2.0)
(t1753 0.0)
(t1754 0.0)
(t1755 0.0)
(t1756 0.0)
(t1757 0.0)
(t1758 0.0)
(t1759 0.0)
(t1760 0.0)
(t1761 0.0)
(t1762 0.0)
(t1763 0.0)
(t1764 0.0)
(t1765 0.0)
(t1766 0.0)
(t1767 0.0)
(t1768 2.0)
(t1769 0.0)
(t1770 0.0)
(t1771 0.0)
(t1772 0.0)
(t1773 0.0)
(t1774 0.0)
(t1775 0.0)
(t1776 0.0)
(t1777 0.0)
(t1778 2.0)
(t1779 0.0)
(t1780 0.0)
(t1781 0.0)
(t1782 0.0)
(t1783 2.0)
(t1784 0.0)
(t1785 0.0)
(t1786 0.0)
(t1787 0.0)
(t1788 0.0)
(t1789 0.0)
(t1790 0.0)
(t1791 0.0)
(t1792 0.0)
(t1793 0.0)
(t1794 0.0)
(t1795 2.0)
(t1796 0.0)
(t1797 0.0)
(t1798 0.0)
(t1799 0.0)
(t1800 0.0)
(t1801 0.0)
(t1802 0.0)
(t1803 2.0)
(t1804 0.0)
(t1805 0.0)
(t1806 0.0)
(t1807 2.0)
(t1808 0.0)
(t1809 0.0)
(t1810 0.0)
(t1811 0.0)
(t1812 0.0)
(t1813 0.0)
(t1814 0.0)
(t1815 0.0)
(t1816 0.0)
(t1817 0.0)
(t1818 0.0)
(t1819 0.0)
(t1820 2.0)
(t1821 0.0)
(t1822 0.0)
(t1823 0.0)
(t1824 0.0)
(t1825 0.0)
(t1826 0.0)
(t1827 0.0)
(t1828 0.0)
(t1829 0.0)
(t1830 0.0)
(t1831 0.0)
(t1832 0.0)
(t1833 0.0)
(t1834 0.0)
(t1835 0.0)
(t1836 0.0)
(t1837 0.0)
(t1838 0.0)
(t1839 0.0)
(t1840 0.0)
(t1841 0.0)
(t1842 0.0)
(t1843 0.0)
(t1844 0.0)
(t1845 0.0)
(t1846 0.0)
(t1847 0.0)
(t1848 0.0)
(t1849 0.0)
(t1850 0.0)
(t1851 0.0)
(t1852 0.0)
(t1853 0.0)
(t1854 0.0)
(t1855 0.0)
(t1856 0.0)
(t1857 0.0)
(t1858 0.0)
(t1859 0.0)
(t1860 0.0)
(t1861 0.0)
(t1862 0.0)
(t1863 0.0)
(t1864 0.0)
(t1865 0.0)
(t1866 0.0)
(t1867 0.0)
(t1868 0.0)
(t1869 0.0)
(t1870 0.0)
(t1871 0.0)
(t1872 0.0)
(t1873 2.0)
(t1874 0.0)
(t1875 0.0)
(t1876 0.0)
(t1877 2.0)
(t1878 0.0)
(t1879 0.0)
(t1880 0.0)
(t1881 0.0)
(t1882 0.0)
(t1883 0.0)
(t1884 0.0)
(t1885 0.0)
(t1886 0.0)
(t1887 2.0)
(t1888 0.0)
(t1889 0.0)
(t1890 0.0)
(t1891 0.0)
(t1892 0.0)
(t1893 0.0)
(t1894 0.0)
(t1895 0.0)
(t1896 0.0)
(t1897 0.0)
(t1898 2.0)
(t1899 0.0)
(t1900 0.0)
(t1901 0.0)
(t1902 0.0)
(t1903 0.0)
(t1904 (/ 91.0 2.0))
(t1905 0.0)
(t1906 0.0)
(t1907 0.0)
(t1908 0.0)
(t1909 0.0)
(t1910 0.0)
(t1911 0.0)
(t1912 (/ 91.0 2.0))
(t1913 0.0)
(t1914 0.0)
(t1915 0.0)
(t1916 0.0)
(t1917 0.0)
(t1918 0.0)
(t1919 0.0)
(t1920 0.0)
(t1921 (/ 91.0 2.0))
(t1922 0.0)
(t1923 0.0)
(t1924 0.0)
(t1925 0.0)
(t1926 0.0)
(t1927 0.0)
(t1928 0.0)
(t1929 0.0)
(t1930 0.0)
(t1931 0.0)
(t1932 0.0)
(t1933 0.0)
(t1934 0.0)
(t1935 0.0)
(t1936 0.0)
(t1937 0.0)
(t1938 0.0)
(t1939 0.0)
(t1940 0.0)
(t1941 0.0)
(t1942 0.0)
(t1943 0.0)
(t1944 0.0)
(t1945 0.0)
(t1946 0.0)
(t1947 0.0)
(t1948 0.0)
(t1949 0.0)
(t1950 0.0)
(t1951 0.0)
(t1952 0.0)
(t1953 0.0)
(t1954 0.0)
(t1955 0.0)
(t1956 0.0)
(t1957 0.0)
(t1958 0.0)
(t1959 0.0)
(t1960 0.0)
(t1961 0.0)
(t1962 0.0)
(t1963 0.0)
(t1964 0.0)
(t1965 0.0)
(t1966 0.0)
(t1967 0.0)
(t1968 0.0)
(t1969 0.0)
(t1970 0.0)
(t1971 0.0)
(t1972 0.0)
(t1973 0.0)
(t1974 0.0)
(t1975 0.0)
(t1976 0.0)
(t1977 0.0)
(t1978 0.0)
(t1979 0.0)
(t1980 0.0)
(t1981 0.0)
(t1982 0.0)
(t1983 0.0)
(t1984 (/ 91.0 2.0))
(t1985 0.0)
(t1986 (/ 95.0 2.0))
(t1987 0.0)
(t1988 0.0)
(t1989 0.0)
(t1990 0.0)
(t1991 0.0)
(t1992 0.0)
(t1993 0.0)
(t1994 0.0)
(t1995 0.0)
(t1996 0.0)
(t1997 0.0)
(t1998 0.0)
(t1999 0.0)
(t2000 0.0)
(t2001 0.0)
(t2002 0.0)
(t2003 0.0)
(t2004 0.0)
(t2005 0.0)
(t2006 0.0)
(t2007 0.0)
(t2008 0.0)
(t2009 0.0)
(t2010 0.0)
(t2011 0.0)
(t2012 0.0)
(t2013 0.0)
(t2014 0.0)
(t2015 0.0)
(t2016 0.0)
(t2017 0.0)
(t2018 0.0)
(t2019 0.0)
(t2020 0.0)
(t2021 0.0)
(t2022 0.0)
(t2023 0.0)
(t2024 0.0)
(t2025 0.0)
(t2026 0.0)
(t2027 0.0)
(t2028 0.0)
(t2029 0.0)
(t2030 0.0)
(t2031 0.0)
(t2032 0.0)
(t2033 0.0)
(t2034 (/ 99.0 2.0))
(t2035 0.0)
(t2036 0.0)
(t2037 0.0)
(t2038 0.0)
(t2039 0.0)
(t2040 0.0)
(t2041 0.0)
(t2042 (/ 99.0 2.0))
(t2043 0.0)
(t2044 0.0)
(t2045 0.0)
(t2046 0.0)
(t2047 0.0)
(t2048 0.0)
(t2049 0.0)
(t2050 0.0)
(t2051 0.0)
(t2052 0.0)
(t2053 0.0)
(t2054 0.0)
(t2055 0.0)
(t2056 0.0)
(t2057 0.0)
(t2058 0.0)
(t2059 0.0)
(t2060 0.0)
(t2061 0.0)
(t2062 0.0)
(t2063 0.0)
(t2064 0.0)
(t2065 0.0)
(t2066 0.0)
(t2067 0.0)
(t2068 0.0)
(t2069 (/ 99.0 2.0))
(t2070 0.0)
(t2071 0.0)
(t2072 0.0)
(t2073 0.0)
(t2074 0.0)
(t2075 0.0)
(t2076 0.0)
(t2077 (/ 99.0 2.0))
(t2078 0.0)
(t2079 0.0)
(t2080 0.0)
(t2081 0.0)
(t2082 0.0)
(t2083 0.0)
(t2084 0.0)
(t2085 0.0)
(t2086 0.0)
(t2087 (/ 99.0 2.0))
(t2088 0.0)
(t2089 0.0)
(t2090 0.0)
(t2091 0.0)
(t2092 0.0)
(t2093 0.0)
(t2094 0.0)
(t2095 0.0)
(t2096 0.0)
(t2097 0.0)
(t2098 2.0)
(t2099 0.0)
(t2100 0.0)
(t2101 0.0)
(t2102 0.0)
(t2103 0.0)
(t2104 0.0)
(t2105 0.0)
(t2106 0.0)
(t2107 0.0)
(t2108 2.0)
(t2109 0.0)
(t2110 0.0)
(t2111 0.0)
(t2112 0.0)
(t2113 2.0)
(t2114 0.0)
(t2115 0.0)
(t2116 0.0)
(t2117 0.0)
(t2118 0.0)
(t2119 0.0)
(t2120 0.0)
(t2121 0.0)
(t2122 0.0)
(t2123 0.0)
(t2124 2.0)
(t2125 0.0)
(t2126 0.0)
(t2127 0.0)
(t2128 0.0)
(t2129 0.0)
(t2130 0.0)
(t2131 0.0)
(t2132 0.0)
(t2133 0.0)
(t2134 2.0)
(t2135 0.0)
(t2136 0.0)
(t2137 0.0)
(t2138 0.0)
(t2139 0.0)
(t2140 0.0)
(t2141 0.0)
(t2142 0.0)
(t2143 0.0)
(t2144 0.0)
(t2145 0.0)
(t2146 0.0)
(t2147 0.0)
(t2148 0.0)
(t2149 0.0)
(t2150 0.0)
(t2151 0.0)
(t2152 0.0)
(t2153 0.0)
(t2154 0.0)
(t2155 0.0)
(t2156 0.0)
(t2157 0.0)
(t2158 0.0)
(t2159 0.0)
(t2160 0.0)
(t2161 0.0)
(t2162 0.0)
(t2163 0.0)
(t2164 0.0)
(t2165 0.0)
(t2166 0.0)
(t2167 0.0)
(t2168 0.0)
(t2169 0.0)
(t2170 0.0)
(t2171 0.0)
(t2172 0.0)
(t2173 0.0)
(t2174 0.0)
(t2175 0.0)
(t2176 0.0)
(t2177 0.0)
(t2178 0.0)
(t2179 0.0)
(t2180 0.0)
(t2181 2.0)
(t2182 0.0)
(t2183 0.0)
(t2184 0.0)
(t2185 0.0)
(t2186 0.0)
(t2187 0.0)
(t2188 0.0)
(t2189 0.0)
(t2190 0.0)
(t2191 0.0)
(t2192 0.0)
(t2193 0.0)
(t2194 0.0)
(t2195 2.0)
(t2196 0.0)
(t2197 0.0)
(t2198 2.0)
(t2199 0.0)
(t2200 0.0)
(t2201 0.0)
(t2202 0.0)
(t2203 0.0)
(t2204 0.0)
(t2205 0.0)
(t2206 0.0)
(t2207 0.0)
(t2208 0.0)
(t2209 0.0)
(t2210 2.0)
(t2211 0.0)
(t2212 0.0)
(t2213 0.0)
(t2214 0.0)
(t2215 0.0)
(t2216 0.0)
(t2217 0.0)
(t2218 0.0)
(t2219 2.0)
(t2220 0.0)
(t2221 0.0)
(t2222 0.0)
(t2223 0.0)
(t2224 0.0)
(t2225 0.0)
(t2226 0.0)
(t2227 (/ 91.0 2.0))
(t2228 0.0)
(t2229 0.0)
(t2230 0.0)
(t2231 0.0)
(t2232 0.0)
(t2233 0.0)
(t2234 0.0)
(t2235 0.0)
(t2236 0.0)
(t2237 0.0)
(t2238 0.0)
(t2239 0.0)
(t2240 0.0)
(t2241 0.0)
(t2242 (/ 91.0 2.0))
(t2243 0.0)
(t2244 0.0)
(t2245 0.0)
(t2246 0.0)
(t2247 0.0)
(t2248 0.0)
(t2249 0.0)
(t2250 (/ 91.0 2.0))
(t2251 0.0)
(t2252 0.0)
(t2253 0.0)
(t2254 0.0)
(t2255 0.0)
(t2256 0.0)
(t2257 0.0)
(t2258 0.0)
(t2259 0.0)
(t2260 0.0)
(t2261 (/ 91.0 2.0))
(t2262 0.0)
(t2263 0.0)
(t2264 0.0)
(t2265 0.0)
(t2266 0.0)
(t2267 0.0)
(t2268 0.0)
(t2269 0.0)
(t2270 0.0)
(t2271 0.0)
(t2272 0.0)
(t2273 0.0)
(t2274 (/ 91.0 2.0))
(t2275 0.0)
(t2276 0.0)
(t2277 0.0)
(t2278 0.0)
(t2279 0.0)
(t2280 0.0)
(t2281 0.0)
(t2282 0.0)
(t2283 0.0)
(t2284 0.0)
(t2285 0.0)
(t2286 0.0)
(t2287 (/ 91.0 2.0))
(t2288 0.0)
(t2289 0.0)
(t2290 0.0)
(t2291 0.0)
(t2292 (/ 91.0 2.0))
(t2293 0.0)
(t2294 0.0)
(t2295 0.0)
(t2296 0.0)
(t2297 0.0)
(t2298 0.0)
(t2299 0.0)
(t2300 0.0)
(t2301 0.0)
(t2302 0.0)
(t2303 0.0)
(t2304 0.0)
(t2305 (/ 91.0 2.0))
(t2306 0.0)
(t2307 0.0)
(t2308 0.0)
(t2309 0.0)
(t2310 0.0)
(t2311 0.0)
(t2312 0.0)
(t2313 0.0)
(t2314 0.0)
(t2315 0.0)
(t2316 0.0)
(t2317 0.0)
(t2318 0.0)
(t2319 0.0)
(t2320 0.0)
(t2321 0.0)
(t2322 0.0)
(t2323 0.0)
(t2324 0.0)
(t2325 0.0)
(t2326 0.0)
(t2327 0.0)
(t2328 0.0)
(t2329 0.0)
(t2330 0.0)
(t2331 0.0)
(t2332 0.0)
(t2333 0.0)
(t2334 0.0)
(t2335 0.0)
(t2336 0.0)
(t2337 0.0)
(t2338 0.0)
(t2339 0.0)
(t2340 0.0)
(t2341 0.0)
(t2342 0.0)
(t2343 0.0)
(t2344 0.0)
(t2345 0.0)
(t2346 0.0)
(t2347 0.0)
(t2348 (/ 99.0 2.0))
(t2349 0.0)
(t2350 0.0)
(t2351 0.0)
(t2352 0.0)
(t2353 0.0)
(t2354 0.0)
(t2355 0.0)
(t2356 0.0)
(t2357 0.0)
(t2358 (/ 99.0 2.0))
(t2359 0.0)
(t2360 0.0)
(t2361 0.0)
(t2362 0.0)
(t2363 0.0)
(t2364 0.0)
(t2365 0.0)
(t2366 0.0)
(t2367 0.0)
(t2368 0.0)
(t2369 0.0)
(t2370 0.0)
(t2371 0.0)
(t2372 0.0)
(t2373 50.0)
(t2374 0.0)
(t2375 0.0)
(t2376 0.0)
(t2377 0.0)
(t2378 0.0)
(t2379 0.0)
(t2380 0.0)
(t2381 0.0)
(t2382 0.0)
(t2383 50.0)
(t2384 0.0)
(t2385 0.0)
(t2386 0.0)
(t2387 0.0)
(t2388 0.0)
(t2389 0.0)
(t2390 0.0)
(t2391 0.0)
(t2392 50.0)
(t2393 0.0)
(t2394 0.0)
(t2395 0.0)
(t2396 0.0)
(t2397 0.0)
(t2398 0.0)
(t2399 (/ 99.0 2.0))
(t2400 0.0)
(t2401 0.0)
(t2402 0.0)
(t2403 0.0)
(t2404 0.0)
(t2405 0.0)
(t2406 0.0)
(t2407 0.0)
(t2408 (/ 99.0 2.0))
(t2409 0.0)
(t2410 0.0)
(t2411 0.0)
(t2412 0.0)
(t2413 0.0)
(t2414 0.0)
(t2415 0.0)
(t2416 0.0)
(t2417 0.0)
(t2418 0.0)
(t2419 0.0)
(t2420 0.0)
(t2421 0.0)
(t2422 0.0)
(t2423 0.0)
(t2424 0.0)
(t2425 2.0)
(t2426 0.0)
(t2427 2.0)
(t2428 0.0)
(t2429 0.0)
(t2430 0.0)
(t2431 0.0)
(t2432 0.0)
(t2433 0.0)
(t2434 0.0)
(t2435 0.0)
(t2436 0.0)
(t2437 0.0)
(t2438 0.0)
(t2439 0.0)
(t2440 0.0)
(t2441 0.0)
(t2442 2.0)
(t2443 0.0)
(t2444 2.0)
(t2445 0.0)
(t2446 0.0)
(t2447 0.0)
(t2448 0.0)
(t2449 0.0)
(t2450 0.0)
(t2451 0.0)
(t2452 0.0)
(t2453 0.0)
(t2454 0.0)
(t2455 0.0)
(t2456 0.0)
(t2457 0.0)
(t2458 0.0)
(t2459 0.0)
(t2460 0.0)
(t2461 0.0)
(t2462 0.0)
(t2463 0.0)
(t2464 0.0)
(t2465 0.0)
(t2466 0.0)
(t2467 0.0)
(t2468 0.0)
(t2469 0.0)
(t2470 0.0)
(t2471 0.0)
(t2472 0.0)
(t2473 0.0)
(t2474 0.0)
(t2475 0.0)
(t2476 0.0)
(t2477 0.0)
(t2478 0.0)
(t2479 0.0)
(t2480 0.0)
(t2481 0.0)
(t2482 0.0)
(t2483 0.0)
(t2484 0.0)
(t2485 0.0)
(t2486 0.0)
(t2487 0.0)
(t2488 0.0)
(t2489 0.0)
(t2490 0.0)
(t2491 0.0)
(t2492 0.0)
(t2493 0.0)
(t2494 0.0)
(t2495 0.0)
(t2496 0.0)
(t2497 0.0)
(t2498 2.0)
(t2499 0.0)
(t2500 0.0)
(t2501 0.0)
(t2502 0.0)
(t2503 0.0)
(t2504 0.0)
(t2505 0.0)
(t2506 0.0)
(t2507 0.0)
(t2508 0.0)
(t2509 0.0)
(t2510 0.0)
(t2511 0.0)
(t2512 0.0)
(t2513 0.0)
(t2514 0.0)
(t2515 0.0)
(t2516 0.0)
(t2517 0.0)
(t2518 0.0)
(t2519 0.0)
(t2520 0.0)
(t2521 0.0)
(t2522 0.0)
(t2523 0.0)
(t2524 0.0)
(t2525 0.0)
(t2526 2.0)
(t2527 0.0)
(t2528 0.0)
(t2529 0.0)
(t2530 0.0)
(t2531 0.0)
(t2532 0.0)
(t2533 0.0)
(t2534 0.0)
(t2535 (/ 91.0 2.0))
(t2536 0.0)
(t2537 0.0)
(t2538 0.0)
(t2539 0.0)
(t2540 0.0)
(t2541 0.0)
(t2542 0.0)
(t2543 (/ 91.0 2.0))
(t2544 0.0)
(t2545 0.0)
(t2546 0.0)
(t2547 0.0)
(t2548 0.0)
(t2549 0.0)
(t2550 0.0)
(t2551 0.0)
(t2552 0.0)
(t2553 (/ 91.0 2.0))
(t2554 0.0)
(t2555 0.0)
(t2556 0.0)
(t2557 0.0)
(t2558 0.0)
(t2559 0.0)
(t2560 0.0)
(t2561 0.0)
(t2562 0.0)
(t2563 (/ 91.0 2.0))
(t2564 0.0)
(t2565 0.0)
(t2566 0.0)
(t2567 0.0)
(t2568 0.0)
(t2569 0.0)
(t2570 0.0)
(t2571 0.0)
(t2572 0.0)
(t2573 0.0)
(t2574 0.0)
(t2575 (/ 91.0 2.0))
(t2576 0.0)
(t2577 0.0)
(t2578 0.0)
(t2579 (/ 91.0 2.0))
(t2580 0.0)
(t2581 0.0)
(t2582 0.0)
(t2583 0.0)
(t2584 0.0)
(t2585 (/ 91.0 2.0))
(t2586 0.0)
(t2587 0.0)
(t2588 0.0)
(t2589 0.0)
(t2590 0.0)
(t2591 0.0)
(t2592 0.0)
(t2593 0.0)
(t2594 0.0)
(t2595 0.0)
(t2596 0.0)
(t2597 0.0)
(t2598 0.0)
(t2599 0.0)
(t2600 0.0)
(t2601 0.0)
(t2602 0.0)
(t2603 0.0)
(t2604 0.0)
(t2605 0.0)
(t2606 0.0)
(t2607 0.0)
(t2608 0.0)
(t2609 0.0)
(t2610 0.0)
(t2611 0.0)
(t2612 0.0)
(t2613 0.0)
(t2614 0.0)
(t2615 0.0)
(t2616 0.0)
(t2617 0.0)
(t2618 (/ 91.0 2.0))
(t2619 0.0)
(t2620 0.0)
(t2621 0.0)
(t2622 0.0)
(t2623 0.0)
(t2624 0.0)
(t2625 0.0)
(t2626 0.0)
(t2627 0.0)
(t2628 0.0)
(t2629 0.0)
(t2630 0.0)
(t2631 0.0)
(t2632 0.0)
(t2633 0.0)
(t2634 0.0)
(t2635 0.0)
(t2636 0.0)
(t2637 0.0)
(t2638 0.0)
(t2639 0.0)
(t2640 0.0)
(t2641 0.0)
(t2642 0.0)
(t2643 0.0)
(t2644 0.0)
(t2645 0.0)
(t2646 0.0)
(t2647 0.0)
(t2648 0.0)
(t2649 0.0)
(t2650 0.0)
(t2651 0.0)
(t2652 0.0)
(t2653 0.0)
(t2654 0.0)
(t2655 0.0)
(t2656 0.0)
(t2657 0.0)
(t2658 0.0)
(t2659 0.0)
(t2660 0.0)
(t2661 0.0)
(t2662 0.0)
(t2663 (/ 99.0 2.0))
(t2664 0.0)
(t2665 0.0)
(t2666 0.0)
(t2667 0.0)
(t2668 0.0)
(t2669 0.0)
(t2670 0.0)
(t2671 0.0)
(t2672 0.0)
(t2673 0.0)
(t2674 0.0)
(t2675 0.0)
(t2676 0.0)
(t2677 0.0)
(t2678 0.0)
(t2679 0.0)
(t2680 0.0)
(t2681 0.0)
(t2682 0.0)
(t2683 0.0)
(t2684 0.0)
(t2685 0.0)
(t2686 0.0)
(t2687 50.0)
(t2688 0.0)
(t2689 0.0)
(t2690 0.0)
(t2691 0.0)
(t2692 0.0)
(t2693 50.0)
(t2694 0.0)
(t2695 0.0)
(t2696 0.0)
(t2697 0.0)
(t2698 0.0)
(t2699 0.0)
(t2700 0.0)
(t2701 0.0)
(t2702 0.0)
(t2703 0.0)
(t2704 0.0)
(t2705 0.0)
(t2706 0.0)
(t2707 0.0)
(t2708 0.0)
(t2709 0.0)
(t2710 0.0)
(t2711 0.0)
(t2712 0.0)
(t2713 0.0)
(t2714 (/ 99.0 2.0))
(t2715 0.0)
(t2716 0.0)
(t2717 0.0)
(t2718 0.0)
(t2719 0.0)
(t2720 0.0)
(t2721 2.0)
(t2722 0.0)
(t2723 0.0)
(t2724 0.0)
(t2725 0.0)
(t2726 0.0)
(t2727 2.0)
(t2728 0.0)
(t2729 0.0)
(t2730 0.0)
(t2731 0.0)
(t2732 0.0)
(t2733 0.0)
(t2734 0.0)
(t2735 2.0)
(t2736 0.0)
(t2737 0.0)
(t2738 0.0)
(t2739 0.0)
(t2740 0.0)
(t2741 0.0)
(t2742 0.0)
(t2743 0.0)
(t2744 0.0)
(t2745 0.0)
(t2746 0.0)
(t2747 0.0)
(t2748 2.0)
(t2749 0.0)
(t2750 0.0)
(t2751 0.0)
(t2752 2.0)
(t2753 0.0)
(t2754 0.0)
(t2755 0.0)
(t2756 0.0)
(t2757 0.0)
(t2758 0.0)
(t2759 0.0)
(t2760 2.0)
(t2761 0.0)
(t2762 0.0)
(t2763 0.0)
(t2764 0.0)
(t2765 0.0)
(t2766 0.0)
(t2767 0.0)
(t2768 0.0)
(t2769 0.0)
(t2770 0.0)
(t2771 0.0)
(t2772 0.0)
(t2773 2.0)
(t2774 0.0)
(t2775 0.0)
(t2776 0.0)
(t2777 0.0)
(t2778 0.0)
(t2779 0.0)
(t2780 0.0)
(t2781 0.0)
(t2782 0.0)
(t2783 0.0)
(t2784 0.0)
(t2785 0.0)
(t2786 0.0)
(t2787 0.0)
(t2788 0.0)
(t2789 0.0)
(t2790 0.0)
(t2791 0.0)
(t2792 0.0)
(t2793 0.0)
(t2794 0.0)
(t2795 0.0)
(t2796 0.0)
(t2797 0.0)
(t2798 0.0)
(t2799 0.0)
(t2800 0.0)
(t2801 0.0)
(t2802 0.0)
(t2803 0.0)
(t2804 0.0)
(t2805 0.0)
(t2806 0.0)
(t2807 0.0)
(t2808 0.0)
(t2809 0.0)
(t2810 0.0)
(t2811 0.0)
(t2812 0.0)
(t2813 0.0)
(t2814 0.0)
(t2815 0.0)
(t2816 0.0)
(t2817 0.0)
(t2818 0.0)
(t2819 0.0)
(t2820 0.0)
(t2821 0.0)
(t2822 0.0)
(t2823 0.0)
(t2824 0.0)
(t2825 0.0)
(t2826 0.0)
(t2827 0.0)
(t2828 0.0)
(t2829 0.0)
(t2830 0.0)
(t2831 0.0)
(t2832 0.0)
(t2833 0.0)
(t2834 0.0)
(t2835 0.0)
(t2836 0.0)
(t2837 0.0)
(t2838 0.0)
(t2839 0.0)
(t2840 0.0)
(t2841 2.0)
(t2842 0.0)
(t2843 0.0)
(t2844 0.0)
(t2845 0.0)
(t2846 0.0)
(t2847 0.0)
(t2848 0.0)
(t2849 0.0)
(t2850 0.0)
(t2851 (/ 91.0 2.0))
(t2852 0.0)
(t2853 0.0)
(t2854 0.0)
(t2855 0.0)
(t2856 0.0)
(t2857 0.0)
(t2858 0.0)
(t2859 0.0)
(t2860 0.0)
(t2861 0.0)
(t2862 (/ 91.0 2.0))
(t2863 0.0)
(t2864 0.0)
(t2865 0.0)
(t2866 0.0)
(t2867 0.0)
(t2868 (/ 91.0 2.0))
(t2869 0.0)
(t2870 0.0)
(t2871 0.0)
(t2872 0.0)
(t2873 0.0)
(t2874 0.0)
(t2875 0.0)
(t2876 0.0)
(t2877 0.0)
(t2878 2.0)
(t2879 0.0)
(t2880 0.0)
(t2881 0.0)
(t2882 0.0)
(t2883 0.0)
(t2884 0.0)
(t2885 0.0)
(t2886 0.0)
(t2887 0.0)
(t2888 0.0)
(t2889 2.0)
(t2890 0.0)
(t2891 0.0)
(t2892 0.0)
(t2893 0.0)
(t2894 (/ 91.0 2.0))
(t2895 0.0)
(t2896 0.0)
(t2897 0.0)
(t2898 0.0)
(t2899 0.0)
(t2900 0.0)
(t2901 0.0)
(t2902 0.0)
(t2903 0.0)
(t2904 (/ 91.0 2.0))
(t2905 0.0)
(t2906 0.0)
(t2907 0.0)
(t2908 0.0)
(t2909 0.0)
(t2910 0.0)
(t2911 (/ 91.0 2.0))
(t2912 0.0)
(t2913 0.0)
(t2914 0.0)
(t2915 0.0)
(t2916 0.0)
(t2917 0.0)
(t2918 0.0)
(t2919 0.0)
(t2920 0.0)
(t2921 0.0)
(t2922 0.0)
(t2923 0.0)
(t2924 0.0)
(t2925 (/ 91.0 2.0))
(t2926 0.0)
(t2927 0.0)
(t2928 0.0)
(t2929 0.0)
(t2930 0.0)
(t2931 0.0)
(t2932 0.0)
(t2933 0.0)
(t2934 0.0)
(t2935 0.0)
(t2936 0.0)
(t2937 0.0)
(t2938 0.0)
(t2939 0.0)
(t2940 0.0)
(t2941 0.0)
(t2942 0.0)
(t2943 0.0)
(t2944 0.0)
(t2945 0.0)
(t2946 0.0)
(t2947 0.0)
(t2948 0.0)
(t2949 0.0)
(t2950 50.0)
(t2951 0.0)
(t2952 0.0)
(t2953 0.0)
(t2954 50.0)
(t2955 0.0)
(t2956 0.0)
(t2957 0.0)
(t2958 0.0)
(t2959 0.0)
(t2960 0.0)
(t2961 0.0)
(t2962 0.0)
(t2963 0.0)
(t2964 0.0)
(t2965 0.0)
(t2966 0.0)
(t2967 0.0)
(t2968 0.0)
(t2969 0.0)
(t2970 0.0)
(t2971 0.0)
(t2972 0.0)
(t2973 0.0)
(t2974 0.0)
(t2975 0.0)
(t2976 (/ 99.0 2.0))
(t2977 0.0)
(t2978 0.0)
(t2979 0.0)
(t2980 0.0)
(t2981 0.0)
(t2982 0.0)
(t2983 0.0)
(t2984 0.0)
(t2985 50.0)
(t2986 0.0)
(t2987 0.0)
(t2988 0.0)
(t2989 0.0)
(t2990 0.0)
(t2991 0.0)
(t2992 0.0)
(t2993 0.0)
(t2994 0.0)
(t2995 0.0)
(t2996 0.0)
(t2997 0.0)
(t2998 0.0)
(t2999 0.0)
(t3000 0.0)
(t3001 0.0)
(t3002 0.0)
(t3003 0.0)
(t3004 0.0)
(t3005 50.0)
(t3006 0.0)
(t3007 0.0)
(t3008 0.0)
(t3009 0.0)
(t3010 0.0)
(t3011 0.0)
(t3012 0.0)
(t3013 0.0)
(t3014 0.0)
(t3015 0.0)
(t3016 0.0)
(t3017 0.0)
(t3018 0.0)
(t3019 (/ 99.0 2.0))
(t3020 0.0)
(t3021 0.0)
(t3022 0.0)
(t3023 0.0)
(t3024 0.0)
(t3025 0.0)
(t3026 0.0)
(t3027 (/ 99.0 2.0))
(t3028 0.0)
(t3029 0.0)
(t3030 0.0)
(t3031 0.0)
(t3032 0.0)
(t3033 0.0)
(t3034 0.0)
(t3035 0.0)
(t3036 0.0)
(t3037 (/ 99.0 2.0))
(t3038 0.0)
(t3039 2.0)
(t3040 0.0)
(t3041 0.0)
(t3042 0.0)
(t3043 0.0)
(t3044 0.0)
(t3045 0.0)
(t3046 0.0)
(t3047 0.0)
(t3048 0.0)
(t3049 0.0)
(t3050 0.0)
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(t3333 0.0)
(t3334 2.0)
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(t3336 0.0)
(t3337 0.0)
(t3338 0.0)
(t3339 (/ 91.0 2.0))
(t3340 0.0)
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(t3349 (/ 91.0 2.0))
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(t3365 (/ 91.0 2.0))
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(t3398 2.0)
(t3399 0.0)
(t3400 0.0)
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(t3402 0.0)
(t3403 2.0)
(t3404 0.0)
(t3405 0.0)
(t3406 0.0)
(t3407 0.0)
(t3408 0.0)
(t3409 0.0)
(t3410 0.0)
(t3411 0.0)
(t3412 (/ 91.0 2.0))
(t3413 0.0)
(t3414 0.0)
(t3415 0.0)
(t3416 0.0)
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(t3418 0.0)
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(t3421 0.0)
(t3422 (/ 91.0 2.0))
(t3423 0.0)
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(t3425 0.0)
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(t3428 0.0)
(t3429 0.0)
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(t3431 0.0)
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(t3433 0.0)
(t3434 (/ 91.0 2.0))
(t3435 0.0)
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(t3443 0.0)
(t3444 50.0)
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(t3455 50.0)
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(t3467 0.0)
(t3468 50.0)
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(t3475 0.0)
(t3476 50.0)
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(t3478 0.0)
(t3479 (/ 99.0 2.0))
(t3480 0.0)
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(t3484 0.0)
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(t3488 0.0)
(t3489 50.0)
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(t3495 50.0)
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(t3502 0.0)
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(t3506 0.0)
(t3507 0.0)
(t3508 0.0)
(t3509 50.0)
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(t3522 0.0)
(t3523 (/ 99.0 2.0))
(t3524 0.0)
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(t3527 0.0)
(t3528 (/ 99.0 2.0))
(t3529 0.0)
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(t3545 (/ 99.0 2.0))
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(t3554 0.0)
(t3555 (/ 99.0 2.0))
(t3556 0.0)
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(t3558 0.0)
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(t3572 2.0)
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(t3583 0.0)
(t3584 2.0)
(t3585 0.0)
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(t3597 0.0)
(t3598 2.0)
(t3599 0.0)
(t3600 0.0)
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(t3602 0.0)
(t3603 0.0)
(t3604 0.0)
(t3605 0.0)
(t3606 0.0)
(t3607 0.0)
(t3608 0.0)
(t3609 0.0)
(t3610 0.0)
(t3611 0.0)
(t3612 0.0)
(t3613 0.0)
(t3614 0.0)
(t3615 0.0)
(t3616 0.0)
(t3617 0.0)
(t3618 0.0)
(t3619 0.0)
(t3620 0.0)
(t3621 0.0)
(t3622 0.0)
(t3623 0.0)
(t3624 0.0)
(t3625 0.0)
(t3626 0.0)
(t3627 0.0)
(t3628 0.0)
(t3629 0.0)
(t3630 0.0)
(t3631 0.0)
(t3632 0.0)
(t3633 0.0)
(t3634 0.0)
(t3635 0.0)
(t3636 0.0)
(t3637 0.0)
(t3638 0.0)
(t3639 0.0)
(t3640 0.0)
(t3641 0.0)
(t3642 0.0)
(t3643 0.0)
(t3644 0.0)
(t3645 0.0)
(t3646 0.0)
(t3647 0.0)
(t3648 (/ 91.0 2.0))
(t3649 0.0)
(t3650 0.0)
(t3651 0.0)
(t3652 (/ 91.0 2.0))
(t3653 0.0)
(t3654 0.0)
(t3655 0.0)
(t3656 0.0)
(t3657 0.0)
(t3658 (/ 91.0 2.0))
(t3659 0.0)
(t3660 0.0)
(t3661 0.0)
(t3662 0.0)
(t3663 0.0)
(t3664 0.0)
(t3665 0.0)
(t3666 0.0)
(t3667 0.0)
(t3668 0.0)
(t3669 (/ 91.0 2.0))
(t3670 0.0)
(t3671 0.0)
(t3672 0.0)
(t3673 0.0)
(t3674 0.0)
(t3675 0.0)
(t3676 2.0)
(t3677 0.0)
(t3678 0.0)
(t3679 0.0)
(t3680 0.0)
(t3681 0.0)
(t3682 (/ 91.0 2.0))
(t3683 0.0)
(t3684 0.0)
(t3685 0.0)
(t3686 0.0)
(t3687 0.0)
(t3688 0.0)
(t3689 0.0)
(t3690 0.0)
(t3691 0.0)
(t3692 2.0)
(t3693 0.0)
(t3694 0.0)
(t3695 0.0)
(t3696 0.0)
(t3697 0.0)
(t3698 0.0)
(t3699 0.0)
(t3700 0.0)
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(t3702 0.0)
(t3703 0.0)
(t3704 2.0)
(t3705 0.0)
(t3706 0.0)
(t3707 0.0)
(t3708 0.0)
(t3709 0.0)
(t3710 0.0)
(t3711 0.0)
(t3712 0.0)
(t3713 2.0)
(t3714 0.0)
(t3715 0.0)
(t3716 0.0)
(t3717 0.0)
(t3718 0.0)
(t3719 0.0)
(t3720 0.0)
(t3721 0.0)
(t3722 0.0)
(t3723 0.0)
(t3724 0.0)
(t3725 0.0)
(t3726 0.0)
(t3727 0.0)
(t3728 (/ 91.0 2.0))
(t3729 0.0)
(t3730 0.0)
(t3731 0.0)
(t3732 0.0)
(t3733 (/ 91.0 2.0))
(t3734 0.0)
(t3735 0.0)
(t3736 0.0)
(t3737 0.0)
(t3738 (/ 91.0 2.0))
(t3739 0.0)
(t3740 0.0)
(t3741 0.0)
(t3742 0.0)
(t3743 0.0)
(t3744 0.0)
(t3745 0.0)
(t3746 0.0)
(t3747 50.0)
(t3748 0.0)
(t3749 0.0)
(t3750 0.0)
(t3751 0.0)
(t3752 50.0)
(t3753 0.0)
(t3754 0.0)
(t3755 0.0)
(t3756 0.0)
(t3757 0.0)
(t3758 0.0)
(t3759 0.0)
(t3760 0.0)
(t3761 50.0)
(t3762 0.0)
(t3763 0.0)
(t3764 0.0)
(t3765 0.0)
(t3766 0.0)
(t3767 0.0)
(t3768 0.0)
(t3769 0.0)
(t3770 0.0)
(t3771 0.0)
(t3772 0.0)
(t3773 0.0)
(t3774 0.0)
(t3775 0.0)
(t3776 0.0)
(t3777 50.0)
(t3778 0.0)
(t3779 0.0)
(t3780 0.0)
(t3781 0.0)
(t3782 0.0)
(t3783 0.0)
(t3784 0.0)
(t3785 0.0)
(t3786 0.0)
(t3787 0.0)
(t3788 50.0)
(t3789 0.0)
(t3790 0.0)
(t3791 0.0)
(t3792 0.0)
(t3793 50.0)
(t3794 0.0)
(t3795 0.0)
(t3796 0.0)
(t3797 0.0)
(t3798 0.0)
(t3799 (/ 99.0 2.0))
(t3800 0.0)
(t3801 0.0)
(t3802 0.0)
(t3803 0.0)
(t3804 0.0)
(t3805 0.0)
(t3806 0.0)
(t3807 0.0)
(t3808 0.0)
(t3809 0.0)
(t3810 0.0)
(t3811 0.0)
(t3812 0.0)
(t3813 (/ 99.0 2.0))
(t3814 0.0)
(t3815 0.0)
(t3816 0.0)
(t3817 0.0)
(t3818 0.0)
(t3819 0.0)
(t3820 0.0)
(t3821 0.0)
(t3822 0.0)
(t3823 0.0)
(t3824 0.0)
(t3825 0.0)
(t3826 0.0)
(t3827 0.0)
(t3828 0.0)
(t3829 (/ 99.0 2.0))
(t3830 0.0)
(t3831 0.0)
(t3832 0.0)
(t3833 0.0)
(t3834 (/ 99.0 2.0))
(t3835 0.0)
(t3836 0.0)
(t3837 0.0)
(t3838 0.0)
(t3839 0.0)
(t3840 (/ 99.0 2.0))
(t3841 0.0)
(t3842 0.0)
(t3843 0.0)
(t3844 0.0)
(t3845 0.0)
(t3846 0.0)
(t3847 0.0)
(t3848 0.0)
(t3849 0.0)
(t3850 0.0)
(t3851 0.0)
(t3852 0.0)
(t3853 0.0)
(t3854 0.0)
(t3855 0.0)
(t3856 0.0)
(t3857 0.0)
(t3858 0.0)
(t3859 0.0)
(t3860 0.0)
(t3861 0.0)
(t3862 0.0)
(t3863 0.0)
(t3864 0.0)
(t3865 0.0)
(t3866 0.0)
(t3867 0.0)
(t3868 (/ 99.0 2.0))
(t3869 0.0)
(t3870 0.0)
(t3871 0.0)
(t3872 2.0)
(t3873 0.0)
(t3874 0.0)
(t3875 0.0)
(t3876 0.0)
(t3877 0.0)
(t3878 0.0)
(t3879 0.0)
(t3880 0.0)
(t3881 0.0)
(t3882 0.0)
(t3883 0.0)
(t3884 0.0)
(t3885 0.0)
(t3886 2.0)
(t3887 0.0)
(t3888 0.0)
(t3889 0.0)
(t3890 0.0)
(t3891 2.0)
(t3892 0.0)
(t3893 0.0)
(t3894 0.0)
(t3895 0.0)
(t3896 2.0)
(t3897 0.0)
(t3898 0.0)
(t3899 0.0)
(t3900 0.0)
(t3901 0.0)
(t3902 0.0)
(t3903 0.0)
(t3904 0.0)
(t3905 0.0)
(t3906 0.0)
(t3907 0.0)
(t3908 0.0)
(t3909 0.0)
(t3910 0.0)
(t3911 0.0)
(t3912 2.0)
(t3913 0.0)
(t3914 0.0)
(t3915 0.0)
(t3916 0.0)
(t3917 0.0)
(t3918 0.0)
(t3919 0.0)
(t3920 0.0)
(t3921 0.0)
(t3922 0.0)
(t3923 0.0)
(t3924 0.0)
(t3925 0.0)
(t3926 0.0)
(t3927 0.0)
(t3928 0.0)
(t3929 0.0)
(t3930 0.0)
(t3931 0.0)
(t3932 0.0)
(t3933 0.0)
(t3934 0.0)
(t3935 0.0)
(t3936 0.0)
(t3937 0.0)
(t3938 0.0)
(t3939 0.0)
(t3940 0.0)
(t3941 0.0)
(t3942 0.0)
(t3943 0.0)
(t3944 0.0)
(t3945 0.0)
(t3946 0.0)
(t3947 0.0)
(t3948 0.0)
(t3949 0.0)
(t3950 0.0)
(t3951 0.0)
(t3952 0.0)
(t3953 (/ 91.0 2.0))
(t3954 0.0)
(t3955 0.0)
(t3956 0.0)
(t3957 0.0)
(t3958 0.0)
(t3959 0.0)
(t3960 0.0)
(t3961 0.0)
(t3962 0.0)
(t3963 0.0)
(t3964 0.0)
(t3965 0.0)
(t3966 0.0)
(t3967 0.0)
(t3968 0.0)
(t3969 0.0)
(t3970 0.0)
(t3971 0.0)
(t3972 0.0)
(t3973 0.0)
(t3974 0.0)
(t3975 0.0)
(t3976 0.0)
(t3977 0.0)
(t3978 0.0)
(t3979 0.0)
(t3980 0.0)
(t3981 0.0)
(t3982 0.0)
(t3983 0.0)
(t3984 0.0)
(t3985 0.0)
(t3986 0.0)
(t3987 (/ 91.0 2.0))
(t3988 0.0)
(t3989 0.0)
(t3990 (/ 91.0 2.0))
(t3991 0.0)
(t3992 0.0)
(t3993 0.0)
(t3994 0.0)
(t3995 0.0)
(t3996 0.0)
(t3997 0.0)
(t3998 0.0)
(t3999 (/ 91.0 2.0))
(t4000 0.0)
(t4001 0.0)
(t4002 0.0)
(t4003 0.0)
(t4004 0.0)
(t4005 0.0)
(t4006 0.0)
(t4007 (/ 91.0 2.0))
(t4008 0.0)
(t4009 0.0)
(t4010 0.0)
(t4011 0.0)
(t4012 2.0)
(t4013 0.0)
(t4014 0.0)
(t4015 0.0)
(t4016 0.0)
(t4017 0.0)
(t4018 0.0)
(t4019 0.0)
(t4020 0.0)
(t4021 0.0)
(t4022 0.0)
(t4023 0.0)
(t4024 0.0)
(t4025 (/ 91.0 2.0))
(t4026 0.0)
(t4027 0.0)
(t4028 0.0)
(t4029 0.0)
(t4030 0.0)
(t4031 0.0)
(t4032 0.0)
(t4033 0.0)
(t4034 2.0)
(t4035 0.0)
(t4036 0.0)
(t4037 0.0)
(t4038 0.0)
(t4039 0.0)
(t4040 0.0)
(t4041 0.0)
(t4042 (/ 91.0 2.0))
(t4043 0.0)
(t4044 0.0)
(t4045 0.0)
(t4046 0.0)
(t4047 (/ 91.0 2.0))
(t4048 0.0)
(t4049 0.0)
(t4050 0.0)
(t4051 0.0)
(t4052 0.0)
(t4053 0.0)
(t4054 0.0)
(t4055 0.0)
(t4056 0.0)
(t4057 0.0)
(t4058 0.0)
(t4059 0.0)
(t4060 0.0)
(t4061 0.0)
(t4062 0.0)
(t4063 0.0)
(t4064 0.0)
(t4065 0.0)
(t4066 0.0)
(t4067 0.0)
(t4068 0.0)
(t4069 0.0)
(t4070 0.0)
(t4071 0.0)
(t4072 0.0)
(t4073 0.0)
(t4074 0.0)
(t4075 0.0)
(t4076 0.0)
(t4077 0.0)
(t4078 0.0)
(t4079 0.0)
(t4080 0.0)
(t4081 0.0)
(t4082 0.0)
(t4083 0.0)
(t4084 0.0)
(t4085 0.0)
(t4086 0.0)
(t4087 0.0)
(t4088 0.0)
(t4089 0.0)
(t4090 50.0)
(t4091 0.0)
(t4092 0.0)
(t4093 0.0)
(t4094 0.0)
(t4095 0.0)
(t4096 0.0)
(t4097 0.0)
(t4098 0.0)
(t4099 0.0)
(t4100 0.0)
(t4101 0.0)
(t4102 0.0)
(t4103 0.0)
(t4104 0.0)
(t4105 0.0)
(t4106 0.0)
(t4107 (/ 99.0 2.0))
(t4108 0.0)
(t4109 0.0)
(t4110 0.0)
(t4111 0.0)
(t4112 0.0)
(t4113 0.0)
(t4114 0.0)
(t4115 0.0)
(t4116 (/ 99.0 2.0))
(t4117 0.0)
(t4118 0.0)
(t4119 0.0)
(t4120 0.0)
(t4121 0.0)
(t4122 0.0)
(t4123 0.0)
(t4124 0.0)
(t4125 0.0)
(t4126 (/ 99.0 2.0))
(t4127 0.0)
(t4128 0.0)
(t4129 (/ 91.0 2.0))
(t4130 0.0)
(t4131 0.0)
(t4132 0.0)
(t4133 0.0)
(t4134 0.0)
(t4135 0.0)
(t4136 0.0)
(t4137 (/ 99.0 2.0))
(t4138 0.0)
(t4139 0.0)
(t4140 0.0)
(t4141 0.0)
(t4142 0.0)
(t4143 0.0)
(t4144 0.0)
(t4145 0.0)
(t4146 0.0)
(t4147 0.0)
(t4148 0.0)
(t4149 0.0)
(t4150 0.0)
(t4151 0.0)
(t4152 0.0)
(t4153 0.0)
(t4154 (/ 99.0 2.0))
(t4155 0.0)
(t4156 0.0)
(t4157 0.0)
(t4158 0.0)
(t4159 0.0)
(t4160 0.0)
(t4161 0.0)
(t4162 0.0)
(t4163 0.0)
(t4164 0.0)
(t4165 0.0)
(t4166 0.0)
(t4167 0.0)
(t4168 0.0)
(t4169 0.0)
(t4170 0.0)
(t4171 0.0)
(t4172 0.0)
(t4173 0.0)
(t4174 0.0)
(t4175 0.0)
(t4176 (/ 99.0 2.0))
(t4177 0.0)
(t4178 0.0)
(t4179 0.0)
(t4180 0.0)
(t4181 0.0)
(t4182 (/ 99.0 2.0))
(t4183 0.0)
(t4184 0.0)
(t4185 0.0)
(t4186 0.0)
(t4187 0.0)
(t4188 (/ 99.0 2.0))
(t4189 0.0)
(t4190 0.0)
(t4191 0.0)
(t4192 0.0)
(t4193 2.0)
(t4194 0.0)
(t4195 0.0)
(t4196 0.0)
(t4197 0.0)
(t4198 0.0)
(t4199 0.0)
(t4200 0.0)
(t4201 0.0)
(t4202 0.0)
(t4203 0.0)
(t4204 2.0)
(t4205 0.0)
(t4206 0.0)
(t4207 0.0)
(t4208 0.0)
(t4209 0.0)
(t4210 0.0)
(t4211 0.0)
(t4212 0.0)
(t4213 0.0)
(t4214 0.0)
(t4215 0.0)
(t4216 2.0)
(t4217 0.0)
(t4218 0.0)
(t4219 0.0)
(t4220 0.0)
(t4221 0.0)
(t4222 0.0)
(t4223 0.0)
(t4224 0.0)
(t4225 0.0)
(t4226 2.0)
(t4227 0.0)
(t4228 0.0)
(t4229 0.0)
(t4230 0.0)
(t4231 0.0)
(t4232 0.0)
(t4233 0.0)
(t4234 0.0)
(t4235 0.0)
(t4236 0.0)
(t4237 0.0)
(t4238 0.0)
(t4239 0.0)
(t4240 0.0)
(t4241 0.0)
(t4242 0.0)
(t4243 0.0)
(t4244 0.0)
(t4245 0.0)
(t4246 0.0)
(t4247 0.0)
(t4248 0.0)
(t4249 0.0)
(t4250 0.0)
(t4251 0.0)
(t4252 0.0)
(t4253 0.0)
(t4254 0.0)
(t4255 0.0)
(t4256 0.0)
(t4257 0.0)
(t4258 (/ 91.0 2.0))
(t4259 0.0)
(t4260 0.0)
(t4261 0.0)
(t4262 0.0)
(t4263 0.0)
(t4264 0.0)
(t4265 0.0)
(t4266 (/ 91.0 2.0))
(t4267 0.0)
(t4268 0.0)
(t4269 0.0)
(t4270 0.0)
(t4271 0.0)
(t4272 0.0)
(t4273 0.0)
(t4274 0.0)
(t4275 (/ 91.0 2.0))
(t4276 0.0)
(t4277 0.0)
(t4278 0.0)
(t4279 0.0)
(t4280 0.0)
(t4281 0.0)
(t4282 0.0)
(t4283 0.0)
(t4284 0.0)
(t4285 (/ 91.0 2.0))
(t4286 0.0)
(t4287 0.0)
(t4288 (/ 91.0 2.0))
(t4289 0.0)
(t4290 0.0)
(t4291 0.0)
(t4292 0.0)
(t4293 0.0)
(t4294 0.0)
(t4295 0.0)
(t4296 0.0)
(t4297 0.0)
(t4298 0.0)
(t4299 0.0)
(t4300 0.0)
(t4301 0.0)
(t4302 0.0)
(t4303 0.0)
(t4304 0.0)
(t4305 0.0)
(t4306 0.0)
(t4307 (/ 91.0 2.0))
(t4308 0.0)
(t4309 0.0)
(t4310 0.0)
(t4311 0.0)
(t4312 0.0)
(t4313 0.0)
(t4314 0.0)
(t4315 (/ 91.0 2.0))
(t4316 0.0)
(t4317 0.0)
(t4318 0.0)
(t4319 0.0)
(t4320 0.0)
(t4321 0.0)
(t4322 0.0)
(t4323 0.0)
(t4324 0.0)
(t4325 0.0)
(t4326 (/ 91.0 2.0))
(t4327 0.0)
(t4328 0.0)
(t4329 0.0)
(t4330 0.0)
(t4331 0.0)
(t4332 0.0)
(t4333 0.0)
(t4334 0.0)
(t4335 (/ 91.0 2.0))
(t4336 0.0)
(t4337 0.0)
(t4338 0.0)
(t4339 0.0)
(t4340 0.0)
(t4341 0.0)
(t4342 0.0)
(t4343 0.0)
(t4344 0.0)
(t4345 0.0)
(t4346 0.0)
(t4347 0.0)
(t4348 2.0)
(t4349 0.0)
(t4350 0.0)
(t4351 0.0)
(t4352 0.0)
(t4353 0.0)
(t4354 0.0)
(t4355 0.0)
(t4356 0.0)
(t4357 (/ 91.0 2.0))
(t4358 0.0)
(t4359 0.0)
(t4360 (/ 91.0 2.0))
(t4361 0.0)
(t4362 0.0)
(t4363 0.0)
(t4364 0.0)
(t4365 0.0)
(t4366 0.0)
(t4367 0.0)
(t4368 0.0)
(t4369 0.0)
(t4370 0.0)
(t4371 0.0)
(t4372 0.0)
(t4373 0.0)
(t4374 0.0)
(t4375 0.0)
(t4376 0.0)
(t4377 0.0)
(t4378 0.0)
(t4379 0.0)
(t4380 0.0)
(t4381 0.0)
(t4382 0.0)
(t4383 0.0)
(t4384 0.0)
(t4385 0.0)
(t4386 0.0)
(t4387 0.0)
(t4388 0.0)
(t4389 0.0)
(t4390 0.0)
(t4391 2.0)
(t4392 0.0)
(t4393 0.0)
(t4394 0.0)
(t4395 0.0)
(t4396 0.0)
(t4397 0.0)
(t4398 0.0)
(t4399 0.0)
(t4400 0.0)
(t4401 2.0)
(t4402 0.0)
(t4403 0.0)
(t4404 0.0)
(t4405 0.0)
(t4406 0.0)
(t4407 0.0)
(t4408 0.0)
(t4409 0.0)
(t4410 0.0)
(t4411 0.0)
(t4412 0.0)
(t4413 0.0)
(t4414 0.0)
(t4415 0.0)
(t4416 0.0)
(t4417 0.0)
(t4418 (/ 99.0 2.0))
(t4419 0.0)
(t4420 0.0)
(t4421 0.0)
(t4422 (/ 99.0 2.0))
(t4423 0.0)
(t4424 0.0)
(t4425 0.0)
(t4426 0.0)
(t4427 0.0)
(t4428 0.0)
(t4429 0.0)
(t4430 (/ 99.0 2.0))
(t4431 0.0)
(t4432 0.0)
(t4433 0.0)
(t4434 0.0)
(t4435 (/ 99.0 2.0))
(t4436 0.0)
(t4437 0.0)
(t4438 0.0)
(t4439 0.0)
(t4440 0.0)
(t4441 0.0)
(t4442 0.0)
(t4443 0.0)
(t4444 0.0)
(t4445 0.0)
(t4446 0.0)
(t4447 0.0)
(t4448 0.0)
(t4449 (/ 91.0 2.0))
(t4450 0.0)
(t4451 0.0)
(t4452 0.0)
(t4453 0.0)
(t4454 (/ 99.0 2.0))
(t4455 0.0)
(t4456 0.0)
(t4457 0.0)
(t4458 0.0)
(t4459 0.0)
(t4460 0.0)
(t4461 0.0)
(t4462 0.0)
(t4463 0.0)
(t4464 0.0)
(t4465 0.0)
(t4466 0.0)
(t4467 0.0)
(t4468 0.0)
(t4469 0.0)
(t4470 0.0)
(t4471 (/ 99.0 2.0))
(t4472 0.0)
(t4473 0.0)
(t4474 0.0)
(t4475 (/ 99.0 2.0))
(t4476 0.0)
(t4477 0.0)
(t4478 0.0)
(t4479 0.0)
(t4480 0.0)
(t4481 0.0)
(t4482 0.0)
(t4483 0.0)
(t4484 0.0)
(t4485 0.0)
(t4486 0.0)
(t4487 0.0)
(t4488 0.0)
(t4489 (/ 99.0 2.0))
(t4490 0.0)
(t4491 0.0)
(t4492 0.0)
(t4493 0.0)
(t4494 0.0)
(t4495 (/ 99.0 2.0))
(t4496 0.0)
(t4497 0.0)
(t4498 0.0)
(t4499 0.0)
(t4500 0.0)
(t4501 0.0)
(t4502 0.0)
(t4503 (/ 99.0 2.0))
(t4504 0.0)
(t4505 0.0)
(t4506 0.0)
(t4507 (/ 99.0 2.0))
(t4508 0.0)
(t4509 0.0)
(t4510 0.0)
(t4511 0.0)
(t4512 0.0)
(t4513 0.0)
(t4514 0.0)
(t4515 0.0)
(t4516 0.0)
(t4517 2.0)
(t4518 0.0)
(t4519 0.0)
(t4520 0.0)
(t4521 0.0)
(t4522 0.0)
(t4523 0.0)
(t4524 0.0)
(t4525 0.0)
(t4526 0.0)
(t4527 0.0)
(t4528 0.0)
(t4529 0.0)
(t4530 0.0)
(t4531 (/ 91.0 2.0))
(t4532 0.0)
(t4533 0.0)
(t4534 0.0)
(t4535 0.0)
(t4536 0.0)
(t4537 0.0)
(t4538 0.0)
(t4539 0.0)
(t4540 2.0)
(t4541 0.0)
(t4542 0.0)
(t4543 0.0)
(t4544 0.0)
(t4545 0.0)
(t4546 0.0)
(t4547 0.0)
(t4548 0.0)
(t4549 0.0)
(t4550 0.0)
(t4551 0.0)
(t4552 0.0)
(t4553 0.0)
(t4554 0.0)
(t4555 0.0)
(t4556 0.0)
(t4557 0.0)
(t4558 0.0)
(t4559 0.0)
(t4560 0.0)
(t4561 0.0)
(t4562 0.0)
(t4563 0.0)
(t4564 0.0)
(t4565 0.0)
(t4566 0.0)
(t4567 0.0)
(t4568 0.0)
(t4569 0.0)
(t4570 0.0)
(t4571 0.0)
(t4572 0.0)
(t4573 0.0)
(t4574 0.0)
(t4575 0.0)
(t4576 0.0)
(t4577 0.0)
(t4578 0.0)
(t4579 0.0)
(t4580 0.0)
(t4581 0.0)
(t4582 0.0)
(t4583 0.0)
(t4584 0.0)
(t4585 0.0)
(t4586 0.0)
(t4587 0.0)
(t4588 0.0)
(t4589 0.0)
(t4590 0.0)
(t4591 0.0)
(t4592 0.0)
(t4593 0.0)
(t4594 0.0)
(t4595 0.0)
(t4596 0.0)
(t4597 0.0)
(t4598 0.0)
(t4599 0.0)
(t4600 0.0)
(t4601 (/ 91.0 2.0))
(t4602 0.0)
(t4603 0.0)
(t4604 0.0)
(t4605 0.0)
(t4606 0.0)
(t4607 0.0)
(t4608 0.0)
(t4609 0.0)
(t4610 0.0)
(t4611 0.0)
(t4612 0.0)
(t4613 0.0)
(t4614 0.0)
(t4615 (/ 91.0 2.0))
(t4616 0.0)
(t4617 0.0)
(t4618 0.0)
(t4619 0.0)
(t4620 0.0)
(t4621 0.0)
(t4622 0.0)
(t4623 (/ 91.0 2.0))
(t4624 0.0)
(t4625 (/ 91.0 2.0))
(t4626 0.0)
(t4627 0.0)
(t4628 0.0)
(t4629 0.0)
(t4630 0.0)
(t4631 0.0)
(t4632 0.0)
(t4633 0.0)
(t4634 0.0)
(t4635 0.0)
(t4636 0.0)
(t4637 0.0)
(t4638 0.0)
(t4639 0.0)
(t4640 0.0)
(t4641 0.0)
(t4642 (/ 91.0 2.0))
(t4643 0.0)
(t4644 0.0)
(t4645 0.0)
(t4646 0.0)
(t4647 0.0)
(t4648 0.0)
(t4649 0.0)
(t4650 0.0)
(t4651 (/ 91.0 2.0))
(t4652 0.0)
(t4653 0.0)
(t4654 0.0)
(t4655 0.0)
(t4656 0.0)
(t4657 0.0)
(t4658 0.0)
(t4659 0.0)
(t4660 0.0)
(t4661 0.0)
(t4662 0.0)
(t4663 2.0)
(t4664 0.0)
(t4665 0.0)
(t4666 0.0)
(t4667 0.0)
(t4668 0.0)
(t4669 0.0)
(t4670 0.0)
(t4671 0.0)
(t4672 0.0)
(t4673 0.0)
(t4674 0.0)
(t4675 0.0)
(t4676 0.0)
(t4677 0.0)
(t4678 0.0)
(t4679 0.0)
(t4680 0.0)
(t4681 0.0)
(t4682 0.0)
(t4683 0.0)
(t4684 (/ 91.0 2.0))
(t4685 0.0)
(t4686 0.0)
(t4687 0.0)
(t4688 0.0)
(t4689 0.0)
(t4690 0.0)
(t4691 0.0)
(t4692 (/ 91.0 2.0))
(t4693 0.0)
(t4694 0.0)
(t4695 2.0)
(t4696 0.0)
(t4697 0.0)
(t4698 0.0)
(t4699 0.0)
(t4700 0.0)
(t4701 0.0)
(t4702 0.0)
(t4703 0.0)
(t4704 0.0)
(t4705 0.0)
(t4706 0.0)
(t4707 0.0)
(t4708 0.0)
(t4709 0.0)
(t4710 0.0)
(t4711 0.0)
(t4712 0.0)
(t4713 2.0)
(t4714 0.0)
(t4715 0.0)
(t4716 0.0)
(t4717 0.0)
(t4718 0.0)
(t4719 0.0)
(t4720 0.0)
(t4721 0.0)
(t4722 2.0)
(t4723 0.0)
(t4724 0.0)
(t4725 0.0)
(t4726 0.0)
(t4727 0.0)
(t4728 0.0)
(t4729 0.0)
(t4730 0.0)
(t4731 (/ 99.0 2.0))
(t4732 0.0)
(t4733 0.0)
(t4734 0.0)
(t4735 0.0)
(t4736 (/ 99.0 2.0))
(t4737 0.0)
(t4738 0.0)
(t4739 0.0)
(t4740 0.0)
(t4741 0.0)
(t4742 0.0)
(t4743 0.0)
(t4744 0.0)
(t4745 0.0)
(t4746 0.0)
(t4747 0.0)
(t4748 0.0)
(t4749 0.0)
(t4750 0.0)
(t4751 0.0)
(t4752 0.0)
(t4753 (/ 99.0 2.0))
(t4754 0.0)
(t4755 0.0)
(t4756 0.0)
(t4757 0.0)
(t4758 0.0)
(t4759 0.0)
(t4760 0.0)
(t4761 (/ 91.0 2.0))
(t4762 0.0)
(t4763 0.0)
(t4764 0.0)
(t4765 0.0)
(t4766 0.0)
(t4767 0.0)
(t4768 0.0)
(t4769 0.0)
(t4770 0.0)
(t4771 0.0)
(t4772 (/ 99.0 2.0))
(t4773 (/ 99.0 2.0))
(t4774 0.0)
(t4775 0.0)
(t4776 0.0)
(t4777 0.0)
(t4778 0.0)
(t4779 0.0)
(t4780 0.0)
(t4781 0.0)
(t4782 0.0)
(t4783 0.0)
(t4784 0.0)
(t4785 (/ 99.0 2.0))
(t4786 0.0)
(t4787 0.0)
(t4788 0.0)
(t4789 (/ 99.0 2.0))
(t4790 0.0)
(t4791 0.0)
(t4792 0.0)
(t4793 0.0)
(t4794 0.0)
(t4795 0.0)
(t4796 0.0)
(t4797 0.0)
(t4798 0.0)
(t4799 0.0)
(t4800 0.0)
(t4801 0.0)
(t4802 (/ 99.0 2.0))
(t4803 0.0)
(t4804 0.0)
(t4805 0.0)
(t4806 0.0)
(t4807 0.0)
(t4808 0.0)
(t4809 0.0)
(t4810 0.0)
(t4811 0.0)
(t4812 0.0)
(t4813 0.0)
(t4814 0.0)
(t4815 0.0)
(t4816 0.0)
(t4817 0.0)
(t4818 0.0)
(t4819 0.0)
(t4820 0.0)
(t4821 0.0)
(t4822 0.0)
(t4823 0.0)
(t4824 0.0)
(t4825 0.0)
(t4826 2.0)
(t4827 0.0)
(t4828 0.0)
(t4829 0.0)
(t4830 2.0)
(t4831 0.0)
(t4832 0.0)
(t4833 0.0)
(t4834 0.0)
(t4835 0.0)
(t4836 0.0)
(t4837 0.0)
(t4838 0.0)
(t4839 0.0)
(t4840 0.0)
(t4841 0.0)
(t4842 0.0)
(t4843 0.0)
(t4844 0.0)
(t4845 0.0)
(t4846 0.0)
(t4847 0.0)
(t4848 0.0)
(t4849 0.0)
(t4850 0.0)
(t4851 (/ 91.0 2.0))
(t4852 0.0)
(t4853 0.0)
(t4854 0.0)
(t4855 0.0)
(t4856 0.0)
(t4857 0.0)
(t4858 (/ 91.0 2.0))
(t4859 0.0)
(t4860 0.0)
(t4861 0.0)
(t4862 0.0)
(t4863 0.0)
(t4864 0.0)
(t4865 0.0)
(t4866 0.0)
(t4867 0.0)
(t4868 0.0)
(t4869 0.0)
(t4870 0.0)
(t4871 0.0)
(t4872 0.0)
(t4873 0.0)
(t4874 0.0)
(t4875 0.0)
(t4876 0.0)
(t4877 0.0)
(t4878 0.0)
(t4879 0.0)
(t4880 0.0)
(t4881 0.0)
(t4882 0.0)
(t4883 0.0)
(t4884 0.0)
(t4885 0.0)
(t4886 0.0)
(t4887 0.0)
(t4888 0.0)
(t4889 0.0)
(t4890 0.0)
(t4891 0.0)
(t4892 0.0)
(t4893 0.0)
(t4894 0.0)
(t4895 0.0)
(t4896 0.0)
(t4897 0.0)
(t4898 0.0)
(t4899 0.0)
(t4900 0.0)
(t4901 0.0)
(t4902 0.0)
(t4903 0.0)
(t4904 (/ 91.0 2.0))
(t4905 0.0)
(t4906 0.0)
(t4907 (/ 91.0 2.0))
(t4908 0.0)
(t4909 0.0)
(t4910 0.0)
(t4911 0.0)
(t4912 0.0)
(t4913 0.0)
(t4914 0.0)
(t4915 0.0)
(t4916 0.0)
(t4917 0.0)
(t4918 0.0)
(t4919 0.0)
(t4920 0.0)
(t4921 0.0)
(t4922 0.0)
(t4923 0.0)
(t4924 0.0)
(t4925 0.0)
(t4926 0.0)
(t4927 0.0)
(t4928 0.0)
(t4929 0.0)
(t4930 0.0)
(t4931 0.0)
(t4932 0.0)
(t4933 0.0)
(t4934 0.0)
(t4935 0.0)
(t4936 (/ 91.0 2.0))
(t4937 0.0)
(t4938 0.0)
(t4939 0.0)
(t4940 0.0)
(t4941 0.0)
(t4942 0.0)
(t4943 0.0)
(t4944 0.0)
(t4945 (/ 91.0 2.0))
(t4946 (/ 91.0 2.0))
(t4947 0.0)
(t4948 0.0)
(t4949 0.0)
(t4950 0.0)
(t4951 0.0)
(t4952 0.0)
(t4953 0.0)
(t4954 0.0)
(t4955 0.0)
(t4956 0.0)
(t4957 0.0)
(t4958 0.0)
(t4959 0.0)
(t4960 0.0)
(t4961 (/ 91.0 2.0))
(t4962 0.0)
(t4963 0.0)
(t4964 0.0)
(t4965 0.0)
(t4966 0.0)
(t4967 0.0)
(t4968 0.0)
(t4969 0.0)
(t4970 (/ 91.0 2.0))
(t4971 0.0)
(t4972 0.0)
(t4973 0.0)
(t4974 0.0)
(t4975 0.0)
(t4976 0.0)
(t4977 0.0)
(t4978 0.0)
(t4979 0.0)
(t4980 0.0)
(t4981 0.0)
(t4982 0.0)
(t4983 0.0)
(t4984 0.0)
(t4985 2.0)
(t4986 0.0)
(t4987 0.0)
(t4988 0.0)
(t4989 0.0)
(t4990 0.0)
(t4991 0.0)
(t4992 0.0)
(t4993 0.0)
(t4994 0.0)
(t4995 0.0)
(t4996 0.0)
(t4997 0.0)
(t4998 0.0)
(t4999 0.0)
(t5000 (/ 91.0 2.0))
(t5001 0.0)
(t5002 0.0)
(t5003 0.0)
(t5004 0.0)
(t5005 0.0)
(t5006 0.0)
(t5007 0.0)
(t5008 0.0)
(t5009 0.0)
(t5010 0.0)
(t5011 0.0)
(t5012 0.0)
(t5013 (/ 91.0 2.0))
(t5014 0.0)
(t5015 2.0)
(t5016 0.0)
(t5017 0.0)
(t5018 0.0)
(t5019 0.0)
(t5020 0.0)
(t5021 0.0)
(t5022 0.0)
(t5023 0.0)
(t5024 0.0)
(t5025 0.0)
(t5026 0.0)
(t5027 0.0)
(t5028 2.0)
(t5029 0.0)
(t5030 0.0)
(t5031 0.0)
(t5032 0.0)
(t5033 0.0)
(t5034 0.0)
(t5035 0.0)
(t5036 0.0)
(t5037 0.0)
(t5038 0.0)
(t5039 0.0)
(t5040 0.0)
(t5041 0.0)
(t5042 0.0)
(t5043 (/ 99.0 2.0))
(t5044 0.0)
(t5045 0.0)
(t5046 0.0)
(t5047 0.0)
(t5048 0.0)
(t5049 0.0)
(t5050 0.0)
(t5051 0.0)
(t5052 0.0)
(t5053 0.0)
(t5054 (/ 99.0 2.0))
(t5055 0.0)
(t5056 0.0)
(t5057 (/ 99.0 2.0))
(t5058 0.0)
(t5059 0.0)
(t5060 0.0)
(t5061 0.0)
(t5062 0.0)
(t5063 0.0)
(t5064 0.0)
(t5065 0.0)
(t5066 (/ 99.0 2.0))
(t5067 0.0)
(t5068 0.0)
(t5069 0.0)
(t5070 0.0)
(t5071 0.0)
(t5072 0.0)
(t5073 0.0)
(t5074 0.0)
(t5075 0.0)
(t5076 0.0)
(t5077 0.0)
(t5078 0.0)
(t5079 0.0)
(t5080 0.0)
(t5081 (/ 99.0 2.0))
(t5082 0.0)
(t5083 0.0)
(t5084 0.0)
(t5085 0.0)
(t5086 0.0)
(t5087 0.0)
(t5088 0.0)
(t5089 0.0)
(t5090 0.0)
(t5091 0.0)
(t5092 0.0)
(t5093 0.0)
(t5094 (/ 99.0 2.0))
(t5095 0.0)
(t5096 (/ 99.0 2.0))
(t5097 0.0)
(t5098 0.0)
(t5099 0.0)
(t5100 0.0)
(t5101 0.0)
(t5102 0.0)
(t5103 0.0)
(t5104 0.0)
(t5105 0.0)
(t5106 0.0)
(t5107 (/ 99.0 2.0))
(t5108 0.0)
(t5109 0.0)
(t5110 0.0)
(t5111 0.0)
(t5112 0.0)
(t5113 0.0)
(t5114 0.0)
(t5115 0.0)
(t5116 0.0)
(t5117 (/ 99.0 2.0))
(t5118 0.0)
(t5119 0.0)
(t5120 0.0)
(t5121 0.0)
(t5122 0.0)
(t5123 0.0)
(t5124 0.0)
(t5125 0.0)
(t5126 0.0)
(t5127 0.0)
(t5128 0.0)
(t5129 0.0)
(t5130 0.0)
(t5131 0.0)
(t5132 2.0)
(t5133 0.0)
(t5134 0.0)
(t5135 0.0)
(t5136 0.0)
(t5137 2.0)
(t5138 0.0)
(t5139 0.0)
(t5140 0.0)
(t5141 0.0)
(t5142 0.0)
(t5143 2.0)
(t5144 0.0)
(t5145 0.0)
(t5146 0.0)
(t5147 0.0)
(t5148 0.0)
(t5149 0.0)
(t5150 0.0)
(t5151 0.0)
(t5152 0.0)
(t5153 0.0)
(t5154 0.0)
(t5155 0.0)
(t5156 0.0)
(t5157 0.0)
(t5158 0.0)
(t5159 0.0)
(t5160 0.0)
(t5161 0.0)
(t5162 0.0)
(t5163 0.0)
(t5164 0.0)
(t5165 (/ 91.0 2.0))
(t5166 0.0)
(t5167 0.0)
(t5168 0.0)
(t5169 0.0)
(t5170 0.0)
(t5171 0.0)
(t5172 0.0)
(t5173 0.0)
(t5174 0.0)
(t5175 0.0)
(t5176 0.0)
(t5177 0.0)
(t5178 0.0)
(t5179 0.0)
(t5180 (/ 91.0 2.0))
(t5181 0.0)
(t5182 0.0)
(t5183 0.0)
(t5184 0.0)
(t5185 0.0)
(t5186 0.0)
(t5187 0.0)
(t5188 0.0)
(t5189 0.0)
(t5190 0.0)
(t5191 0.0)
(t5192 0.0)
(t5193 0.0)
(t5194 0.0)
(t5195 0.0)
(t5196 0.0)
(t5197 0.0)
(t5198 0.0)
(t5199 0.0)
(t5200 0.0)
(t5201 0.0)
(t5202 0.0)
(t5203 0.0)
(t5204 0.0)
(t5205 0.0)
(t5206 0.0)
(t5207 0.0)
(t5208 (/ 91.0 2.0))
(t5209 0.0)
(t5210 0.0)
(t5211 0.0)
(t5212 0.0)
(t5213 0.0)
(t5214 0.0)
(t5215 (/ 91.0 2.0))
(t5216 0.0)
(t5217 0.0)
(t5218 0.0)
(t5219 0.0)
(t5220 0.0)
(t5221 0.0)
(t5222 0.0)
(t5223 0.0)
(t5224 0.0)
(t5225 0.0)
(t5226 0.0)
(t5227 0.0)
(t5228 0.0)
(t5229 0.0)
(t5230 0.0)
(t5231 0.0)
(t5232 0.0)
(t5233 0.0)
(t5234 0.0)
(t5235 0.0)
(t5236 0.0)
(t5237 0.0)
(t5238 0.0)
(t5239 0.0)
(t5240 0.0)
(t5241 0.0)
(t5242 0.0)
(t5243 0.0)
(t5244 0.0)
(t5245 0.0)
(t5246 0.0)
(t5247 0.0)
(t5248 0.0)
(t5249 0.0)
(t5250 0.0)
(t5251 (/ 91.0 2.0))
(t5252 0.0)
(t5253 0.0)
(t5254 0.0)
(t5255 0.0)
(t5256 0.0)
(t5257 0.0)
(t5258 0.0)
(t5259 0.0)
(t5260 0.0)
(t5261 0.0)
(t5262 (/ 91.0 2.0))
(t5263 0.0)
(t5264 0.0)
(t5265 0.0)
(t5266 0.0)
(t5267 0.0)
(t5268 (/ 91.0 2.0))
(t5269 0.0)
(t5270 0.0)
(t5271 0.0)
(t5272 0.0)
(t5273 0.0)
(t5274 0.0)
(t5275 0.0)
(t5276 0.0)
(t5277 0.0)
(t5278 (/ 91.0 2.0))
(t5279 0.0)
(t5280 0.0)
(t5281 0.0)
(t5282 0.0)
(t5283 0.0)
(t5284 0.0)
(t5285 0.0)
(t5286 0.0)
(t5287 0.0)
(t5288 0.0)
(t5289 0.0)
(t5290 0.0)
(t5291 2.0)
(t5292 0.0)
(t5293 0.0)
(t5294 0.0)
(t5295 0.0)
(t5296 0.0)
(t5297 2.0)
(t5298 0.0)
(t5299 0.0)
(t5300 0.0)
(t5301 0.0)
(t5302 0.0)
(t5303 0.0)
(t5304 0.0)
(t5305 0.0)
(t5306 0.0)
(t5307 0.0)
(t5308 0.0)
(t5309 0.0)
(t5310 0.0)
(t5311 2.0)
(t5312 0.0)
(t5313 0.0)
(t5314 0.0)
(t5315 0.0)
(t5316 0.0)
(t5317 0.0)
(t5318 0.0)
(t5319 0.0)
(t5320 0.0)
(t5321 0.0)
(t5322 0.0)
(t5323 0.0)
(t5324 0.0)
(t5325 0.0)
(t5326 (/ 91.0 2.0))
(t5327 0.0)
(t5328 0.0)
(t5329 0.0)
(t5330 0.0)
(t5331 0.0)
(t5332 0.0)
(t5333 0.0)
(t5334 0.0)
(t5335 0.0)
(t5336 2.0)
(t5337 2.0)
(t5338 0.0)
(t5339 0.0)
(t5340 0.0)
(t5341 0.0)
(t5342 0.0)
(t5343 0.0)
(t5344 0.0)
(t5345 0.0)
(t5346 0.0)
(t5347 0.0)
(t5348 2.0)
(t5349 0.0)
(t5350 0.0)
(t5351 0.0)
(t5352 0.0)
(t5353 0.0)
(t5354 0.0)
(t5355 0.0)
(t5356 0.0)
(t5357 2.0)
(t5358 0.0)
(t5359 0.0)
(t5360 0.0)
(t5361 0.0)
(t5362 0.0)
(t5363 0.0)
(t5364 0.0)
(t5365 0.0)
(t5366 2.0)
(t5367 0.0)
(t5368 0.0)
(t5369 0.0)
(t5370 0.0)
(t5371 0.0)
(t5372 0.0)
(t5373 0.0)
(t5374 (/ 99.0 2.0))
(t5375 0.0)
(t5376 0.0)
(t5377 0.0)
(t5378 0.0)
(t5379 (/ 99.0 2.0))
(t5380 0.0)
(t5381 0.0)
(t5382 0.0)
(t5383 0.0)
(t5384 0.0)
(t5385 0.0)
(t5386 0.0)
(t5387 0.0)
(t5388 0.0)
(t5389 0.0)
(t5390 0.0)
(t5391 (/ 91.0 2.0))
(t5392 0.0)
(t5393 (/ 99.0 2.0))
(t5394 0.0)
(t5395 0.0)
(t5396 0.0)
(t5397 0.0)
(t5398 0.0)
(t5399 0.0)
(t5400 0.0)
(t5401 0.0)
(t5402 0.0)
(t5403 0.0)
(t5404 0.0)
(t5405 0.0)
(t5406 (/ 99.0 2.0))
(t5407 0.0)
(t5408 0.0)
(t5409 0.0)
(t5410 (/ 99.0 2.0))
(t5411 0.0)
(t5412 0.0)
(t5413 0.0)
(t5414 0.0)
(t5415 0.0)
(t5416 0.0)
(t5417 0.0)
(t5418 0.0)
(t5419 0.0)
(t5420 0.0)
(t5421 0.0)
(t5422 (/ 99.0 2.0))
(t5423 0.0)
(t5424 0.0)
(t5425 0.0)
(t5426 0.0)
(t5427 0.0)
(t5428 (/ 99.0 2.0))
(t5429 0.0)
(t5430 0.0)
(t5431 0.0)
(t5432 0.0)
(t5433 0.0)
(t5434 0.0)
(t5435 0.0)
(t5436 0.0)
(t5437 2.0)
(t5438 0.0)
(t5439 0.0)
(t5440 0.0)
(t5441 0.0)
(t5442 0.0)
(t5443 2.0)
(t5444 0.0)
(t5445 0.0)
(t5446 0.0)
(t5447 0.0)
(t5448 0.0)
(t5449 0.0)
(t5450 0.0)
(t5451 0.0)
(t5452 0.0)
(t5453 0.0)
(t5454 0.0)
(t5455 0.0)
(t5456 0.0)
(t5457 0.0)
(t5458 0.0)
(t5459 0.0)
(t5460 0.0)
(t5461 0.0)
(t5462 0.0)
(t5463 0.0)
(t5464 0.0)
(t5465 2.0)
(t5466 0.0)
(t5467 0.0)
(t5468 0.0)
(t5469 0.0)
(t5470 0.0)
(t5471 0.0)
(t5472 0.0)
(t5473 0.0)
(t5474 0.0)
(t5475 0.0)
(t5476 (/ 91.0 2.0))
(t5477 0.0)
(t5478 0.0)
(t5479 0.0)
(t5480 0.0)
(t5481 0.0)
(t5482 0.0)
(t5483 2.0)
(t5484 0.0)
(t5485 0.0)
(t5486 0.0)
(t5487 0.0)
(t5488 0.0)
(t5489 0.0)
(t5490 0.0)
(t5491 0.0)
(t5492 0.0)
(t5493 0.0)
(t5494 0.0)
(t5495 (/ 91.0 2.0))
(t5496 0.0)
(t5497 0.0)
(t5498 0.0)
(t5499 0.0)
(t5500 0.0)
(t5501 0.0)
(t5502 0.0)
(t5503 0.0)
(t5504 0.0)
(t5505 0.0)
(t5506 0.0)
(t5507 0.0)
(t5508 0.0)
(t5509 0.0)
(t5510 0.0)
(t5511 0.0)
(t5512 0.0)
(t5513 0.0)
(t5514 0.0)
(t5515 0.0)
(t5516 0.0)
(t5517 0.0)
(t5518 0.0)
(t5519 0.0)
(t5520 0.0)
(t5521 0.0)
(t5522 0.0)
(t5523 0.0)
(t5524 0.0)
(t5525 0.0)
(t5526 0.0)
(t5527 0.0)
(t5528 0.0)
(t5529 0.0)
(t5530 0.0)
(t5531 0.0)
(t5532 0.0)
(t5533 0.0)
(t5534 0.0)
(t5535 0.0)
(t5536 0.0)
(t5537 0.0)
(t5538 0.0)
(t5539 0.0)
(t5540 0.0)
(t5541 0.0)
(t5542 0.0)
(t5543 0.0)
(t5544 0.0)
(t5545 0.0)
(t5546 0.0)
(t5547 0.0)
(t5548 0.0)
(t5549 0.0)
(t5550 0.0)
(t5551 0.0)
(t5552 0.0)
(t5553 0.0)
(t5554 0.0)
(t5555 0.0)
(t5556 0.0)
(t5557 0.0)
(t5558 0.0)
(t5559 0.0)
(t5560 0.0)
(t5561 0.0)
(t5562 0.0)
(t5563 0.0)
(t5564 0.0)
(t5565 0.0)
(t5566 0.0)
(t5567 0.0)
(t5568 0.0)
(t5569 0.0)
(t5570 0.0)
(t5571 0.0)
(t5572 0.0)
(t5573 (/ 91.0 2.0))
(t5574 0.0)
(t5575 0.0)
(t5576 (/ 91.0 2.0))
(t5577 0.0)
(t5578 0.0)
(t5579 0.0)
(t5580 0.0)
(t5581 0.0)
(t5582 0.0)
(t5583 0.0)
(t5584 0.0)
(t5585 0.0)
(t5586 0.0)
(t5587 0.0)
(t5588 0.0)
(t5589 0.0)
(t5590 0.0)
(t5591 0.0)
(t5592 0.0)
(t5593 0.0)
(t5594 0.0)
(t5595 0.0)
(t5596 (/ 91.0 2.0))
(t5597 0.0)
(t5598 0.0)
(t5599 2.0)
(t5600 0.0)
(t5601 0.0)
(t5602 0.0)
(t5603 0.0)
(t5604 0.0)
(t5605 0.0)
(t5606 0.0)
(t5607 0.0)
(t5608 0.0)
(t5609 0.0)
(t5610 0.0)
(t5611 0.0)
(t5612 2.0)
(t5613 0.0)
(t5614 0.0)
(t5615 0.0)
(t5616 0.0)
(t5617 0.0)
(t5618 0.0)
(t5619 2.0)
(t5620 0.0)
(t5621 0.0)
(t5622 0.0)
(t5623 0.0)
(t5624 0.0)
(t5625 0.0)
(t5626 0.0)
(t5627 0.0)
(t5628 0.0)
(t5629 0.0)
(t5630 0.0)
(t5631 (/ 91.0 2.0))
(t5632 0.0)
(t5633 0.0)
(t5634 0.0)
(t5635 0.0)
(t5636 0.0)
(t5637 0.0)
(t5638 0.0)
(t5639 0.0)
(t5640 (/ 91.0 2.0))
(t5641 0.0)
(t5642 0.0)
(t5643 0.0)
(t5644 0.0)
(t5645 0.0)
(t5646 0.0)
(t5647 0.0)
(t5648 0.0)
(t5649 0.0)
(t5650 0.0)
(t5651 0.0)
(t5652 0.0)
(t5653 0.0)
(t5654 0.0)
(t5655 0.0)
(t5656 2.0)
(t5657 0.0)
(t5658 0.0)
(t5659 0.0)
(t5660 0.0)
(t5661 2.0)
(t5662 0.0)
(t5663 0.0)
(t5664 0.0)
(t5665 0.0)
(t5666 0.0)
(t5667 2.0)
(t5668 0.0)
(t5669 0.0)
(t5670 0.0)
(t5671 0.0)
(t5672 0.0)
(t5673 0.0)
(t5674 0.0)
(t5675 0.0)
(t5676 0.0)
(t5677 0.0)
(t5678 0.0)
(t5679 (/ 99.0 2.0))
(t5680 0.0)
(t5681 0.0)
(t5682 0.0)
(t5683 0.0)
(t5684 0.0)
(t5685 (/ 99.0 2.0))
(t5686 0.0)
(t5687 0.0)
(t5688 0.0)
(t5689 0.0)
(t5690 0.0)
(t5691 0.0)
(t5692 0.0)
(t5693 0.0)
(t5694 0.0)
(t5695 0.0)
(t5696 2.0)
(t5697 0.0)
(t5698 0.0)
(t5699 0.0)
(t5700 0.0)
(t5701 0.0)
(t5702 0.0)
(t5703 (/ 91.0 2.0))
(t5704 0.0)
(t5705 0.0)
(t5706 0.0)
(t5707 0.0)
(t5708 (/ 99.0 2.0))
(t5709 0.0)
(t5710 0.0)
(t5711 0.0)
(t5712 0.0)
(t5713 0.0)
(t5714 0.0)
(t5715 0.0)
(t5716 0.0)
(t5717 0.0)
(t5718 0.0)
(t5719 0.0)
(t5720 0.0)
(t5721 0.0)
(t5722 2.0)
(t5723 (/ 99.0 2.0))
(t5724 0.0)
(t5725 0.0)
(t5726 0.0)
(t5727 0.0)
(t5728 0.0)
(t5729 0.0)
(t5730 0.0)
(t5731 0.0)
(t5732 0.0)
(t5733 0.0)
(t5734 0.0)
(t5735 0.0)
(t5736 0.0)
(t5737 0.0)
(t5738 0.0)
(t5739 0.0)
(t5740 0.0)
(t5741 0.0)
(t5742 0.0)
(t5743 0.0)
(t5744 0.0)
(t5745 0.0)
(t5746 0.0)
(t5747 0.0)
(t5748 0.0)
(t5749 0.0)
(t5750 0.0)
(t5751 0.0)
(t5752 0.0)
(t5753 0.0)
(t5754 0.0)
(t5755 0.0)
(t5756 0.0)
(t5757 0.0)
(t5758 0.0)
(t5759 0.0)
(t5760 0.0)
(t5761 0.0)
(t5762 0.0)
(t5763 0.0)
(t5764 0.0)
(t5765 0.0)
(t5766 0.0)
(t5767 0.0)
(t5768 0.0)
(t5769 0.0)
(t5770 0.0)
(t5771 0.0)
(t5772 0.0)
(t5773 0.0)
(t5774 0.0)
(t5775 0.0)
(t5776 0.0)
(t5777 0.0)
(t5778 0.0)
(t5779 0.0)
(t5780 0.0)
(t5781 0.0)
(t5782 0.0)
(t5783 0.0)
(t5784 0.0)
(t5785 0.0)
(t5786 0.0)
(t5787 0.0)
(t5788 0.0)
(t5789 0.0)
(t5790 0.0)
(t5791 0.0)
(t5792 0.0)
(t5793 0.0)
(t5794 0.0)
(t5795 0.0)
(t5796 2.0)
(t5797 0.0)
(t5798 0.0)
(t5799 0.0)
(t5800 0.0)
(t5801 0.0)
(t5802 (/ 91.0 2.0))
(t5803 0.0)
(t5804 0.0)
(t5805 0.0)
(t5806 0.0)
(t5807 0.0)
(t5808 0.0)
(t5809 0.0)
(t5810 0.0)
(t5811 0.0)
(t5812 0.0)
(t5813 0.0)
(t5814 0.0)
(t5815 0.0)
(t5816 0.0)
(t5817 0.0)
(t5818 0.0)
(t5819 0.0)
(t5820 0.0)
(t5821 0.0)
(t5822 0.0)
(t5823 0.0)
(t5824 0.0)
(t5825 0.0)
(t5826 0.0)
(t5827 0.0)
(t5828 0.0)
(t5829 0.0)
(t5830 0.0)
(t5831 0.0)
(t5832 0.0)
(t5833 0.0)
(t5834 0.0)
(t5835 0.0)
(t5836 0.0)
(t5837 0.0)
(t5838 0.0)
(t5839 0.0)
(t5840 0.0)
(t5841 0.0)
(t5842 0.0)
(t5843 0.0)
(t5844 0.0)
(t5845 0.0)
(t5846 0.0)
(t5847 0.0)
(t5848 0.0)
(t5849 0.0)
(t5850 0.0)
(t5851 0.0)
(t5852 0.0)
(t5853 0.0)
(t5854 0.0)
(t5855 0.0)
(t5856 0.0)
(t5857 0.0)
(t5858 0.0)
(t5859 0.0)
(t5860 0.0)
(t5861 0.0)
(t5862 0.0)
(t5863 0.0)
(t5864 0.0)
(t5865 0.0)
(t5866 0.0)
(t5867 0.0)
(t5868 0.0)
(t5869 0.0)
(t5870 0.0)
(t5871 0.0)
(t5872 0.0)
(t5873 0.0)
(t5874 0.0)
(t5875 0.0)
(t5876 0.0)
(t5877 0.0)
(t5878 0.0)
(t5879 0.0)
(t5880 0.0)
(t5881 0.0)
(t5882 0.0)
(t5883 0.0)
(t5884 0.0)
(t5885 0.0)
(t5886 0.0)
(t5887 0.0)
(t5888 0.0)
(t5889 0.0)
(t5890 0.0)
(t5891 0.0)
(t5892 0.0)
(t5893 (/ 91.0 2.0))
(t5894 0.0)
(t5895 0.0)
(t5896 (/ 91.0 2.0))
(t5897 0.0)
(t5898 0.0)
(t5899 0.0)
(t5900 0.0)
(t5901 0.0)
(t5902 0.0)
(t5903 0.0)
(t5904 0.0)
(t5905 0.0)
(t5906 0.0)
(t5907 0.0)
(t5908 0.0)
(t5909 0.0)
(t5910 0.0)
(t5911 (/ 91.0 2.0))
(t5912 (/ 91.0 2.0))
(t5913 0.0)
(t5914 0.0)
(t5915 0.0)
(t5916 0.0)
(t5917 0.0)
(t5918 0.0)
(t5919 0.0)
(t5920 0.0)
(t5921 0.0)
(t5922 0.0)
(t5923 0.0)
(t5924 0.0)
(t5925 0.0)
(t5926 0.0)
(t5927 2.0)
(t5928 0.0)
(t5929 0.0)
(t5930 0.0)
(t5931 0.0)
(t5932 0.0)
(t5933 0.0)
(t5934 0.0)
(t5935 0.0)
(t5936 0.0)
(t5937 0.0)
(t5938 (/ 91.0 2.0))
(t5939 0.0)
(t5940 0.0)
(t5941 0.0)
(t5942 0.0)
(t5943 0.0)
(t5944 (/ 91.0 2.0))
(t5945 0.0)
(t5946 0.0)
(t5947 0.0)
(t5948 0.0)
(t5949 0.0)
(t5950 0.0)
(t5951 0.0)
(t5952 0.0)
(t5953 0.0)
(t5954 0.0)
(t5955 0.0)
(t5956 0.0)
(t5957 0.0)
(t5958 0.0)
(t5959 0.0)
(t5960 0.0)
(t5961 0.0)
(t5962 0.0)
(t5963 2.0)
(t5964 0.0)
(t5965 0.0)
(t5966 0.0)
(t5967 2.0)
(t5968 0.0)
(t5969 0.0)
(t5970 0.0)
(t5971 0.0)
(t5972 0.0)
(t5973 0.0)
(t5974 0.0)
(t5975 0.0)
(t5976 0.0)
(t5977 0.0)
(t5978 0.0)
(t5979 0.0)
(t5980 2.0)
(t5981 0.0)
(t5982 0.0)
(t5983 0.0)
(t5984 0.0)
(t5985 0.0)
(t5986 0.0)
(t5987 0.0)
(t5988 0.0)
(t5989 0.0)
(t5990 0.0)
(t5991 0.0)
(t5992 0.0)
(t5993 0.0)
(t5994 0.0)
(t5995 0.0)
(t5996 0.0)
(t5997 0.0)
(t5998 0.0)
(t5999 0.0)
(t6000 0.0)
(t6001 0.0)
(t6002 0.0)
(t6003 0.0)
(t6004 2.0)
(t6005 0.0)
(t6006 2.0)
(t6007 0.0)
(t6008 0.0)
(t6009 0.0)
(t6010 0.0)
(t6011 0.0)
(t6012 0.0)
(t6013 0.0)
(t6014 0.0)
(t6015 0.0)
(t6016 0.0)
(t6017 0.0)
(t6018 0.0)
(t6019 0.0)
(t6020 0.0)
(t6021 0.0)
(t6022 0.0)
(t6023 0.0)
(t6024 0.0)
(t6025 0.0)
(t6026 0.0)
(t6027 0.0)
(t6028 0.0)
(t6029 0.0)
(t6030 2.0)
(t6031 0.0)
(t6032 0.0)
(t6033 0.0)
(t6034 0.0)
(t6035 0.0)
(t6036 0.0)
(t6037 0.0)
(t6038 0.0)
(t6039 0.0)
(t6040 0.0)
(t6041 2.0)
(t6042 0.0)
(t6043 0.0)
(t6044 0.0)
(t6045 0.0)
(t6046 0.0)
(t6047 0.0)
(t6048 0.0)
(t6049 0.0)
(t6050 2.0)
(t6051 0.0)
(t6052 0.0)
(t6053 0.0)
(t6054 0.0)
(t6055 0.0)
(t6056 0.0)
(t6057 0.0)
(t6058 0.0)
(t6059 0.0)
(t6060 0.0)
(t6061 0.0)
(t6062 0.0)
(t6063 0.0)
(t6064 0.0)
(t6065 0.0)
(t6066 0.0)
(t6067 0.0)
(t6068 0.0)
(t6069 0.0)
(t6070 0.0)
(t6071 0.0)
(t6072 0.0)
(t6073 0.0)
(t6074 0.0)
(t6075 0.0)
(t6076 0.0)
(t6077 0.0)
(t6078 0.0)
(t6079 0.0)
(t6080 0.0)
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(t6082 0.0)
(t6083 0.0)
(t6084 0.0)
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(t6088 0.0)
(t6089 0.0)
(t6090 0.0)
(t6091 0.0)
(t6092 0.0)
(t6093 0.0)
(t6094 0.0)
(t6095 2.0)
(t6096 0.0)
(t6097 0.0)
(t6098 0.0)
(t6099 0.0)
(t6100 0.0)
(t6101 0.0)
(t6102 0.0)
(t6103 (/ 91.0 2.0))
(t6104 0.0)
(t6105 0.0)
(t6106 0.0)
(t6107 0.0)
(t6108 0.0)
(t6109 0.0)
(t6110 0.0)
(t6111 0.0)
(t6112 0.0)
(t6113 0.0)
(t6114 0.0)
(t6115 0.0)
(t6116 0.0)
(t6117 0.0)
(t6118 0.0)
(t6119 0.0)
(t6120 0.0)
(t6121 0.0)
(t6122 0.0)
(t6123 0.0)
(t6124 0.0)
(t6125 0.0)
(t6126 0.0)
(t6127 0.0)
(t6128 0.0)
(t6129 0.0)
(t6130 0.0)
(t6131 0.0)
(t6132 0.0)
(t6133 0.0)
(t6134 0.0)
(t6135 0.0)
(t6136 0.0)
(t6137 0.0)
(t6138 0.0)
(t6139 0.0)
(t6140 0.0)
(t6141 0.0)
(t6142 0.0)
(t6143 0.0)
(t6144 0.0)
(t6145 0.0)
(t6146 0.0)
(t6147 0.0)
(t6148 0.0)
(t6149 0.0)
(t6150 0.0)
(t6151 0.0)
(t6152 0.0)
(t6153 0.0)
(t6154 0.0)
(t6155 0.0)
(t6156 0.0)
(t6157 0.0)
(t6158 0.0)
(t6159 0.0)
(t6160 0.0)
(t6161 0.0)
(t6162 0.0)
(t6163 0.0)
(t6164 0.0)
(t6165 0.0)
(t6166 0.0)
(t6167 0.0)
(t6168 0.0)
(t6169 0.0)
(t6170 0.0)
(t6171 0.0)
(t6172 0.0)
(t6173 0.0)
(t6174 0.0)
(t6175 0.0)
(t6176 0.0)
(t6177 0.0)
(t6178 0.0)
(t6179 0.0)
(t6180 0.0)
(t6181 0.0)
(t6182 0.0)
(t6183 0.0)
(t6184 0.0)
(t6185 0.0)
(t6186 0.0)
(t6187 0.0)
(t6188 0.0)
(t6189 0.0)
(t6190 0.0)
(t6191 0.0)
(t6192 0.0)
(t6193 0.0)
(t6194 0.0)
(t6195 0.0)
(t6196 0.0)
(t6197 0.0)
(t6198 0.0)
(t6199 (/ 91.0 2.0))
(t6200 0.0)
(t6201 0.0)
(t6202 0.0)
(t6203 0.0)
(t6204 (/ 91.0 2.0))
(t6205 0.0)
(t6206 0.0)
(t6207 0.0)
(t6208 0.0)
(t6209 0.0)
(t6210 0.0)
(t6211 0.0)
(t6212 0.0)
(t6213 0.0)
(t6214 0.0)
(t6215 0.0)
(t6216 0.0)
(t6217 0.0)
(t6218 0.0)
(t6219 0.0)
(t6220 0.0)
(t6221 0.0)
(t6222 0.0)
(t6223 (/ 91.0 2.0))
(t6224 0.0)
(t6225 0.0)
(t6226 0.0)
(t6227 0.0)
(t6228 0.0)
(t6229 (/ 91.0 2.0))
(t6230 0.0)
(t6231 0.0)
(t6232 0.0)
(t6233 0.0)
(t6234 (/ 91.0 2.0))
(t6235 0.0)
(t6236 0.0)
(t6237 0.0)
(t6238 0.0)
(t6239 0.0)
(t6240 0.0)
(t6241 0.0)
(t6242 0.0)
(t6243 0.0)
(t6244 0.0)
(t6245 0.0)
(t6246 0.0)
(t6247 0.0)
(t6248 0.0)
(t6249 0.0)
(t6250 0.0)
(t6251 0.0)
(t6252 2.0)
(t6253 0.0)
(t6254 0.0)
(t6255 0.0)
(t6256 0.0)
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org.smtlib.IParser$ParserException: Unbalanced parentheses at end of input")
After SMT solving in domain Real declared 13924/13924 variables, and 1601 constraints, problems are : Problem set: 0 solved, 4 unsolved in 5040 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, State Equation: 1600/1600 constraints, PredecessorRefiner: 4/4 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 4 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/3 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 1 (OVERLAPS) 1597/1600 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/1600 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 3 (OVERLAPS) 12324/13924 variables, 1600/1601 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/13924 variables, 4/1605 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/13924 variables, 0/1605 constraints. Problems are: Problem set: 0 solved, 4 unsolved
At refinement iteration 6 (OVERLAPS) 0/13924 variables, 0/1605 constraints. Problems are: Problem set: 0 solved, 4 unsolved
No progress, stopping.
After SMT solving in domain Int declared 13924/13924 variables, and 1605 constraints, problems are : Problem set: 0 solved, 4 unsolved in 5022 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, State Equation: 1600/1600 constraints, PredecessorRefiner: 4/4 constraints, Known Traps: 0/0 constraints]
After SMT, in 10085ms problems are : Problem set: 0 solved, 4 unsolved
Fused 4 Parikh solutions to 3 different solutions.
Finished Parikh walk after 33044 steps, including 0 resets, run visited all 4 properties in 368 ms. (steps per millisecond=89 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished Parikh walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Parikh walk visited 4 properties in 377 ms.
Knowledge obtained : [(AND (NOT p0) p2 p1), (X p2), (X (NOT (AND (NOT p2) p0 p1))), (X (NOT p0)), (X p1), (X (NOT (AND (NOT p2) (NOT p0)))), (X (X p2)), (X (X (NOT (AND (NOT p2) p1)))), (X (X (NOT (AND (NOT p2) p0 (NOT p1))))), (X (X (NOT (AND (NOT p2) p0 p1)))), (X (X (NOT (AND (NOT p2) (NOT p0) (NOT p1))))), (X (X (NOT p0))), (X (X p1)), (X (X (NOT (AND (NOT p2) (NOT p0)))))]
False Knowledge obtained : [(F (NOT (OR p2 p0 p1))), (F (NOT (OR p2 (NOT p0) (NOT p1)))), (F (NOT p1)), (F p0), (F (NOT p2)), (F (NOT (OR p2 (NOT p0) p1))), (F (NOT (OR p2 (NOT p1)))), (F (NOT (OR p2 p0)))]
Knowledge based reduction with 14 factoid took 402 ms. Reduced automaton from 5 states, 11 edges and 3 AP (stutter sensitive) to 5 states, 11 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 224 ms :[(AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p1) (NOT p2)), (OR p0 (AND (NOT p1) (NOT p2)))]
Stuttering acceptance computed with spot in 217 ms :[(AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p1) (NOT p2)), (OR p0 (AND (NOT p1) (NOT p2)))]
Stuttering acceptance computed with spot in 204 ms :[(AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p1) (NOT p2)), (OR p0 (AND (NOT p1) (NOT p2)))]
Product exploration explored 100000 steps with 33394 reset in 719 ms.
Product exploration explored 100000 steps with 33323 reset in 722 ms.
Support contains 3 out of 1600 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Applied a total of 0 rules in 153 ms. Remains 1600 /1600 variables (removed 0) and now considering 12324/12324 (removed 0) transitions.
[2024-05-31 21:17:44] [INFO ] Invariant cache hit.
[2024-05-31 21:17:45] [INFO ] Implicit Places using invariants in 192 ms returned []
Implicit Place search using SMT only with invariants took 194 ms to find 0 implicit places.
Running 12316 sub problems to find dead transitions.
[2024-05-31 21:17:45] [INFO ] Invariant cache hit.
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 1599/13924 variables, and 0 constraints, problems are : Problem set: 0 solved, 12316 unsolved in 30146 ms.
Refiners :[Positive P Invariants (semi-flows): 0/1 constraints, State Equation: 0/1600 constraints, PredecessorRefiner: 12316/12316 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 12316 unsolved
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 1599/13924 variables, and 0 constraints, problems are : Problem set: 0 solved, 12316 unsolved in 30149 ms.
Refiners :[Positive P Invariants (semi-flows): 0/1 constraints, State Equation: 0/1600 constraints, PredecessorRefiner: 0/12316 constraints, Known Traps: 0/0 constraints]
After SMT, in 75394ms problems are : Problem set: 0 solved, 12316 unsolved
Search for dead transitions found 0 dead transitions in 75486ms
Finished structural reductions in LTL mode , in 1 iterations and 75850 ms. Remains : 1600/1600 places, 12324/12324 transitions.
Treatment of property Diffusion2D-PT-D40N050-LTLCardinality-10 finished in 257353 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G((p0||(G(p0) U X(G((p1&&X(p2))))))))'
Support contains 5 out of 1600 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Applied a total of 0 rules in 141 ms. Remains 1600 /1600 variables (removed 0) and now considering 12324/12324 (removed 0) transitions.
[2024-05-31 21:19:01] [INFO ] Invariant cache hit.
[2024-05-31 21:19:01] [INFO ] Implicit Places using invariants in 167 ms returned []
Implicit Place search using SMT only with invariants took 168 ms to find 0 implicit places.
Running 12316 sub problems to find dead transitions.
[2024-05-31 21:19:01] [INFO ] Invariant cache hit.
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 1599/13924 variables, and 0 constraints, problems are : Problem set: 0 solved, 12316 unsolved in 30134 ms.
Refiners :[Positive P Invariants (semi-flows): 0/1 constraints, State Equation: 0/1600 constraints, PredecessorRefiner: 12316/12316 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 12316 unsolved
Error getting values : (error "ParserException while parsing response: (timeout
org.smtlib.IParser$ParserException: Unbalanced parentheses at end of input")
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 1599/13924 variables, and 0 constraints, problems are : Problem set: 0 solved, 12316 unsolved in 30147 ms.
Refiners :[Positive P Invariants (semi-flows): 0/1 constraints, State Equation: 0/1600 constraints, PredecessorRefiner: 0/12316 constraints, Known Traps: 0/0 constraints]
After SMT, in 75947ms problems are : Problem set: 0 solved, 12316 unsolved
Search for dead transitions found 0 dead transitions in 76061ms
Finished structural reductions in LTL mode , in 1 iterations and 76384 ms. Remains : 1600/1600 places, 12324/12324 transitions.
Stuttering acceptance computed with spot in 117 ms :[true, (OR (AND (NOT p0) (NOT p1)) (AND (NOT p0) (NOT p2))), (OR (NOT p1) (NOT p2)), (OR (NOT p2) (NOT p1))]
Running random walk in product with property : Diffusion2D-PT-D40N050-LTLCardinality-11
Entered a terminal (fully accepting) state of product in 806 steps with 0 reset in 12 ms.
FORMULA Diffusion2D-PT-D40N050-LTLCardinality-11 FALSE TECHNIQUES STUTTER_TEST
Treatment of property Diffusion2D-PT-D40N050-LTLCardinality-11 finished in 76551 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(G(p0)))'
Support contains 2 out of 1600 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Graph (trivial) has 12292 edges and 1600 vertex of which 1598 / 1600 are part of one of the 1 SCC in 5 ms
Free SCC test removed 1597 places
Ensure Unique test removed 12319 transitions
Reduce isomorphic transitions removed 12319 transitions.
Applied a total of 1 rules in 14 ms. Remains 3 /1600 variables (removed 1597) and now considering 5/12324 (removed 12319) transitions.
// Phase 1: matrix 5 rows 3 cols
[2024-05-31 21:20:17] [INFO ] Computed 1 invariants in 0 ms
[2024-05-31 21:20:17] [INFO ] Implicit Places using invariants in 13 ms returned []
[2024-05-31 21:20:17] [INFO ] Invariant cache hit.
[2024-05-31 21:20:17] [INFO ] Implicit Places using invariants and state equation in 18 ms returned []
Implicit Place search using SMT with State Equation took 35 ms to find 0 implicit places.
[2024-05-31 21:20:17] [INFO ] Redundant transitions in 0 ms returned []
Running 2 sub problems to find dead transitions.
[2024-05-31 21:20:17] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/2 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 1 (OVERLAPS) 1/3 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/3 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 3 (OVERLAPS) 4/7 variables, 3/4 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/7 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 5 (OVERLAPS) 0/7 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 2 unsolved
No progress, stopping.
After SMT solving in domain Real declared 7/8 variables, and 4 constraints, problems are : Problem set: 0 solved, 2 unsolved in 18 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, State Equation: 3/3 constraints, PredecessorRefiner: 2/2 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 2 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/2 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 1 (OVERLAPS) 1/3 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/3 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 3 (OVERLAPS) 4/7 variables, 3/4 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/7 variables, 2/6 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/7 variables, 0/6 constraints. Problems are: Problem set: 0 solved, 2 unsolved
At refinement iteration 6 (OVERLAPS) 0/7 variables, 0/6 constraints. Problems are: Problem set: 0 solved, 2 unsolved
No progress, stopping.
After SMT solving in domain Int declared 7/8 variables, and 6 constraints, problems are : Problem set: 0 solved, 2 unsolved in 19 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, State Equation: 3/3 constraints, PredecessorRefiner: 2/2 constraints, Known Traps: 0/0 constraints]
After SMT, in 68ms problems are : Problem set: 0 solved, 2 unsolved
Search for dead transitions found 0 dead transitions in 68ms
Starting structural reductions in SI_LTL mode, iteration 1 : 3/1600 places, 5/12324 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 120 ms. Remains : 3/1600 places, 5/12324 transitions.
Stuttering acceptance computed with spot in 27 ms :[(NOT p0)]
Running random walk in product with property : Diffusion2D-PT-D40N050-LTLCardinality-13
Stuttering criterion allowed to conclude after 2 steps with 0 reset in 0 ms.
FORMULA Diffusion2D-PT-D40N050-LTLCardinality-13 FALSE TECHNIQUES STUTTER_TEST
Treatment of property Diffusion2D-PT-D40N050-LTLCardinality-13 finished in 164 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(((p0&&G(p1)) U (p2||F(p3)))))'
Support contains 6 out of 1600 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Applied a total of 0 rules in 146 ms. Remains 1600 /1600 variables (removed 0) and now considering 12324/12324 (removed 0) transitions.
// Phase 1: matrix 12324 rows 1600 cols
[2024-05-31 21:20:17] [INFO ] Computed 1 invariants in 67 ms
[2024-05-31 21:20:18] [INFO ] Implicit Places using invariants in 231 ms returned []
Implicit Place search using SMT only with invariants took 233 ms to find 0 implicit places.
Running 12316 sub problems to find dead transitions.
[2024-05-31 21:20:18] [INFO ] Invariant cache hit.
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 1599/13924 variables, and 0 constraints, problems are : Problem set: 0 solved, 12316 unsolved in 30137 ms.
Refiners :[Positive P Invariants (semi-flows): 0/1 constraints, State Equation: 0/1600 constraints, PredecessorRefiner: 12316/12316 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 12316 unsolved
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 1599/13924 variables, and 0 constraints, problems are : Problem set: 0 solved, 12316 unsolved in 30135 ms.
Refiners :[Positive P Invariants (semi-flows): 0/1 constraints, State Equation: 0/1600 constraints, PredecessorRefiner: 0/12316 constraints, Known Traps: 0/0 constraints]
After SMT, in 75684ms problems are : Problem set: 0 solved, 12316 unsolved
Search for dead transitions found 0 dead transitions in 75774ms
Finished structural reductions in LTL mode , in 1 iterations and 76169 ms. Remains : 1600/1600 places, 12324/12324 transitions.
Stuttering acceptance computed with spot in 158 ms :[(AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (NOT p3), (AND (NOT p3) (NOT p1))]
Running random walk in product with property : Diffusion2D-PT-D40N050-LTLCardinality-14
Product exploration explored 100000 steps with 50000 reset in 905 ms.
Product exploration explored 100000 steps with 50000 reset in 906 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND p2 p3 p0 p1), (X p2), (X p3), (X (NOT (OR (AND (NOT p2) (NOT p3) (NOT p0)) (AND (NOT p2) (NOT p3) (NOT p1))))), (X (NOT (AND (NOT p2) (NOT p3) p0 p1))), (X p0), (X p1), (X (X p2)), (X (X p3)), (X (X (NOT (OR (AND (NOT p2) (NOT p3) (NOT p0)) (AND (NOT p2) (NOT p3) (NOT p1)))))), (X (X (NOT (AND (NOT p2) (NOT p3) p0 p1)))), (X (X (NOT (AND (NOT p3) p1)))), (X (X p0)), (X (X p1)), (X (X (NOT (AND (NOT p3) (NOT p1)))))]
False Knowledge obtained : []
Property proved to be true thanks to knowledge (Minato strategy)
Knowledge based reduction with 15 factoid took 17 ms. Reduced automaton from 4 states, 7 edges and 4 AP (stutter sensitive) to 1 states, 0 edges and 0 AP (stutter insensitive).
FORMULA Diffusion2D-PT-D40N050-LTLCardinality-14 TRUE TECHNIQUES KNOWLEDGE
Treatment of property Diffusion2D-PT-D40N050-LTLCardinality-14 finished in 78206 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G((X(G(p0))||F((!p0&&X((p1 U (p2||G(p1)))))))))'
[2024-05-31 21:21:36] [INFO ] Flatten gal took : 179 ms
[2024-05-31 21:21:36] [INFO ] Export to MCC of 1 properties in file /home/mcc/execution/LTLCardinality.sr.xml took 1 ms.
[2024-05-31 21:21:36] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 1600 places, 12324 transitions and 24648 arcs took 32 ms.
Total runtime 892937 ms.
There are residual formulas that ITS could not solve within timeout
FORMULA Diffusion2D-PT-D40N050-LTLCardinality-10 FALSE TECHNIQUES EXPLICIT PARALLEL_PROCESSING USE_NUPN

BK_STOP 1717190591835

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination LTLCardinality -timeout 360 -rebuildPNML
mcc2024
ltl formula name Diffusion2D-PT-D40N050-LTLCardinality-10
ltl formula formula --ltl=/tmp/1199/ltl_0_
pnml2lts-mc( 0/ 4): Loading model from model.pnml
pnml2lts-mc( 0/ 4): Edge label is id
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
Warning: program compiled against libxml 210 using older 209
pnml2lts-mc( 0/ 4): Petri net has 1600 places, 12324 transitions and 24648 arcs
pnml2lts-mc( 0/ 4): Petri net Petri analyzed
pnml2lts-mc( 0/ 4): There are no safe places
pnml2lts-mc( 0/ 4): Loading Petri net took 1.140 real 0.360 user 0.380 sys
pnml2lts-mc( 1/ 4): LTL layer: formula: /tmp/1199/ltl_0_
pnml2lts-mc( 3/ 4): LTL layer: formula: /tmp/1199/ltl_0_
pnml2lts-mc( 0/ 4): LTL layer: formula: /tmp/1199/ltl_0_
pnml2lts-mc( 2/ 4): LTL layer: formula: /tmp/1199/ltl_0_
pnml2lts-mc( 0/ 4): buchi has 6 states
pnml2lts-mc( 0/ 4): There are 1601 state labels and 1 edge labels
pnml2lts-mc( 0/ 4): State length is 1601, there are 12339 groups
pnml2lts-mc( 0/ 4): Running ufscc using 4 cores
pnml2lts-mc( 0/ 4): Using a tree table with 2^25 elements
pnml2lts-mc( 0/ 4): Successor permutation: dynamic
pnml2lts-mc( 0/ 4): Global bits: 0, count bits: 0, local bits: 0
pnml2lts-mc( 3/ 4): ~1251 levels ~10000 states ~225028 transitions
pnml2lts-mc( 3/ 4): ~2501 levels ~20000 states ~532804 transitions
pnml2lts-mc( 2/ 4): ~5001 levels ~40000 states ~1387764 transitions
pnml2lts-mc( 2/ 4): ~10001 levels ~80000 states ~2948852 transitions
pnml2lts-mc( 2/ 4): ~20001 levels ~160000 states ~5279596 transitions
pnml2lts-mc( 3/ 4):
pnml2lts-mc( 3/ 4): Accepting cycle FOUND at depth ~19950!
pnml2lts-mc( 3/ 4):
pnml2lts-mc( 0/ 4):
pnml2lts-mc( 0/ 4): total scc count: 80018
pnml2lts-mc( 0/ 4): unique states count: 159961
pnml2lts-mc( 0/ 4): unique transitions count: 6190588
pnml2lts-mc( 0/ 4): - self-loop count: 0
pnml2lts-mc( 0/ 4): - claim dead count: 279203
pnml2lts-mc( 0/ 4): - claim found count: 279213
pnml2lts-mc( 0/ 4): - claim success count: 159966
pnml2lts-mc( 0/ 4): - cum. max stack depth: 79947
pnml2lts-mc( 0/ 4):
pnml2lts-mc( 0/ 4): Explored 159966 states 6190672 transitions, fanout: 38.700
pnml2lts-mc( 0/ 4): Total exploration time 92.120 sec (92.120 sec minimum, 92.120 sec on average)
pnml2lts-mc( 0/ 4): States per second: 1736, Transitions per second: 67202
pnml2lts-mc( 0/ 4):
pnml2lts-mc( 0/ 4): Queue width: 12B, total height: 0, memory: 0.00MB
pnml2lts-mc( 0/ 4): Tree memory: 58.2MB, 14.9 B/state, compr.: 0.2%
pnml2lts-mc( 0/ 4): Tree fill ratio (roots/leafs): 12.0%/42.0%
pnml2lts-mc( 0/ 4): Stored 12575 string chucks using 0MB
pnml2lts-mc( 0/ 4): Total memory used for chunk indexing: 0MB
pnml2lts-mc( 0/ 4): Est. total memory use: 58.2MB (~256.0MB paged-in)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Diffusion2D-PT-D40N050"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is Diffusion2D-PT-D40N050, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r488-tall-171631132400307"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Diffusion2D-PT-D40N050.tgz
mv Diffusion2D-PT-D40N050 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;