fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r488-tall-171631131900098
Last Updated
July 7, 2024

About the Execution of LTSMin+red for Dekker-PT-020

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
459.079 5168.00 14487.00 39.80 ???????T???????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r488-tall-171631131900098.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is Dekker-PT-020, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r488-tall-171631131900098
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 804K
-rw-r--r-- 1 mcc users 7.5K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 78K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.4K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 51K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Apr 22 14:39 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Apr 22 14:39 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Apr 22 14:39 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 22 14:39 LTLFireability.xml
-rw-r--r-- 1 mcc users 17K Apr 11 20:14 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 175K Apr 11 20:14 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Apr 11 20:12 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 97K Apr 11 20:12 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:39 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:39 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 247K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Dekker-PT-020-CTLFireability-2024-00
FORMULA_NAME Dekker-PT-020-CTLFireability-2024-01
FORMULA_NAME Dekker-PT-020-CTLFireability-2024-02
FORMULA_NAME Dekker-PT-020-CTLFireability-2024-03
FORMULA_NAME Dekker-PT-020-CTLFireability-2024-04
FORMULA_NAME Dekker-PT-020-CTLFireability-2024-05
FORMULA_NAME Dekker-PT-020-CTLFireability-2024-06
FORMULA_NAME Dekker-PT-020-CTLFireability-2024-07
FORMULA_NAME Dekker-PT-020-CTLFireability-2024-08
FORMULA_NAME Dekker-PT-020-CTLFireability-2024-09
FORMULA_NAME Dekker-PT-020-CTLFireability-2024-10
FORMULA_NAME Dekker-PT-020-CTLFireability-2024-11
FORMULA_NAME Dekker-PT-020-CTLFireability-2023-12
FORMULA_NAME Dekker-PT-020-CTLFireability-2023-13
FORMULA_NAME Dekker-PT-020-CTLFireability-2023-14
FORMULA_NAME Dekker-PT-020-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717184817126

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Dekker-PT-020
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-05-31 19:46:58] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-05-31 19:46:58] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-31 19:46:58] [INFO ] Load time of PNML (sax parser for PT used): 98 ms
[2024-05-31 19:46:58] [INFO ] Transformed 100 places.
[2024-05-31 19:46:58] [INFO ] Transformed 440 transitions.
[2024-05-31 19:46:58] [INFO ] Found NUPN structural information;
[2024-05-31 19:46:58] [INFO ] Parsed PT model containing 100 places and 440 transitions and 3240 arcs in 200 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 13 ms.
Support contains 70 out of 100 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 100/100 places, 440/440 transitions.
Applied a total of 0 rules in 15 ms. Remains 100 /100 variables (removed 0) and now considering 440/440 (removed 0) transitions.
[2024-05-31 19:46:58] [INFO ] Flow matrix only has 80 transitions (discarded 360 similar events)
// Phase 1: matrix 80 rows 100 cols
[2024-05-31 19:46:58] [INFO ] Computed 60 invariants in 8 ms
[2024-05-31 19:46:58] [INFO ] Implicit Places using invariants in 268 ms returned [40, 43, 46, 52, 58, 61, 64, 67, 73, 76, 79, 82, 85, 88, 91, 94, 97]
Discarding 17 places :
Implicit Place search using SMT only with invariants took 300 ms to find 17 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 83/100 places, 440/440 transitions.
Applied a total of 0 rules in 5 ms. Remains 83 /83 variables (removed 0) and now considering 440/440 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 337 ms. Remains : 83/100 places, 440/440 transitions.
Support contains 70 out of 83 places after structural reductions.
[2024-05-31 19:46:59] [INFO ] Flatten gal took : 67 ms
[2024-05-31 19:46:59] [INFO ] Flatten gal took : 43 ms
[2024-05-31 19:46:59] [INFO ] Input system was already deterministic with 440 transitions.
Reduction of identical properties reduced properties to check from 85 to 82
RANDOM walk for 40000 steps (8 resets) in 2014 ms. (19 steps per ms) remains 12/82 properties
BEST_FIRST walk for 40004 steps (8 resets) in 142 ms. (279 steps per ms) remains 11/12 properties
BEST_FIRST walk for 40004 steps (8 resets) in 128 ms. (310 steps per ms) remains 10/11 properties
BEST_FIRST walk for 40004 steps (8 resets) in 142 ms. (279 steps per ms) remains 9/10 properties
BEST_FIRST walk for 40004 steps (8 resets) in 94 ms. (421 steps per ms) remains 8/9 properties
BEST_FIRST walk for 40004 steps (8 resets) in 91 ms. (434 steps per ms) remains 7/8 properties
BEST_FIRST walk for 40004 steps (8 resets) in 89 ms. (444 steps per ms) remains 7/7 properties
BEST_FIRST walk for 40004 steps (8 resets) in 75 ms. (526 steps per ms) remains 6/7 properties
BEST_FIRST walk for 40004 steps (8 resets) in 118 ms. (336 steps per ms) remains 6/6 properties
BEST_FIRST walk for 40004 steps (8 resets) in 65 ms. (606 steps per ms) remains 5/6 properties
BEST_FIRST walk for 40004 steps (8 resets) in 53 ms. (740 steps per ms) remains 4/5 properties
BEST_FIRST walk for 40004 steps (8 resets) in 45 ms. (869 steps per ms) remains 3/4 properties
BEST_FIRST walk for 40004 steps (8 resets) in 46 ms. (851 steps per ms) remains 2/3 properties
[2024-05-31 19:47:00] [INFO ] Flow matrix only has 80 transitions (discarded 360 similar events)
// Phase 1: matrix 80 rows 83 cols
[2024-05-31 19:47:00] [INFO ] Computed 43 invariants in 1 ms
[2024-05-31 19:47:00] [INFO ] State equation strengthened by 20 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/27 variables, 27/27 constraints. Problems are: Problem set: 0 solved, 2 unsolved
Problem AtomicPropp43 is UNSAT
Problem AtomicPropp56 is UNSAT
After SMT solving in domain Real declared 27/163 variables, and 29 constraints, problems are : Problem set: 2 solved, 0 unsolved in 49 ms.
Refiners :[Domain max(s): 27/83 constraints, Positive P Invariants (semi-flows): 2/40 constraints, Generalized P Invariants (flows): 0/3 constraints, State Equation: 0/83 constraints, ReadFeed: 0/20 constraints, PredecessorRefiner: 2/2 constraints, Known Traps: 0/0 constraints]
After SMT, in 108ms problems are : Problem set: 2 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 2 atomic propositions for a total of 16 simplifications.
[2024-05-31 19:47:00] [INFO ] Flatten gal took : 28 ms
[2024-05-31 19:47:00] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA Dekker-PT-020-CTLFireability-2024-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-05-31 19:47:00] [INFO ] Flatten gal took : 29 ms
[2024-05-31 19:47:00] [INFO ] Input system was already deterministic with 440 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 83/83 places, 440/440 transitions.
Applied a total of 0 rules in 4 ms. Remains 83 /83 variables (removed 0) and now considering 440/440 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 83/83 places, 440/440 transitions.
[2024-05-31 19:47:00] [INFO ] Flatten gal took : 22 ms
[2024-05-31 19:47:00] [INFO ] Flatten gal took : 23 ms
[2024-05-31 19:47:00] [INFO ] Input system was already deterministic with 440 transitions.
Starting structural reductions in LTL mode, iteration 0 : 83/83 places, 440/440 transitions.
Applied a total of 0 rules in 6 ms. Remains 83 /83 variables (removed 0) and now considering 440/440 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 83/83 places, 440/440 transitions.
[2024-05-31 19:47:00] [INFO ] Flatten gal took : 27 ms
[2024-05-31 19:47:00] [INFO ] Flatten gal took : 20 ms
[2024-05-31 19:47:00] [INFO ] Input system was already deterministic with 440 transitions.
Starting structural reductions in LTL mode, iteration 0 : 83/83 places, 440/440 transitions.
Applied a total of 0 rules in 4 ms. Remains 83 /83 variables (removed 0) and now considering 440/440 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 83/83 places, 440/440 transitions.
[2024-05-31 19:47:00] [INFO ] Flatten gal took : 18 ms
[2024-05-31 19:47:00] [INFO ] Flatten gal took : 19 ms
[2024-05-31 19:47:00] [INFO ] Input system was already deterministic with 440 transitions.
Starting structural reductions in LTL mode, iteration 0 : 83/83 places, 440/440 transitions.
Applied a total of 0 rules in 6 ms. Remains 83 /83 variables (removed 0) and now considering 440/440 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 83/83 places, 440/440 transitions.
[2024-05-31 19:47:00] [INFO ] Flatten gal took : 17 ms
[2024-05-31 19:47:00] [INFO ] Flatten gal took : 17 ms
[2024-05-31 19:47:01] [INFO ] Input system was already deterministic with 440 transitions.
Starting structural reductions in LTL mode, iteration 0 : 83/83 places, 440/440 transitions.
Applied a total of 0 rules in 3 ms. Remains 83 /83 variables (removed 0) and now considering 440/440 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 83/83 places, 440/440 transitions.
[2024-05-31 19:47:01] [INFO ] Flatten gal took : 17 ms
[2024-05-31 19:47:01] [INFO ] Flatten gal took : 18 ms
[2024-05-31 19:47:01] [INFO ] Input system was already deterministic with 440 transitions.
Starting structural reductions in LTL mode, iteration 0 : 83/83 places, 440/440 transitions.
Applied a total of 0 rules in 2 ms. Remains 83 /83 variables (removed 0) and now considering 440/440 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 83/83 places, 440/440 transitions.
[2024-05-31 19:47:01] [INFO ] Flatten gal took : 17 ms
[2024-05-31 19:47:01] [INFO ] Flatten gal took : 17 ms
[2024-05-31 19:47:01] [INFO ] Input system was already deterministic with 440 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 83/83 places, 440/440 transitions.
Applied a total of 0 rules in 31 ms. Remains 83 /83 variables (removed 0) and now considering 440/440 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 31 ms. Remains : 83/83 places, 440/440 transitions.
[2024-05-31 19:47:01] [INFO ] Flatten gal took : 15 ms
[2024-05-31 19:47:01] [INFO ] Flatten gal took : 15 ms
[2024-05-31 19:47:01] [INFO ] Input system was already deterministic with 440 transitions.
Starting structural reductions in LTL mode, iteration 0 : 83/83 places, 440/440 transitions.
Applied a total of 0 rules in 3 ms. Remains 83 /83 variables (removed 0) and now considering 440/440 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 83/83 places, 440/440 transitions.
[2024-05-31 19:47:01] [INFO ] Flatten gal took : 16 ms
[2024-05-31 19:47:01] [INFO ] Flatten gal took : 16 ms
[2024-05-31 19:47:01] [INFO ] Input system was already deterministic with 440 transitions.
Starting structural reductions in LTL mode, iteration 0 : 83/83 places, 440/440 transitions.
Applied a total of 0 rules in 2 ms. Remains 83 /83 variables (removed 0) and now considering 440/440 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 83/83 places, 440/440 transitions.
[2024-05-31 19:47:01] [INFO ] Flatten gal took : 15 ms
[2024-05-31 19:47:01] [INFO ] Flatten gal took : 16 ms
[2024-05-31 19:47:01] [INFO ] Input system was already deterministic with 440 transitions.
Starting structural reductions in LTL mode, iteration 0 : 83/83 places, 440/440 transitions.
Applied a total of 0 rules in 3 ms. Remains 83 /83 variables (removed 0) and now considering 440/440 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 83/83 places, 440/440 transitions.
[2024-05-31 19:47:01] [INFO ] Flatten gal took : 14 ms
[2024-05-31 19:47:01] [INFO ] Flatten gal took : 15 ms
[2024-05-31 19:47:01] [INFO ] Input system was already deterministic with 440 transitions.
Starting structural reductions in LTL mode, iteration 0 : 83/83 places, 440/440 transitions.
Applied a total of 0 rules in 2 ms. Remains 83 /83 variables (removed 0) and now considering 440/440 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 83/83 places, 440/440 transitions.
[2024-05-31 19:47:01] [INFO ] Flatten gal took : 18 ms
[2024-05-31 19:47:01] [INFO ] Flatten gal took : 14 ms
[2024-05-31 19:47:01] [INFO ] Input system was already deterministic with 440 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 83/83 places, 440/440 transitions.
Applied a total of 0 rules in 18 ms. Remains 83 /83 variables (removed 0) and now considering 440/440 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 18 ms. Remains : 83/83 places, 440/440 transitions.
[2024-05-31 19:47:01] [INFO ] Flatten gal took : 12 ms
[2024-05-31 19:47:01] [INFO ] Flatten gal took : 13 ms
[2024-05-31 19:47:01] [INFO ] Input system was already deterministic with 440 transitions.
Starting structural reductions in LTL mode, iteration 0 : 83/83 places, 440/440 transitions.
Applied a total of 0 rules in 2 ms. Remains 83 /83 variables (removed 0) and now considering 440/440 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 83/83 places, 440/440 transitions.
[2024-05-31 19:47:01] [INFO ] Flatten gal took : 12 ms
[2024-05-31 19:47:01] [INFO ] Flatten gal took : 13 ms
[2024-05-31 19:47:01] [INFO ] Input system was already deterministic with 440 transitions.
Starting structural reductions in LTL mode, iteration 0 : 83/83 places, 440/440 transitions.
Applied a total of 0 rules in 2 ms. Remains 83 /83 variables (removed 0) and now considering 440/440 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 83/83 places, 440/440 transitions.
[2024-05-31 19:47:01] [INFO ] Flatten gal took : 12 ms
[2024-05-31 19:47:01] [INFO ] Flatten gal took : 13 ms
[2024-05-31 19:47:01] [INFO ] Input system was already deterministic with 440 transitions.
Starting structural reductions in LTL mode, iteration 0 : 83/83 places, 440/440 transitions.
Applied a total of 0 rules in 2 ms. Remains 83 /83 variables (removed 0) and now considering 440/440 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 83/83 places, 440/440 transitions.
[2024-05-31 19:47:01] [INFO ] Flatten gal took : 12 ms
[2024-05-31 19:47:01] [INFO ] Flatten gal took : 13 ms
[2024-05-31 19:47:01] [INFO ] Input system was already deterministic with 440 transitions.
[2024-05-31 19:47:01] [INFO ] Flatten gal took : 15 ms
[2024-05-31 19:47:01] [INFO ] Flatten gal took : 15 ms
[2024-05-31 19:47:01] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 6 ms.
[2024-05-31 19:47:01] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 83 places, 440 transitions and 2883 arcs took 6 ms.
Total runtime 3625 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : Dekker-PT-020-CTLFireability-2024-00
Could not compute solution for formula : Dekker-PT-020-CTLFireability-2024-01
Could not compute solution for formula : Dekker-PT-020-CTLFireability-2024-02
Could not compute solution for formula : Dekker-PT-020-CTLFireability-2024-03
Could not compute solution for formula : Dekker-PT-020-CTLFireability-2024-04
Could not compute solution for formula : Dekker-PT-020-CTLFireability-2024-05
Could not compute solution for formula : Dekker-PT-020-CTLFireability-2024-06
Could not compute solution for formula : Dekker-PT-020-CTLFireability-2024-08
Could not compute solution for formula : Dekker-PT-020-CTLFireability-2024-09
Could not compute solution for formula : Dekker-PT-020-CTLFireability-2024-10
Could not compute solution for formula : Dekker-PT-020-CTLFireability-2024-11
Could not compute solution for formula : Dekker-PT-020-CTLFireability-2023-12
Could not compute solution for formula : Dekker-PT-020-CTLFireability-2023-13
Could not compute solution for formula : Dekker-PT-020-CTLFireability-2023-14
Could not compute solution for formula : Dekker-PT-020-CTLFireability-2023-15

BK_STOP 1717184822294

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name Dekker-PT-020-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/495/ctl_0_
ctl formula name Dekker-PT-020-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/495/ctl_1_
ctl formula name Dekker-PT-020-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/495/ctl_2_
ctl formula name Dekker-PT-020-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/495/ctl_3_
ctl formula name Dekker-PT-020-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/495/ctl_4_
ctl formula name Dekker-PT-020-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/495/ctl_5_
ctl formula name Dekker-PT-020-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/495/ctl_6_
ctl formula name Dekker-PT-020-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/495/ctl_7_
ctl formula name Dekker-PT-020-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/495/ctl_8_
ctl formula name Dekker-PT-020-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/495/ctl_9_
ctl formula name Dekker-PT-020-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/495/ctl_10_
ctl formula name Dekker-PT-020-CTLFireability-2023-12
ctl formula formula --ctl=/tmp/495/ctl_11_
ctl formula name Dekker-PT-020-CTLFireability-2023-13
ctl formula formula --ctl=/tmp/495/ctl_12_
ctl formula name Dekker-PT-020-CTLFireability-2023-14
ctl formula formula --ctl=/tmp/495/ctl_13_
ctl formula name Dekker-PT-020-CTLFireability-2023-15
ctl formula formula --ctl=/tmp/495/ctl_14_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Dekker-PT-020"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is Dekker-PT-020, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r488-tall-171631131900098"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Dekker-PT-020.tgz
mv Dekker-PT-020 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;