fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r484-smll-171624275800322
Last Updated
July 7, 2024

About the Execution of LTSMin+red for DLCshifumi-PT-4a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
436.655 20721.00 44264.00 429.30 ????????F??????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r484-smll-171624275800322.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is DLCshifumi-PT-4a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r484-smll-171624275800322
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.4M
-rw-r--r-- 1 mcc users 7.7K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 86K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 45K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Apr 22 14:38 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Apr 22 14:38 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Apr 22 14:38 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 22 14:38 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.9K Apr 13 09:21 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 91K Apr 13 09:21 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.9K Apr 13 08:38 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 77K Apr 13 08:38 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:38 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:38 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 1.9M May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2024-00
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2024-01
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2024-02
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2024-03
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2024-04
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2024-05
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2024-06
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2024-07
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2024-08
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2024-09
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2024-10
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2024-11
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2023-12
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2023-13
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2023-14
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717242982370

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCshifumi-PT-4a
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 11:56:25] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 11:56:25] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 11:56:26] [INFO ] Load time of PNML (sax parser for PT used): 631 ms
[2024-06-01 11:56:26] [INFO ] Transformed 1178 places.
[2024-06-01 11:56:26] [INFO ] Transformed 7504 transitions.
[2024-06-01 11:56:26] [INFO ] Found NUPN structural information;
[2024-06-01 11:56:26] [INFO ] Parsed PT model containing 1178 places and 7504 transitions and 28610 arcs in 911 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 22 ms.
Ensure Unique test removed 924 transitions
Reduce redundant transitions removed 924 transitions.
Support contains 143 out of 1178 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1178/1178 places, 6580/6580 transitions.
Discarding 139 places :
Symmetric choice reduction at 0 with 139 rule applications. Total rules 139 place count 1039 transition count 5885
Iterating global reduction 0 with 139 rules applied. Total rules applied 278 place count 1039 transition count 5885
Ensure Unique test removed 67 transitions
Reduce isomorphic transitions removed 67 transitions.
Iterating post reduction 0 with 67 rules applied. Total rules applied 345 place count 1039 transition count 5818
Drop transitions (Redundant composition of simpler transitions.) removed 2160 transitions
Redundant transition composition rules discarded 2160 transitions
Iterating global reduction 1 with 2160 rules applied. Total rules applied 2505 place count 1039 transition count 3658
Applied a total of 2505 rules in 641 ms. Remains 1039 /1178 variables (removed 139) and now considering 3658/6580 (removed 2922) transitions.
[2024-06-01 11:56:27] [INFO ] Flow matrix only has 610 transitions (discarded 3048 similar events)
// Phase 1: matrix 610 rows 1039 cols
[2024-06-01 11:56:27] [INFO ] Computed 691 invariants in 33 ms
[2024-06-01 11:56:36] [INFO ] Implicit Places using invariants in 8816 ms returned [427, 428, 429, 430, 431, 432, 433, 434, 435, 436, 437, 438, 439, 441, 442, 443, 444, 445, 446, 447, 448, 450, 451, 452, 453, 454, 455, 456, 457, 459, 460, 461, 462, 464, 465, 466, 467, 468, 469, 470, 471, 472, 475, 476, 477, 478, 480, 482, 483, 485, 486, 487, 488, 490, 491, 492, 493, 494, 495, 497, 499, 501, 503, 504, 505, 507, 508, 509, 511, 512, 513, 514, 515, 516, 517, 519, 520, 521, 522, 523, 524, 525, 526, 527, 528, 530, 531, 532, 533, 534, 535, 536, 537, 538, 539, 540, 541, 543, 544, 545, 546, 547, 548, 549, 550, 551, 552, 553, 554, 555, 556, 557, 558, 559, 560, 561, 562, 563, 565, 567, 569, 570, 571, 572, 573, 575, 576, 579, 580, 581, 582, 583, 584, 585, 587, 588, 589, 590, 591, 592, 593, 594, 595, 596, 597, 598, 599, 600, 601, 602, 603, 604, 605, 606, 607, 608, 609, 610, 611, 612, 614, 615, 616, 617, 619, 620, 621, 623, 624, 625, 626, 627, 628, 629, 630, 631, 635, 636, 637, 638, 639, 640, 641, 643, 644, 645, 647, 648, 649, 650, 651, 652, 653, 654, 655, 656, 657, 658, 659, 660, 661, 662, 663, 664, 665, 666, 667, 668, 669, 670, 671, 672, 673, 674, 675, 677, 678, 679, 680, 681, 682, 683, 685, 686, 687, 688, 691, 692, 693, 694, 696, 697, 698, 699, 700, 701, 702, 703, 704, 705, 706, 707, 708, 709, 710, 711, 713, 714, 715, 716, 718, 719, 720, 721, 722, 723, 724, 725, 726, 727, 729, 730, 731, 733, 734, 735, 736, 737, 738, 739, 740, 741, 743, 744, 745, 746, 747, 748, 749, 750, 751, 752, 753, 754, 755, 756, 757, 758, 759, 760, 762, 763, 764, 765, 768, 769, 770, 771, 772, 773, 774, 775, 776, 777, 778, 779, 780, 781, 782, 783, 784, 785, 786, 787, 788, 789, 790, 791, 792, 793, 794, 795, 796, 797, 798, 799, 800, 801, 803, 804, 805, 806, 807, 808, 809, 811, 812, 813, 814, 815, 816, 817, 818, 819, 820, 821, 822, 823, 824, 825, 826, 827, 828, 829, 830, 831, 833, 834, 836, 837, 838, 839, 840, 841, 842, 843, 844, 845, 847, 849, 850, 851, 852, 854, 855, 856, 857, 858, 859, 860, 861, 862, 863, 864, 865, 866, 867, 868, 869, 873, 874, 875, 876, 877, 878, 879, 880, 881, 882, 883, 884, 885, 886, 887, 888, 889, 890, 891, 892, 893, 894, 895, 896, 897, 898, 899, 900, 901, 902, 903, 904, 905, 906, 907, 908, 909, 910, 911, 914, 915, 916, 918, 919, 921, 923, 924, 925, 926, 927, 928, 930, 931, 932, 933, 934, 935, 936, 937, 938, 939, 940, 941, 942, 943, 944, 945, 946, 947, 948, 949, 950, 951, 953, 954, 955, 956, 957, 958, 959, 960, 961, 962, 963, 964, 965, 966, 968, 969, 971, 972, 973, 974, 975, 976, 977, 979, 980, 981, 982, 983, 984, 985, 987, 988, 989, 990, 991, 992, 993, 994, 995, 997, 998, 999, 1000, 1001, 1002, 1003, 1005, 1006, 1007, 1008, 1010, 1011, 1012, 1013, 1014, 1015, 1016, 1017, 1018, 1019, 1020, 1021, 1023, 1024, 1025, 1026, 1027, 1028, 1029, 1030, 1031, 1034, 1035, 1037, 1038]
Discarding 537 places :
Ensure Unique test removed 2420 transitions
Reduce isomorphic transitions removed 2420 transitions.
Implicit Place search using SMT only with invariants took 8905 ms to find 537 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 502/1178 places, 1238/6580 transitions.
Drop transitions (Redundant composition of simpler transitions.) removed 444 transitions
Redundant transition composition rules discarded 444 transitions
Iterating global reduction 0 with 444 rules applied. Total rules applied 444 place count 502 transition count 794
Applied a total of 444 rules in 31 ms. Remains 502 /502 variables (removed 0) and now considering 794/1238 (removed 444) transitions.
[2024-06-01 11:56:36] [INFO ] Flow matrix only has 610 transitions (discarded 184 similar events)
// Phase 1: matrix 610 rows 502 cols
[2024-06-01 11:56:36] [INFO ] Computed 154 invariants in 10 ms
[2024-06-01 11:56:36] [INFO ] Implicit Places using invariants in 245 ms returned []
[2024-06-01 11:56:36] [INFO ] Flow matrix only has 610 transitions (discarded 184 similar events)
[2024-06-01 11:56:36] [INFO ] Invariant cache hit.
[2024-06-01 11:56:37] [INFO ] State equation strengthened by 1 read => feed constraints.
[2024-06-01 11:56:37] [INFO ] Implicit Places using invariants and state equation in 625 ms returned []
Implicit Place search using SMT with State Equation took 874 ms to find 0 implicit places.
Starting structural reductions in LTL mode, iteration 2 : 502/1178 places, 794/6580 transitions.
Finished structural reductions in LTL mode , in 2 iterations and 10481 ms. Remains : 502/1178 places, 794/6580 transitions.
Support contains 143 out of 502 places after structural reductions.
[2024-06-01 11:56:37] [INFO ] Flatten gal took : 208 ms
[2024-06-01 11:56:37] [INFO ] Flatten gal took : 93 ms
[2024-06-01 11:56:37] [INFO ] Input system was already deterministic with 794 transitions.
RANDOM walk for 40000 steps (8 resets) in 3975 ms. (10 steps per ms) remains 2/72 properties
BEST_FIRST walk for 40004 steps (8 resets) in 384 ms. (103 steps per ms) remains 2/2 properties
BEST_FIRST walk for 40004 steps (8 resets) in 959 ms. (41 steps per ms) remains 2/2 properties
[2024-06-01 11:56:39] [INFO ] Flow matrix only has 610 transitions (discarded 184 similar events)
[2024-06-01 11:56:39] [INFO ] Invariant cache hit.
[2024-06-01 11:56:39] [INFO ] State equation strengthened by 1 read => feed constraints.
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/22 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 2 unsolved
Problem AtomicPropp49 is UNSAT
At refinement iteration 1 (OVERLAPS) 31/53 variables, 17/17 constraints. Problems are: Problem set: 1 solved, 1 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/53 variables, 0/17 constraints. Problems are: Problem set: 1 solved, 1 unsolved
At refinement iteration 3 (OVERLAPS) 449/502 variables, 137/154 constraints. Problems are: Problem set: 1 solved, 1 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/502 variables, 0/154 constraints. Problems are: Problem set: 1 solved, 1 unsolved
At refinement iteration 5 (OVERLAPS) 609/1111 variables, 502/656 constraints. Problems are: Problem set: 1 solved, 1 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/1111 variables, 0/656 constraints. Problems are: Problem set: 1 solved, 1 unsolved
At refinement iteration 7 (OVERLAPS) 1/1112 variables, 1/657 constraints. Problems are: Problem set: 1 solved, 1 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/1112 variables, 0/657 constraints. Problems are: Problem set: 1 solved, 1 unsolved
At refinement iteration 9 (OVERLAPS) 0/1112 variables, 0/657 constraints. Problems are: Problem set: 1 solved, 1 unsolved
No progress, stopping.
After SMT solving in domain Real declared 1112/1112 variables, and 657 constraints, problems are : Problem set: 1 solved, 1 unsolved in 783 ms.
Refiners :[Positive P Invariants (semi-flows): 154/154 constraints, State Equation: 502/502 constraints, ReadFeed: 1/1 constraints, PredecessorRefiner: 2/2 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 1 solved, 1 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/6 variables, 0/0 constraints. Problems are: Problem set: 1 solved, 1 unsolved
Problem AtomicPropp15 is UNSAT
After SMT solving in domain Int declared 14/1112 variables, and 4 constraints, problems are : Problem set: 2 solved, 0 unsolved in 50 ms.
Refiners :[Positive P Invariants (semi-flows): 4/154 constraints, State Equation: 0/502 constraints, ReadFeed: 0/1 constraints, PredecessorRefiner: 0/2 constraints, Known Traps: 0/0 constraints]
After SMT, in 900ms problems are : Problem set: 2 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 2 atomic propositions for a total of 16 simplifications.
FORMULA DLCshifumi-PT-4a-CTLFireability-2024-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 11:56:40] [INFO ] Flatten gal took : 72 ms
[2024-06-01 11:56:40] [INFO ] Flatten gal took : 69 ms
[2024-06-01 11:56:40] [INFO ] Input system was already deterministic with 794 transitions.
Computed a total of 76 stabilizing places and 1 stable transitions
Graph (complete) has 947 edges and 502 vertex of which 427 are kept as prefixes of interest. Removing 75 places using SCC suffix rule.14 ms
Starting structural reductions in LTL mode, iteration 0 : 502/502 places, 794/794 transitions.
Reduce places removed 72 places and 0 transitions.
Iterating post reduction 0 with 72 rules applied. Total rules applied 72 place count 430 transition count 794
Discarding 18 places :
Symmetric choice reduction at 1 with 18 rule applications. Total rules 90 place count 412 transition count 758
Iterating global reduction 1 with 18 rules applied. Total rules applied 108 place count 412 transition count 758
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 1 with 8 rules applied. Total rules applied 116 place count 412 transition count 750
Applied a total of 116 rules in 62 ms. Remains 412 /502 variables (removed 90) and now considering 750/794 (removed 44) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 62 ms. Remains : 412/502 places, 750/794 transitions.
[2024-06-01 11:56:40] [INFO ] Flatten gal took : 44 ms
[2024-06-01 11:56:40] [INFO ] Flatten gal took : 38 ms
[2024-06-01 11:56:40] [INFO ] Input system was already deterministic with 750 transitions.
Starting structural reductions in LTL mode, iteration 0 : 502/502 places, 794/794 transitions.
Reduce places removed 71 places and 0 transitions.
Iterating post reduction 0 with 71 rules applied. Total rules applied 71 place count 431 transition count 794
Discarding 19 places :
Symmetric choice reduction at 1 with 19 rule applications. Total rules 90 place count 412 transition count 756
Iterating global reduction 1 with 19 rules applied. Total rules applied 109 place count 412 transition count 756
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 1 with 8 rules applied. Total rules applied 117 place count 412 transition count 748
Applied a total of 117 rules in 41 ms. Remains 412 /502 variables (removed 90) and now considering 748/794 (removed 46) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 42 ms. Remains : 412/502 places, 748/794 transitions.
[2024-06-01 11:56:40] [INFO ] Flatten gal took : 40 ms
[2024-06-01 11:56:41] [INFO ] Flatten gal took : 37 ms
[2024-06-01 11:56:41] [INFO ] Input system was already deterministic with 748 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 502/502 places, 794/794 transitions.
Graph (trivial) has 775 edges and 502 vertex of which 412 / 502 are part of one of the 77 SCC in 7 ms
Free SCC test removed 335 places
Ensure Unique test removed 688 transitions
Reduce isomorphic transitions removed 688 transitions.
Graph (complete) has 259 edges and 167 vertex of which 94 are kept as prefixes of interest. Removing 73 places using SCC suffix rule.2 ms
Discarding 73 places :
Also discarding 0 output transitions
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Iterating post reduction 0 with 3 rules applied. Total rules applied 5 place count 94 transition count 103
Reduce places removed 3 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 4 rules applied. Total rules applied 9 place count 91 transition count 102
Discarding 75 places :
Symmetric choice reduction at 2 with 75 rule applications. Total rules 84 place count 16 transition count 26
Iterating global reduction 2 with 75 rules applied. Total rules applied 159 place count 16 transition count 26
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 2 with 2 rules applied. Total rules applied 161 place count 16 transition count 24
Reduce places removed 1 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 3 with 2 rules applied. Total rules applied 163 place count 15 transition count 23
Applied a total of 163 rules in 46 ms. Remains 15 /502 variables (removed 487) and now considering 23/794 (removed 771) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 47 ms. Remains : 15/502 places, 23/794 transitions.
[2024-06-01 11:56:41] [INFO ] Flatten gal took : 1 ms
[2024-06-01 11:56:41] [INFO ] Flatten gal took : 2 ms
[2024-06-01 11:56:41] [INFO ] Input system was already deterministic with 23 transitions.
Starting structural reductions in LTL mode, iteration 0 : 502/502 places, 794/794 transitions.
Reduce places removed 66 places and 0 transitions.
Iterating post reduction 0 with 66 rules applied. Total rules applied 66 place count 436 transition count 794
Discarding 17 places :
Symmetric choice reduction at 1 with 17 rule applications. Total rules 83 place count 419 transition count 760
Iterating global reduction 1 with 17 rules applied. Total rules applied 100 place count 419 transition count 760
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 1 with 7 rules applied. Total rules applied 107 place count 419 transition count 753
Applied a total of 107 rules in 39 ms. Remains 419 /502 variables (removed 83) and now considering 753/794 (removed 41) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 40 ms. Remains : 419/502 places, 753/794 transitions.
[2024-06-01 11:56:41] [INFO ] Flatten gal took : 23 ms
[2024-06-01 11:56:41] [INFO ] Flatten gal took : 22 ms
[2024-06-01 11:56:41] [INFO ] Input system was already deterministic with 753 transitions.
Starting structural reductions in LTL mode, iteration 0 : 502/502 places, 794/794 transitions.
Reduce places removed 68 places and 0 transitions.
Iterating post reduction 0 with 68 rules applied. Total rules applied 68 place count 434 transition count 794
Discarding 16 places :
Symmetric choice reduction at 1 with 16 rule applications. Total rules 84 place count 418 transition count 762
Iterating global reduction 1 with 16 rules applied. Total rules applied 100 place count 418 transition count 762
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 1 with 7 rules applied. Total rules applied 107 place count 418 transition count 755
Applied a total of 107 rules in 26 ms. Remains 418 /502 variables (removed 84) and now considering 755/794 (removed 39) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 27 ms. Remains : 418/502 places, 755/794 transitions.
[2024-06-01 11:56:41] [INFO ] Flatten gal took : 21 ms
[2024-06-01 11:56:41] [INFO ] Flatten gal took : 20 ms
[2024-06-01 11:56:41] [INFO ] Input system was already deterministic with 755 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 502/502 places, 794/794 transitions.
Graph (trivial) has 771 edges and 502 vertex of which 408 / 502 are part of one of the 77 SCC in 2 ms
Free SCC test removed 331 places
Ensure Unique test removed 683 transitions
Reduce isomorphic transitions removed 683 transitions.
Graph (complete) has 264 edges and 171 vertex of which 99 are kept as prefixes of interest. Removing 72 places using SCC suffix rule.1 ms
Discarding 72 places :
Also discarding 0 output transitions
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: 5
Iterating post reduction 0 with 5 rules applied. Total rules applied 7 place count 99 transition count 106
Reduce places removed 5 places and 0 transitions.
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 7 rules applied. Total rules applied 14 place count 94 transition count 104
Discarding 72 places :
Symmetric choice reduction at 2 with 72 rule applications. Total rules 86 place count 22 transition count 32
Iterating global reduction 2 with 72 rules applied. Total rules applied 158 place count 22 transition count 32
Drop transitions (Redundant composition of simpler transitions.) removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 159 place count 22 transition count 31
Applied a total of 159 rules in 15 ms. Remains 22 /502 variables (removed 480) and now considering 31/794 (removed 763) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 15 ms. Remains : 22/502 places, 31/794 transitions.
[2024-06-01 11:56:41] [INFO ] Flatten gal took : 1 ms
[2024-06-01 11:56:41] [INFO ] Flatten gal took : 2 ms
[2024-06-01 11:56:41] [INFO ] Input system was already deterministic with 31 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 502/502 places, 794/794 transitions.
Graph (trivial) has 768 edges and 502 vertex of which 406 / 502 are part of one of the 77 SCC in 2 ms
Free SCC test removed 329 places
Ensure Unique test removed 676 transitions
Reduce isomorphic transitions removed 676 transitions.
Graph (complete) has 271 edges and 173 vertex of which 101 are kept as prefixes of interest. Removing 72 places using SCC suffix rule.1 ms
Discarding 72 places :
Also discarding 0 output transitions
Drop transitions (Trivial Post-Agglo cleanup.) removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 101 transition count 117
Reduce places removed 1 places and 0 transitions.
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: 5
Iterating post reduction 1 with 6 rules applied. Total rules applied 9 place count 100 transition count 112
Reduce places removed 5 places and 0 transitions.
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 2 with 7 rules applied. Total rules applied 16 place count 95 transition count 110
Discarding 74 places :
Symmetric choice reduction at 3 with 74 rule applications. Total rules 90 place count 21 transition count 36
Iterating global reduction 3 with 74 rules applied. Total rules applied 164 place count 21 transition count 36
Drop transitions (Redundant composition of simpler transitions.) removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 165 place count 21 transition count 35
Partial Post-agglomeration rule applied 1 times.
Drop transitions (Partial Post agglomeration) removed 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 166 place count 21 transition count 35
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 167 place count 20 transition count 34
Iterating global reduction 3 with 1 rules applied. Total rules applied 168 place count 20 transition count 34
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 169 place count 20 transition count 33
Drop transitions (Redundant composition of simpler transitions.) removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 4 with 1 rules applied. Total rules applied 170 place count 20 transition count 32
Applied a total of 170 rules in 31 ms. Remains 20 /502 variables (removed 482) and now considering 32/794 (removed 762) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 31 ms. Remains : 20/502 places, 32/794 transitions.
[2024-06-01 11:56:41] [INFO ] Flatten gal took : 1 ms
[2024-06-01 11:56:41] [INFO ] Flatten gal took : 2 ms
[2024-06-01 11:56:41] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in LTL mode, iteration 0 : 502/502 places, 794/794 transitions.
Reduce places removed 65 places and 0 transitions.
Iterating post reduction 0 with 65 rules applied. Total rules applied 65 place count 437 transition count 794
Discarding 14 places :
Symmetric choice reduction at 1 with 14 rule applications. Total rules 79 place count 423 transition count 766
Iterating global reduction 1 with 14 rules applied. Total rules applied 93 place count 423 transition count 766
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 1 with 5 rules applied. Total rules applied 98 place count 423 transition count 761
Applied a total of 98 rules in 28 ms. Remains 423 /502 variables (removed 79) and now considering 761/794 (removed 33) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 28 ms. Remains : 423/502 places, 761/794 transitions.
[2024-06-01 11:56:41] [INFO ] Flatten gal took : 21 ms
[2024-06-01 11:56:41] [INFO ] Flatten gal took : 21 ms
[2024-06-01 11:56:41] [INFO ] Input system was already deterministic with 761 transitions.
Starting structural reductions in LTL mode, iteration 0 : 502/502 places, 794/794 transitions.
Reduce places removed 74 places and 0 transitions.
Iterating post reduction 0 with 74 rules applied. Total rules applied 74 place count 428 transition count 794
Discarding 18 places :
Symmetric choice reduction at 1 with 18 rule applications. Total rules 92 place count 410 transition count 758
Iterating global reduction 1 with 18 rules applied. Total rules applied 110 place count 410 transition count 758
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 1 with 8 rules applied. Total rules applied 118 place count 410 transition count 750
Applied a total of 118 rules in 23 ms. Remains 410 /502 variables (removed 92) and now considering 750/794 (removed 44) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 23 ms. Remains : 410/502 places, 750/794 transitions.
[2024-06-01 11:56:41] [INFO ] Flatten gal took : 20 ms
[2024-06-01 11:56:41] [INFO ] Flatten gal took : 20 ms
[2024-06-01 11:56:41] [INFO ] Input system was already deterministic with 750 transitions.
Starting structural reductions in LTL mode, iteration 0 : 502/502 places, 794/794 transitions.
Reduce places removed 66 places and 0 transitions.
Iterating post reduction 0 with 66 rules applied. Total rules applied 66 place count 436 transition count 794
Discarding 17 places :
Symmetric choice reduction at 1 with 17 rule applications. Total rules 83 place count 419 transition count 760
Iterating global reduction 1 with 17 rules applied. Total rules applied 100 place count 419 transition count 760
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 1 with 7 rules applied. Total rules applied 107 place count 419 transition count 753
Applied a total of 107 rules in 21 ms. Remains 419 /502 variables (removed 83) and now considering 753/794 (removed 41) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 21 ms. Remains : 419/502 places, 753/794 transitions.
[2024-06-01 11:56:41] [INFO ] Flatten gal took : 20 ms
[2024-06-01 11:56:41] [INFO ] Flatten gal took : 21 ms
[2024-06-01 11:56:41] [INFO ] Input system was already deterministic with 753 transitions.
Starting structural reductions in LTL mode, iteration 0 : 502/502 places, 794/794 transitions.
Reduce places removed 72 places and 0 transitions.
Iterating post reduction 0 with 72 rules applied. Total rules applied 72 place count 430 transition count 794
Discarding 18 places :
Symmetric choice reduction at 1 with 18 rule applications. Total rules 90 place count 412 transition count 758
Iterating global reduction 1 with 18 rules applied. Total rules applied 108 place count 412 transition count 758
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 1 with 8 rules applied. Total rules applied 116 place count 412 transition count 750
Applied a total of 116 rules in 17 ms. Remains 412 /502 variables (removed 90) and now considering 750/794 (removed 44) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 18 ms. Remains : 412/502 places, 750/794 transitions.
[2024-06-01 11:56:41] [INFO ] Flatten gal took : 19 ms
[2024-06-01 11:56:41] [INFO ] Flatten gal took : 20 ms
[2024-06-01 11:56:41] [INFO ] Input system was already deterministic with 750 transitions.
Starting structural reductions in LTL mode, iteration 0 : 502/502 places, 794/794 transitions.
Reduce places removed 72 places and 0 transitions.
Iterating post reduction 0 with 72 rules applied. Total rules applied 72 place count 430 transition count 794
Discarding 18 places :
Symmetric choice reduction at 1 with 18 rule applications. Total rules 90 place count 412 transition count 758
Iterating global reduction 1 with 18 rules applied. Total rules applied 108 place count 412 transition count 758
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 1 with 8 rules applied. Total rules applied 116 place count 412 transition count 750
Applied a total of 116 rules in 18 ms. Remains 412 /502 variables (removed 90) and now considering 750/794 (removed 44) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 19 ms. Remains : 412/502 places, 750/794 transitions.
[2024-06-01 11:56:42] [INFO ] Flatten gal took : 18 ms
[2024-06-01 11:56:42] [INFO ] Flatten gal took : 18 ms
[2024-06-01 11:56:42] [INFO ] Input system was already deterministic with 750 transitions.
Starting structural reductions in LTL mode, iteration 0 : 502/502 places, 794/794 transitions.
Reduce places removed 71 places and 0 transitions.
Iterating post reduction 0 with 71 rules applied. Total rules applied 71 place count 431 transition count 794
Discarding 17 places :
Symmetric choice reduction at 1 with 17 rule applications. Total rules 88 place count 414 transition count 760
Iterating global reduction 1 with 17 rules applied. Total rules applied 105 place count 414 transition count 760
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 1 with 7 rules applied. Total rules applied 112 place count 414 transition count 753
Applied a total of 112 rules in 24 ms. Remains 414 /502 variables (removed 88) and now considering 753/794 (removed 41) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 25 ms. Remains : 414/502 places, 753/794 transitions.
[2024-06-01 11:56:42] [INFO ] Flatten gal took : 17 ms
[2024-06-01 11:56:42] [INFO ] Flatten gal took : 18 ms
[2024-06-01 11:56:42] [INFO ] Input system was already deterministic with 753 transitions.
Starting structural reductions in LTL mode, iteration 0 : 502/502 places, 794/794 transitions.
Reduce places removed 74 places and 0 transitions.
Iterating post reduction 0 with 74 rules applied. Total rules applied 74 place count 428 transition count 794
Discarding 18 places :
Symmetric choice reduction at 1 with 18 rule applications. Total rules 92 place count 410 transition count 758
Iterating global reduction 1 with 18 rules applied. Total rules applied 110 place count 410 transition count 758
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 1 with 8 rules applied. Total rules applied 118 place count 410 transition count 750
Applied a total of 118 rules in 24 ms. Remains 410 /502 variables (removed 92) and now considering 750/794 (removed 44) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 25 ms. Remains : 410/502 places, 750/794 transitions.
[2024-06-01 11:56:42] [INFO ] Flatten gal took : 17 ms
[2024-06-01 11:56:42] [INFO ] Flatten gal took : 18 ms
[2024-06-01 11:56:42] [INFO ] Input system was already deterministic with 750 transitions.
Starting structural reductions in LTL mode, iteration 0 : 502/502 places, 794/794 transitions.
Reduce places removed 72 places and 0 transitions.
Iterating post reduction 0 with 72 rules applied. Total rules applied 72 place count 430 transition count 794
Discarding 19 places :
Symmetric choice reduction at 1 with 19 rule applications. Total rules 91 place count 411 transition count 756
Iterating global reduction 1 with 19 rules applied. Total rules applied 110 place count 411 transition count 756
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 1 with 8 rules applied. Total rules applied 118 place count 411 transition count 748
Applied a total of 118 rules in 22 ms. Remains 411 /502 variables (removed 91) and now considering 748/794 (removed 46) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 23 ms. Remains : 411/502 places, 748/794 transitions.
[2024-06-01 11:56:42] [INFO ] Flatten gal took : 16 ms
[2024-06-01 11:56:42] [INFO ] Flatten gal took : 16 ms
[2024-06-01 11:56:42] [INFO ] Input system was already deterministic with 748 transitions.
[2024-06-01 11:56:42] [INFO ] Flatten gal took : 22 ms
[2024-06-01 11:56:42] [INFO ] Flatten gal took : 22 ms
[2024-06-01 11:56:42] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 7 ms.
[2024-06-01 11:56:42] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 502 places, 794 transitions and 1741 arcs took 10 ms.
Total runtime 17168 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : DLCshifumi-PT-4a-CTLFireability-2024-00
Could not compute solution for formula : DLCshifumi-PT-4a-CTLFireability-2024-01
Could not compute solution for formula : DLCshifumi-PT-4a-CTLFireability-2024-02
Could not compute solution for formula : DLCshifumi-PT-4a-CTLFireability-2024-03
Could not compute solution for formula : DLCshifumi-PT-4a-CTLFireability-2024-04
Could not compute solution for formula : DLCshifumi-PT-4a-CTLFireability-2024-05
Could not compute solution for formula : DLCshifumi-PT-4a-CTLFireability-2024-06
Could not compute solution for formula : DLCshifumi-PT-4a-CTLFireability-2024-07
Could not compute solution for formula : DLCshifumi-PT-4a-CTLFireability-2024-09
Could not compute solution for formula : DLCshifumi-PT-4a-CTLFireability-2024-10
Could not compute solution for formula : DLCshifumi-PT-4a-CTLFireability-2024-11
Could not compute solution for formula : DLCshifumi-PT-4a-CTLFireability-2023-12
Could not compute solution for formula : DLCshifumi-PT-4a-CTLFireability-2023-13
Could not compute solution for formula : DLCshifumi-PT-4a-CTLFireability-2023-14
Could not compute solution for formula : DLCshifumi-PT-4a-CTLFireability-2023-15

BK_STOP 1717243003091

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name DLCshifumi-PT-4a-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/516/ctl_0_
ctl formula name DLCshifumi-PT-4a-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/516/ctl_1_
ctl formula name DLCshifumi-PT-4a-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/516/ctl_2_
ctl formula name DLCshifumi-PT-4a-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/516/ctl_3_
ctl formula name DLCshifumi-PT-4a-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/516/ctl_4_
ctl formula name DLCshifumi-PT-4a-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/516/ctl_5_
ctl formula name DLCshifumi-PT-4a-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/516/ctl_6_
ctl formula name DLCshifumi-PT-4a-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/516/ctl_7_
ctl formula name DLCshifumi-PT-4a-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/516/ctl_8_
ctl formula name DLCshifumi-PT-4a-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/516/ctl_9_
ctl formula name DLCshifumi-PT-4a-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/516/ctl_10_
ctl formula name DLCshifumi-PT-4a-CTLFireability-2023-12
ctl formula formula --ctl=/tmp/516/ctl_11_
ctl formula name DLCshifumi-PT-4a-CTLFireability-2023-13
ctl formula formula --ctl=/tmp/516/ctl_12_
ctl formula name DLCshifumi-PT-4a-CTLFireability-2023-14
ctl formula formula --ctl=/tmp/516/ctl_13_
ctl formula name DLCshifumi-PT-4a-CTLFireability-2023-15
ctl formula formula --ctl=/tmp/516/ctl_14_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCshifumi-PT-4a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is DLCshifumi-PT-4a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r484-smll-171624275800322"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCshifumi-PT-4a.tgz
mv DLCshifumi-PT-4a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;