fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r484-smll-171624275600226
Last Updated
July 7, 2024

About the Execution of LTSMin+red for DLCround-PT-10a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
260.060 8996.00 21920.00 284.80 ???F??T????????F normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r484-smll-171624275600226.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is DLCround-PT-10a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r484-smll-171624275600226
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.2M
-rw-r--r-- 1 mcc users 5.8K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 61K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.0K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.3K Apr 22 14:38 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Apr 22 14:38 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Apr 22 14:38 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 22 14:38 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Apr 13 16:48 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 148K Apr 13 16:48 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.0K Apr 13 16:08 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 78K Apr 13 16:08 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:38 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:38 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 660K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-10a-CTLFireability-2024-00
FORMULA_NAME DLCround-PT-10a-CTLFireability-2024-01
FORMULA_NAME DLCround-PT-10a-CTLFireability-2024-02
FORMULA_NAME DLCround-PT-10a-CTLFireability-2024-03
FORMULA_NAME DLCround-PT-10a-CTLFireability-2024-04
FORMULA_NAME DLCround-PT-10a-CTLFireability-2024-05
FORMULA_NAME DLCround-PT-10a-CTLFireability-2024-06
FORMULA_NAME DLCround-PT-10a-CTLFireability-2024-07
FORMULA_NAME DLCround-PT-10a-CTLFireability-2024-08
FORMULA_NAME DLCround-PT-10a-CTLFireability-2024-09
FORMULA_NAME DLCround-PT-10a-CTLFireability-2024-10
FORMULA_NAME DLCround-PT-10a-CTLFireability-2024-11
FORMULA_NAME DLCround-PT-10a-CTLFireability-2023-12
FORMULA_NAME DLCround-PT-10a-CTLFireability-2023-13
FORMULA_NAME DLCround-PT-10a-CTLFireability-2023-14
FORMULA_NAME DLCround-PT-10a-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717229928341

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCround-PT-10a
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 08:18:50] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 08:18:50] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 08:18:51] [INFO ] Load time of PNML (sax parser for PT used): 472 ms
[2024-06-01 08:18:51] [INFO ] Transformed 337 places.
[2024-06-01 08:18:51] [INFO ] Transformed 2605 transitions.
[2024-06-01 08:18:51] [INFO ] Found NUPN structural information;
[2024-06-01 08:18:51] [INFO ] Parsed PT model containing 337 places and 2605 transitions and 10130 arcs in 832 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 32 ms.
Initial state reduction rules removed 1 formulas.
Ensure Unique test removed 247 transitions
Reduce redundant transitions removed 247 transitions.
FORMULA DLCround-PT-10a-CTLFireability-2023-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 126 out of 337 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 337/337 places, 2358/2358 transitions.
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 12 place count 325 transition count 2182
Iterating global reduction 0 with 12 rules applied. Total rules applied 24 place count 325 transition count 2182
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 26 place count 325 transition count 2180
Drop transitions (Redundant composition of simpler transitions.) removed 746 transitions
Redundant transition composition rules discarded 746 transitions
Iterating global reduction 1 with 746 rules applied. Total rules applied 772 place count 325 transition count 1434
Applied a total of 772 rules in 220 ms. Remains 325 /337 variables (removed 12) and now considering 1434/2358 (removed 924) transitions.
[2024-06-01 08:18:52] [INFO ] Flow matrix only has 204 transitions (discarded 1230 similar events)
// Phase 1: matrix 204 rows 325 cols
[2024-06-01 08:18:52] [INFO ] Computed 213 invariants in 15 ms
[2024-06-01 08:18:53] [INFO ] Implicit Places using invariants in 1563 ms returned [127, 128, 130, 132, 133, 134, 135, 136, 139, 140, 143, 144, 146, 147, 149, 151, 152, 153, 154, 155, 156, 157, 160, 161, 162, 163, 167, 169, 171, 175, 176, 177, 178, 180, 181, 182, 183, 185, 186, 187, 188, 189, 191, 194, 196, 197, 198, 201, 202, 203, 205, 207, 209, 210, 211, 212, 213, 215, 217, 219, 220, 222, 224, 225, 226, 229, 233, 234, 236, 237, 239, 240, 242, 244, 245, 248, 249, 251, 253, 254, 256, 257, 258, 259, 263, 266, 267, 268, 269, 270, 272, 273, 275, 276, 278, 279, 280, 282, 283, 284, 285, 286, 287, 288, 289, 290, 291, 293, 295, 296, 297, 298, 300, 301, 302, 303, 305, 307, 308, 309, 310, 311, 312, 313, 316, 317, 318, 320, 324]
Discarding 129 places :
Ensure Unique test removed 714 transitions
Reduce isomorphic transitions removed 714 transitions.
Implicit Place search using SMT only with invariants took 1626 ms to find 129 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 196/337 places, 720/2358 transitions.
Drop transitions (Redundant composition of simpler transitions.) removed 447 transitions
Redundant transition composition rules discarded 447 transitions
Iterating global reduction 0 with 447 rules applied. Total rules applied 447 place count 196 transition count 273
Applied a total of 447 rules in 16 ms. Remains 196 /196 variables (removed 0) and now considering 273/720 (removed 447) transitions.
[2024-06-01 08:18:53] [INFO ] Flow matrix only has 204 transitions (discarded 69 similar events)
// Phase 1: matrix 204 rows 196 cols
[2024-06-01 08:18:53] [INFO ] Computed 84 invariants in 6 ms
[2024-06-01 08:18:53] [INFO ] Implicit Places using invariants in 124 ms returned []
[2024-06-01 08:18:53] [INFO ] Flow matrix only has 204 transitions (discarded 69 similar events)
[2024-06-01 08:18:53] [INFO ] Invariant cache hit.
[2024-06-01 08:18:54] [INFO ] State equation strengthened by 1 read => feed constraints.
[2024-06-01 08:18:54] [INFO ] Implicit Places using invariants and state equation in 227 ms returned []
Implicit Place search using SMT with State Equation took 354 ms to find 0 implicit places.
Starting structural reductions in LTL mode, iteration 2 : 196/337 places, 273/2358 transitions.
Finished structural reductions in LTL mode , in 2 iterations and 2250 ms. Remains : 196/337 places, 273/2358 transitions.
Support contains 126 out of 196 places after structural reductions.
[2024-06-01 08:18:54] [INFO ] Flatten gal took : 105 ms
[2024-06-01 08:18:54] [INFO ] Flatten gal took : 39 ms
[2024-06-01 08:18:55] [INFO ] Input system was already deterministic with 273 transitions.
RANDOM walk for 40000 steps (8 resets) in 2533 ms. (15 steps per ms) remains 1/76 properties
BEST_FIRST walk for 40004 steps (8 resets) in 309 ms. (129 steps per ms) remains 1/1 properties
[2024-06-01 08:18:55] [INFO ] Flow matrix only has 204 transitions (discarded 69 similar events)
[2024-06-01 08:18:55] [INFO ] Invariant cache hit.
[2024-06-01 08:18:56] [INFO ] State equation strengthened by 1 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/4 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 1 unsolved
Problem AtomicPropp15 is UNSAT
After SMT solving in domain Real declared 13/400 variables, and 3 constraints, problems are : Problem set: 1 solved, 0 unsolved in 47 ms.
Refiners :[Positive P Invariants (semi-flows): 3/84 constraints, State Equation: 0/196 constraints, ReadFeed: 0/1 constraints, PredecessorRefiner: 1/1 constraints, Known Traps: 0/0 constraints]
After SMT, in 77ms problems are : Problem set: 1 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 1 atomic propositions for a total of 15 simplifications.
FORMULA DLCround-PT-10a-CTLFireability-2024-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 23 ms
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 19 ms
[2024-06-01 08:18:56] [INFO ] Input system was already deterministic with 273 transitions.
Computed a total of 70 stabilizing places and 1 stable transitions
Graph (complete) has 356 edges and 196 vertex of which 127 are kept as prefixes of interest. Removing 69 places using SCC suffix rule.4 ms
Starting structural reductions in LTL mode, iteration 0 : 196/196 places, 273/273 transitions.
Reduce places removed 66 places and 0 transitions.
Iterating post reduction 0 with 66 rules applied. Total rules applied 66 place count 130 transition count 273
Discarding 18 places :
Symmetric choice reduction at 1 with 18 rule applications. Total rules 84 place count 112 transition count 237
Iterating global reduction 1 with 18 rules applied. Total rules applied 102 place count 112 transition count 237
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 104 place count 112 transition count 235
Applied a total of 104 rules in 9 ms. Remains 112 /196 variables (removed 84) and now considering 235/273 (removed 38) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 112/196 places, 235/273 transitions.
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 12 ms
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 12 ms
[2024-06-01 08:18:56] [INFO ] Input system was already deterministic with 235 transitions.
Starting structural reductions in LTL mode, iteration 0 : 196/196 places, 273/273 transitions.
Reduce places removed 63 places and 0 transitions.
Iterating post reduction 0 with 63 rules applied. Total rules applied 63 place count 133 transition count 273
Discarding 15 places :
Symmetric choice reduction at 1 with 15 rule applications. Total rules 78 place count 118 transition count 243
Iterating global reduction 1 with 15 rules applied. Total rules applied 93 place count 118 transition count 243
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 95 place count 118 transition count 241
Applied a total of 95 rules in 7 ms. Remains 118 /196 variables (removed 78) and now considering 241/273 (removed 32) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 118/196 places, 241/273 transitions.
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 12 ms
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 12 ms
[2024-06-01 08:18:56] [INFO ] Input system was already deterministic with 241 transitions.
Starting structural reductions in LTL mode, iteration 0 : 196/196 places, 273/273 transitions.
Reduce places removed 62 places and 0 transitions.
Iterating post reduction 0 with 62 rules applied. Total rules applied 62 place count 134 transition count 273
Discarding 16 places :
Symmetric choice reduction at 1 with 16 rule applications. Total rules 78 place count 118 transition count 241
Iterating global reduction 1 with 16 rules applied. Total rules applied 94 place count 118 transition count 241
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 96 place count 118 transition count 239
Applied a total of 96 rules in 4 ms. Remains 118 /196 variables (removed 78) and now considering 239/273 (removed 34) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 118/196 places, 239/273 transitions.
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 11 ms
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 11 ms
[2024-06-01 08:18:56] [INFO ] Input system was already deterministic with 239 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 196/196 places, 273/273 transitions.
Graph (trivial) has 259 edges and 196 vertex of which 116 / 196 are part of one of the 15 SCC in 4 ms
Free SCC test removed 101 places
Ensure Unique test removed 234 transitions
Reduce isomorphic transitions removed 234 transitions.
Graph (complete) has 122 edges and 95 vertex of which 28 are kept as prefixes of interest. Removing 67 places using SCC suffix rule.0 ms
Discarding 67 places :
Also discarding 0 output transitions
Drop transitions (Trivial Post-Agglo cleanup.) removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 28 transition count 38
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 2 rules applied. Total rules applied 5 place count 27 transition count 37
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 6 place count 26 transition count 37
Discarding 13 places :
Symmetric choice reduction at 3 with 13 rule applications. Total rules 19 place count 13 transition count 23
Iterating global reduction 3 with 13 rules applied. Total rules applied 32 place count 13 transition count 23
Drop transitions (Redundant composition of simpler transitions.) removed 3 transitions
Redundant transition composition rules discarded 3 transitions
Iterating global reduction 3 with 3 rules applied. Total rules applied 35 place count 13 transition count 20
Partial Post-agglomeration rule applied 1 times.
Drop transitions (Partial Post agglomeration) removed 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 36 place count 13 transition count 20
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 37 place count 12 transition count 19
Iterating global reduction 3 with 1 rules applied. Total rules applied 38 place count 12 transition count 19
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 39 place count 12 transition count 18
Applied a total of 39 rules in 26 ms. Remains 12 /196 variables (removed 184) and now considering 18/273 (removed 255) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 26 ms. Remains : 12/196 places, 18/273 transitions.
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 1 ms
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 1 ms
[2024-06-01 08:18:56] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 196/196 places, 273/273 transitions.
Reduce places removed 59 places and 0 transitions.
Iterating post reduction 0 with 59 rules applied. Total rules applied 59 place count 137 transition count 273
Discarding 13 places :
Symmetric choice reduction at 1 with 13 rule applications. Total rules 72 place count 124 transition count 247
Iterating global reduction 1 with 13 rules applied. Total rules applied 85 place count 124 transition count 247
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 87 place count 124 transition count 245
Applied a total of 87 rules in 5 ms. Remains 124 /196 variables (removed 72) and now considering 245/273 (removed 28) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 124/196 places, 245/273 transitions.
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 11 ms
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 11 ms
[2024-06-01 08:18:56] [INFO ] Input system was already deterministic with 245 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 196/196 places, 273/273 transitions.
Graph (trivial) has 269 edges and 196 vertex of which 124 / 196 are part of one of the 15 SCC in 1 ms
Free SCC test removed 109 places
Ensure Unique test removed 253 transitions
Reduce isomorphic transitions removed 253 transitions.
Graph (complete) has 103 edges and 87 vertex of which 19 are kept as prefixes of interest. Removing 68 places using SCC suffix rule.0 ms
Discarding 68 places :
Also discarding 0 output transitions
Discarding 13 places :
Symmetric choice reduction at 0 with 13 rule applications. Total rules 15 place count 6 transition count 7
Iterating global reduction 0 with 13 rules applied. Total rules applied 28 place count 6 transition count 7
Applied a total of 28 rules in 4 ms. Remains 6 /196 variables (removed 190) and now considering 7/273 (removed 266) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 6/196 places, 7/273 transitions.
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 1 ms
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 1 ms
[2024-06-01 08:18:56] [INFO ] Input system was already deterministic with 7 transitions.
RANDOM walk for 12 steps (0 resets) in 4 ms. (2 steps per ms) remains 0/1 properties
FORMULA DLCround-PT-10a-CTLFireability-2024-06 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 196/196 places, 273/273 transitions.
Graph (trivial) has 253 edges and 196 vertex of which 113 / 196 are part of one of the 15 SCC in 1 ms
Free SCC test removed 98 places
Ensure Unique test removed 226 transitions
Reduce isomorphic transitions removed 226 transitions.
Graph (complete) has 130 edges and 98 vertex of which 33 are kept as prefixes of interest. Removing 65 places using SCC suffix rule.0 ms
Discarding 65 places :
Also discarding 0 output transitions
Drop transitions (Trivial Post-Agglo cleanup.) removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 33 transition count 46
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 2 rules applied. Total rules applied 5 place count 32 transition count 45
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 6 place count 31 transition count 45
Discarding 10 places :
Symmetric choice reduction at 3 with 10 rule applications. Total rules 16 place count 21 transition count 35
Iterating global reduction 3 with 10 rules applied. Total rules applied 26 place count 21 transition count 35
Drop transitions (Redundant composition of simpler transitions.) removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 3 with 2 rules applied. Total rules applied 28 place count 21 transition count 33
Applied a total of 28 rules in 7 ms. Remains 21 /196 variables (removed 175) and now considering 33/273 (removed 240) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 21/196 places, 33/273 transitions.
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 2 ms
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 2 ms
[2024-06-01 08:18:56] [INFO ] Input system was already deterministic with 33 transitions.
Starting structural reductions in LTL mode, iteration 0 : 196/196 places, 273/273 transitions.
Reduce places removed 66 places and 0 transitions.
Iterating post reduction 0 with 66 rules applied. Total rules applied 66 place count 130 transition count 273
Discarding 17 places :
Symmetric choice reduction at 1 with 17 rule applications. Total rules 83 place count 113 transition count 239
Iterating global reduction 1 with 17 rules applied. Total rules applied 100 place count 113 transition count 239
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 102 place count 113 transition count 237
Applied a total of 102 rules in 5 ms. Remains 113 /196 variables (removed 83) and now considering 237/273 (removed 36) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 113/196 places, 237/273 transitions.
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 10 ms
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 10 ms
[2024-06-01 08:18:56] [INFO ] Input system was already deterministic with 237 transitions.
Starting structural reductions in LTL mode, iteration 0 : 196/196 places, 273/273 transitions.
Reduce places removed 65 places and 0 transitions.
Iterating post reduction 0 with 65 rules applied. Total rules applied 65 place count 131 transition count 273
Discarding 18 places :
Symmetric choice reduction at 1 with 18 rule applications. Total rules 83 place count 113 transition count 237
Iterating global reduction 1 with 18 rules applied. Total rules applied 101 place count 113 transition count 237
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 103 place count 113 transition count 235
Applied a total of 103 rules in 4 ms. Remains 113 /196 variables (removed 83) and now considering 235/273 (removed 38) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 113/196 places, 235/273 transitions.
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 10 ms
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 10 ms
[2024-06-01 08:18:56] [INFO ] Input system was already deterministic with 235 transitions.
Starting structural reductions in LTL mode, iteration 0 : 196/196 places, 273/273 transitions.
Reduce places removed 54 places and 0 transitions.
Iterating post reduction 0 with 54 rules applied. Total rules applied 54 place count 142 transition count 273
Discarding 11 places :
Symmetric choice reduction at 1 with 11 rule applications. Total rules 65 place count 131 transition count 251
Iterating global reduction 1 with 11 rules applied. Total rules applied 76 place count 131 transition count 251
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 78 place count 131 transition count 249
Applied a total of 78 rules in 4 ms. Remains 131 /196 variables (removed 65) and now considering 249/273 (removed 24) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 131/196 places, 249/273 transitions.
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 10 ms
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 11 ms
[2024-06-01 08:18:56] [INFO ] Input system was already deterministic with 249 transitions.
Starting structural reductions in LTL mode, iteration 0 : 196/196 places, 273/273 transitions.
Reduce places removed 63 places and 0 transitions.
Iterating post reduction 0 with 63 rules applied. Total rules applied 63 place count 133 transition count 273
Discarding 17 places :
Symmetric choice reduction at 1 with 17 rule applications. Total rules 80 place count 116 transition count 239
Iterating global reduction 1 with 17 rules applied. Total rules applied 97 place count 116 transition count 239
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 99 place count 116 transition count 237
Applied a total of 99 rules in 5 ms. Remains 116 /196 variables (removed 80) and now considering 237/273 (removed 36) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 116/196 places, 237/273 transitions.
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 9 ms
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 10 ms
[2024-06-01 08:18:56] [INFO ] Input system was already deterministic with 237 transitions.
Starting structural reductions in LTL mode, iteration 0 : 196/196 places, 273/273 transitions.
Reduce places removed 62 places and 0 transitions.
Iterating post reduction 0 with 62 rules applied. Total rules applied 62 place count 134 transition count 273
Discarding 15 places :
Symmetric choice reduction at 1 with 15 rule applications. Total rules 77 place count 119 transition count 243
Iterating global reduction 1 with 15 rules applied. Total rules applied 92 place count 119 transition count 243
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 93 place count 119 transition count 242
Applied a total of 93 rules in 4 ms. Remains 119 /196 variables (removed 77) and now considering 242/273 (removed 31) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 119/196 places, 242/273 transitions.
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 9 ms
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 9 ms
[2024-06-01 08:18:56] [INFO ] Input system was already deterministic with 242 transitions.
Starting structural reductions in LTL mode, iteration 0 : 196/196 places, 273/273 transitions.
Reduce places removed 69 places and 0 transitions.
Iterating post reduction 0 with 69 rules applied. Total rules applied 69 place count 127 transition count 273
Discarding 18 places :
Symmetric choice reduction at 1 with 18 rule applications. Total rules 87 place count 109 transition count 237
Iterating global reduction 1 with 18 rules applied. Total rules applied 105 place count 109 transition count 237
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 107 place count 109 transition count 235
Applied a total of 107 rules in 4 ms. Remains 109 /196 variables (removed 87) and now considering 235/273 (removed 38) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 109/196 places, 235/273 transitions.
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 8 ms
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 7 ms
[2024-06-01 08:18:56] [INFO ] Input system was already deterministic with 235 transitions.
Starting structural reductions in LTL mode, iteration 0 : 196/196 places, 273/273 transitions.
Reduce places removed 52 places and 0 transitions.
Iterating post reduction 0 with 52 rules applied. Total rules applied 52 place count 144 transition count 273
Discarding 15 places :
Symmetric choice reduction at 1 with 15 rule applications. Total rules 67 place count 129 transition count 243
Iterating global reduction 1 with 15 rules applied. Total rules applied 82 place count 129 transition count 243
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 83 place count 129 transition count 242
Applied a total of 83 rules in 4 ms. Remains 129 /196 variables (removed 67) and now considering 242/273 (removed 31) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 129/196 places, 242/273 transitions.
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 8 ms
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 8 ms
[2024-06-01 08:18:56] [INFO ] Input system was already deterministic with 242 transitions.
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 12 ms
[2024-06-01 08:18:56] [INFO ] Flatten gal took : 12 ms
[2024-06-01 08:18:56] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 6 ms.
[2024-06-01 08:18:56] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 196 places, 273 transitions and 629 arcs took 7 ms.
Total runtime 6171 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : DLCround-PT-10a-CTLFireability-2024-00
Could not compute solution for formula : DLCround-PT-10a-CTLFireability-2024-01
Could not compute solution for formula : DLCround-PT-10a-CTLFireability-2024-02
Could not compute solution for formula : DLCround-PT-10a-CTLFireability-2024-04
Could not compute solution for formula : DLCround-PT-10a-CTLFireability-2024-05
Could not compute solution for formula : DLCround-PT-10a-CTLFireability-2024-07
Could not compute solution for formula : DLCround-PT-10a-CTLFireability-2024-08
Could not compute solution for formula : DLCround-PT-10a-CTLFireability-2024-09
Could not compute solution for formula : DLCround-PT-10a-CTLFireability-2024-10
Could not compute solution for formula : DLCround-PT-10a-CTLFireability-2024-11
Could not compute solution for formula : DLCround-PT-10a-CTLFireability-2023-12
Could not compute solution for formula : DLCround-PT-10a-CTLFireability-2023-13
Could not compute solution for formula : DLCround-PT-10a-CTLFireability-2023-14

BK_STOP 1717229937337

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name DLCround-PT-10a-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/507/ctl_0_
ctl formula name DLCround-PT-10a-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/507/ctl_1_
ctl formula name DLCround-PT-10a-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/507/ctl_2_
ctl formula name DLCround-PT-10a-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/507/ctl_3_
ctl formula name DLCround-PT-10a-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/507/ctl_4_
ctl formula name DLCround-PT-10a-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/507/ctl_5_
ctl formula name DLCround-PT-10a-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/507/ctl_6_
ctl formula name DLCround-PT-10a-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/507/ctl_7_
ctl formula name DLCround-PT-10a-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/507/ctl_8_
ctl formula name DLCround-PT-10a-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/507/ctl_9_
ctl formula name DLCround-PT-10a-CTLFireability-2023-12
ctl formula formula --ctl=/tmp/507/ctl_10_
ctl formula name DLCround-PT-10a-CTLFireability-2023-13
ctl formula formula --ctl=/tmp/507/ctl_11_
ctl formula name DLCround-PT-10a-CTLFireability-2023-14
ctl formula formula --ctl=/tmp/507/ctl_12_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-10a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is DLCround-PT-10a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r484-smll-171624275600226"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-10a.tgz
mv DLCround-PT-10a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;