fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r476-tall-171620505500258
Last Updated
July 7, 2024

About the Execution of LTSMin+red for CSRepetitions-PT-07

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1082.815 70531.00 103147.00 233.40 ????????T??????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r476-tall-171620505500258.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is CSRepetitions-PT-07, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r476-tall-171620505500258
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 6.8M
-rw-r--r-- 1 mcc users 136K Apr 12 09:49 CTLCardinality.txt
-rw-r--r-- 1 mcc users 511K Apr 12 09:49 CTLCardinality.xml
-rw-r--r-- 1 mcc users 138K Apr 12 09:42 CTLFireability.txt
-rw-r--r-- 1 mcc users 574K Apr 12 09:42 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 67K Apr 22 14:32 LTLCardinality.txt
-rw-r--r-- 1 mcc users 169K Apr 22 14:32 LTLCardinality.xml
-rw-r--r-- 1 mcc users 120K Apr 22 14:32 LTLFireability.txt
-rw-r--r-- 1 mcc users 368K Apr 22 14:32 LTLFireability.xml
-rw-r--r-- 1 mcc users 491K Apr 12 10:42 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 1.8M Apr 12 10:42 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 392K Apr 12 10:28 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 1.6M Apr 12 10:28 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 15K Apr 22 14:32 UpperBounds.txt
-rw-r--r-- 1 mcc users 30K Apr 22 14:32 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 424K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CSRepetitions-PT-07-CTLFireability-2024-00
FORMULA_NAME CSRepetitions-PT-07-CTLFireability-2024-01
FORMULA_NAME CSRepetitions-PT-07-CTLFireability-2024-02
FORMULA_NAME CSRepetitions-PT-07-CTLFireability-2024-03
FORMULA_NAME CSRepetitions-PT-07-CTLFireability-2024-04
FORMULA_NAME CSRepetitions-PT-07-CTLFireability-2024-05
FORMULA_NAME CSRepetitions-PT-07-CTLFireability-2024-06
FORMULA_NAME CSRepetitions-PT-07-CTLFireability-2024-07
FORMULA_NAME CSRepetitions-PT-07-CTLFireability-2024-08
FORMULA_NAME CSRepetitions-PT-07-CTLFireability-2024-09
FORMULA_NAME CSRepetitions-PT-07-CTLFireability-2024-10
FORMULA_NAME CSRepetitions-PT-07-CTLFireability-2024-11
FORMULA_NAME CSRepetitions-PT-07-CTLFireability-2024-12
FORMULA_NAME CSRepetitions-PT-07-CTLFireability-2024-13
FORMULA_NAME CSRepetitions-PT-07-CTLFireability-2024-14
FORMULA_NAME CSRepetitions-PT-07-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717202617177

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=CSRepetitions-PT-07
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 00:43:38] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 00:43:38] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 00:43:38] [INFO ] Load time of PNML (sax parser for PT used): 104 ms
[2024-06-01 00:43:38] [INFO ] Transformed 498 places.
[2024-06-01 00:43:38] [INFO ] Transformed 833 transitions.
[2024-06-01 00:43:38] [INFO ] Parsed PT model containing 498 places and 833 transitions and 3087 arcs in 203 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 44 ms.
Support contains 498 out of 498 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 498/498 places, 833/833 transitions.
Applied a total of 0 rules in 17 ms. Remains 498 /498 variables (removed 0) and now considering 833/833 (removed 0) transitions.
// Phase 1: matrix 833 rows 498 cols
[2024-06-01 00:43:38] [INFO ] Computed 56 invariants in 35 ms
[2024-06-01 00:43:39] [INFO ] Implicit Places using invariants in 281 ms returned []
[2024-06-01 00:43:39] [INFO ] Invariant cache hit.
[2024-06-01 00:43:39] [INFO ] State equation strengthened by 49 read => feed constraints.
[2024-06-01 00:43:39] [INFO ] Implicit Places using invariants and state equation in 322 ms returned []
Implicit Place search using SMT with State Equation took 630 ms to find 0 implicit places.
Running 784 sub problems to find dead transitions.
[2024-06-01 00:43:39] [INFO ] Invariant cache hit.
[2024-06-01 00:43:39] [INFO ] State equation strengthened by 49 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/449 variables, 7/7 constraints. Problems are: Problem set: 0 solved, 784 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/449 variables, 0/7 constraints. Problems are: Problem set: 0 solved, 784 unsolved
At refinement iteration 2 (OVERLAPS) 49/498 variables, 49/56 constraints. Problems are: Problem set: 0 solved, 784 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/498 variables, 0/56 constraints. Problems are: Problem set: 0 solved, 784 unsolved
At refinement iteration 4 (OVERLAPS) 833/1331 variables, 498/554 constraints. Problems are: Problem set: 0 solved, 784 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/1331 variables, 49/603 constraints. Problems are: Problem set: 0 solved, 784 unsolved
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 1331/1331 variables, and 603 constraints, problems are : Problem set: 0 solved, 784 unsolved in 30042 ms.
Refiners :[Positive P Invariants (semi-flows): 56/56 constraints, State Equation: 498/498 constraints, ReadFeed: 49/49 constraints, PredecessorRefiner: 784/784 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 784 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/449 variables, 7/7 constraints. Problems are: Problem set: 0 solved, 784 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/449 variables, 0/7 constraints. Problems are: Problem set: 0 solved, 784 unsolved
At refinement iteration 2 (OVERLAPS) 49/498 variables, 49/56 constraints. Problems are: Problem set: 0 solved, 784 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/498 variables, 0/56 constraints. Problems are: Problem set: 0 solved, 784 unsolved
At refinement iteration 4 (OVERLAPS) 833/1331 variables, 498/554 constraints. Problems are: Problem set: 0 solved, 784 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/1331 variables, 49/603 constraints. Problems are: Problem set: 0 solved, 784 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/1331 variables, 784/1387 constraints. Problems are: Problem set: 0 solved, 784 unsolved
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 1331/1331 variables, and 1387 constraints, problems are : Problem set: 0 solved, 784 unsolved in 30021 ms.
Refiners :[Positive P Invariants (semi-flows): 56/56 constraints, State Equation: 498/498 constraints, ReadFeed: 49/49 constraints, PredecessorRefiner: 784/784 constraints, Known Traps: 0/0 constraints]
After SMT, in 61189ms problems are : Problem set: 0 solved, 784 unsolved
Search for dead transitions found 0 dead transitions in 61215ms
Finished structural reductions in LTL mode , in 1 iterations and 61884 ms. Remains : 498/498 places, 833/833 transitions.
Support contains 498 out of 498 places after structural reductions.
[2024-06-01 00:44:41] [INFO ] Flatten gal took : 145 ms
[2024-06-01 00:44:41] [INFO ] Flatten gal took : 97 ms
[2024-06-01 00:44:41] [INFO ] Input system was already deterministic with 833 transitions.
RANDOM walk for 40000 steps (382 resets) in 2682 ms. (14 steps per ms) remains 3/70 properties
BEST_FIRST walk for 40004 steps (8 resets) in 143 ms. (277 steps per ms) remains 2/3 properties
BEST_FIRST walk for 40004 steps (8 resets) in 182 ms. (218 steps per ms) remains 1/2 properties
BEST_FIRST walk for 40004 steps (8 resets) in 165 ms. (240 steps per ms) remains 1/1 properties
[2024-06-01 00:44:43] [INFO ] Invariant cache hit.
[2024-06-01 00:44:43] [INFO ] State equation strengthened by 49 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/4 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 1 unsolved
Problem AtomicPropp53 is UNSAT
After SMT solving in domain Real declared 54/1331 variables, and 3 constraints, problems are : Problem set: 1 solved, 0 unsolved in 193 ms.
Refiners :[Positive P Invariants (semi-flows): 3/56 constraints, State Equation: 0/498 constraints, ReadFeed: 0/49 constraints, PredecessorRefiner: 1/1 constraints, Known Traps: 0/0 constraints]
After SMT, in 202ms problems are : Problem set: 1 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 1 atomic propositions for a total of 16 simplifications.
[2024-06-01 00:44:43] [INFO ] Flatten gal took : 61 ms
[2024-06-01 00:44:44] [INFO ] Flatten gal took : 79 ms
[2024-06-01 00:44:44] [INFO ] Input system was already deterministic with 833 transitions.
Computed a total of 0 stabilizing places and 49 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 498/498 places, 833/833 transitions.
Applied a total of 0 rules in 53 ms. Remains 498 /498 variables (removed 0) and now considering 833/833 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 68 ms. Remains : 498/498 places, 833/833 transitions.
[2024-06-01 00:44:44] [INFO ] Flatten gal took : 29 ms
[2024-06-01 00:44:44] [INFO ] Flatten gal took : 32 ms
[2024-06-01 00:44:44] [INFO ] Input system was already deterministic with 833 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 498/498 places, 833/833 transitions.
Applied a total of 0 rules in 34 ms. Remains 498 /498 variables (removed 0) and now considering 833/833 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 34 ms. Remains : 498/498 places, 833/833 transitions.
[2024-06-01 00:44:44] [INFO ] Flatten gal took : 34 ms
[2024-06-01 00:44:44] [INFO ] Flatten gal took : 40 ms
[2024-06-01 00:44:44] [INFO ] Input system was already deterministic with 833 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 498/498 places, 833/833 transitions.
Performed 49 Post agglomeration using F-continuation condition.Transition count delta: 49
Deduced a syphon composed of 49 places in 1 ms
Reduce places removed 98 places and 0 transitions.
Iterating global reduction 0 with 147 rules applied. Total rules applied 147 place count 400 transition count 784
Discarding 336 places :
Symmetric choice reduction at 0 with 336 rule applications. Total rules 483 place count 64 transition count 448
Iterating global reduction 0 with 336 rules applied. Total rules applied 819 place count 64 transition count 448
Performed 7 Post agglomeration using F-continuation condition.Transition count delta: 7
Deduced a syphon composed of 7 places in 0 ms
Reduce places removed 14 places and 0 transitions.
Iterating global reduction 0 with 21 rules applied. Total rules applied 840 place count 50 transition count 441
Ensure Unique test removed 294 transitions
Reduce isomorphic transitions removed 294 transitions.
Iterating post reduction 0 with 294 rules applied. Total rules applied 1134 place count 50 transition count 147
Applied a total of 1134 rules in 70 ms. Remains 50 /498 variables (removed 448) and now considering 147/833 (removed 686) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 70 ms. Remains : 50/498 places, 147/833 transitions.
[2024-06-01 00:44:44] [INFO ] Flatten gal took : 3 ms
[2024-06-01 00:44:44] [INFO ] Flatten gal took : 3 ms
[2024-06-01 00:44:44] [INFO ] Input system was already deterministic with 147 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 498/498 places, 833/833 transitions.
Applied a total of 0 rules in 30 ms. Remains 498 /498 variables (removed 0) and now considering 833/833 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 30 ms. Remains : 498/498 places, 833/833 transitions.
[2024-06-01 00:44:44] [INFO ] Flatten gal took : 26 ms
[2024-06-01 00:44:45] [INFO ] Flatten gal took : 29 ms
[2024-06-01 00:44:45] [INFO ] Input system was already deterministic with 833 transitions.
Starting structural reductions in LTL mode, iteration 0 : 498/498 places, 833/833 transitions.
Applied a total of 0 rules in 14 ms. Remains 498 /498 variables (removed 0) and now considering 833/833 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 15 ms. Remains : 498/498 places, 833/833 transitions.
[2024-06-01 00:44:45] [INFO ] Flatten gal took : 24 ms
[2024-06-01 00:44:45] [INFO ] Flatten gal took : 29 ms
[2024-06-01 00:44:45] [INFO ] Input system was already deterministic with 833 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 498/498 places, 833/833 transitions.
Applied a total of 0 rules in 17 ms. Remains 498 /498 variables (removed 0) and now considering 833/833 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 17 ms. Remains : 498/498 places, 833/833 transitions.
[2024-06-01 00:44:45] [INFO ] Flatten gal took : 27 ms
[2024-06-01 00:44:45] [INFO ] Flatten gal took : 32 ms
[2024-06-01 00:44:45] [INFO ] Input system was already deterministic with 833 transitions.
Starting structural reductions in LTL mode, iteration 0 : 498/498 places, 833/833 transitions.
Applied a total of 0 rules in 16 ms. Remains 498 /498 variables (removed 0) and now considering 833/833 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 16 ms. Remains : 498/498 places, 833/833 transitions.
[2024-06-01 00:44:45] [INFO ] Flatten gal took : 25 ms
[2024-06-01 00:44:45] [INFO ] Flatten gal took : 28 ms
[2024-06-01 00:44:45] [INFO ] Input system was already deterministic with 833 transitions.
Starting structural reductions in LTL mode, iteration 0 : 498/498 places, 833/833 transitions.
Applied a total of 0 rules in 3 ms. Remains 498 /498 variables (removed 0) and now considering 833/833 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 498/498 places, 833/833 transitions.
[2024-06-01 00:44:45] [INFO ] Flatten gal took : 27 ms
[2024-06-01 00:44:45] [INFO ] Flatten gal took : 33 ms
[2024-06-01 00:44:45] [INFO ] Input system was already deterministic with 833 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 498/498 places, 833/833 transitions.
Performed 48 Post agglomeration using F-continuation condition.Transition count delta: 48
Deduced a syphon composed of 48 places in 0 ms
Reduce places removed 96 places and 0 transitions.
Iterating global reduction 0 with 144 rules applied. Total rules applied 144 place count 402 transition count 785
Discarding 329 places :
Symmetric choice reduction at 0 with 329 rule applications. Total rules 473 place count 73 transition count 456
Iterating global reduction 0 with 329 rules applied. Total rules applied 802 place count 73 transition count 456
Discarding 40 places :
Symmetric choice reduction at 0 with 40 rule applications. Total rules 842 place count 33 transition count 136
Iterating global reduction 0 with 40 rules applied. Total rules applied 882 place count 33 transition count 136
Ensure Unique test removed 40 transitions
Reduce isomorphic transitions removed 40 transitions.
Iterating post reduction 0 with 40 rules applied. Total rules applied 922 place count 33 transition count 96
Performed 7 Post agglomeration using F-continuation condition.Transition count delta: 7
Deduced a syphon composed of 7 places in 0 ms
Reduce places removed 7 places and 0 transitions.
Iterating global reduction 1 with 14 rules applied. Total rules applied 936 place count 26 transition count 89
Applied a total of 936 rules in 79 ms. Remains 26 /498 variables (removed 472) and now considering 89/833 (removed 744) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 79 ms. Remains : 26/498 places, 89/833 transitions.
[2024-06-01 00:44:45] [INFO ] Flatten gal took : 2 ms
[2024-06-01 00:44:45] [INFO ] Flatten gal took : 2 ms
[2024-06-01 00:44:45] [INFO ] Input system was already deterministic with 89 transitions.
RANDOM walk for 2098 steps (64 resets) in 13 ms. (149 steps per ms) remains 0/1 properties
FORMULA CSRepetitions-PT-07-CTLFireability-2024-08 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 498/498 places, 833/833 transitions.
Applied a total of 0 rules in 16 ms. Remains 498 /498 variables (removed 0) and now considering 833/833 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 16 ms. Remains : 498/498 places, 833/833 transitions.
[2024-06-01 00:44:45] [INFO ] Flatten gal took : 35 ms
[2024-06-01 00:44:45] [INFO ] Flatten gal took : 23 ms
[2024-06-01 00:44:45] [INFO ] Input system was already deterministic with 833 transitions.
Starting structural reductions in LTL mode, iteration 0 : 498/498 places, 833/833 transitions.
Applied a total of 0 rules in 17 ms. Remains 498 /498 variables (removed 0) and now considering 833/833 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 17 ms. Remains : 498/498 places, 833/833 transitions.
[2024-06-01 00:44:45] [INFO ] Flatten gal took : 21 ms
[2024-06-01 00:44:45] [INFO ] Flatten gal took : 24 ms
[2024-06-01 00:44:45] [INFO ] Input system was already deterministic with 833 transitions.
Starting structural reductions in LTL mode, iteration 0 : 498/498 places, 833/833 transitions.
Applied a total of 0 rules in 17 ms. Remains 498 /498 variables (removed 0) and now considering 833/833 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 31 ms. Remains : 498/498 places, 833/833 transitions.
[2024-06-01 00:44:46] [INFO ] Flatten gal took : 24 ms
[2024-06-01 00:44:46] [INFO ] Flatten gal took : 22 ms
[2024-06-01 00:44:46] [INFO ] Input system was already deterministic with 833 transitions.
Starting structural reductions in LTL mode, iteration 0 : 498/498 places, 833/833 transitions.
Applied a total of 0 rules in 17 ms. Remains 498 /498 variables (removed 0) and now considering 833/833 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 17 ms. Remains : 498/498 places, 833/833 transitions.
[2024-06-01 00:44:46] [INFO ] Flatten gal took : 21 ms
[2024-06-01 00:44:46] [INFO ] Flatten gal took : 22 ms
[2024-06-01 00:44:46] [INFO ] Input system was already deterministic with 833 transitions.
Starting structural reductions in LTL mode, iteration 0 : 498/498 places, 833/833 transitions.
Applied a total of 0 rules in 16 ms. Remains 498 /498 variables (removed 0) and now considering 833/833 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 17 ms. Remains : 498/498 places, 833/833 transitions.
[2024-06-01 00:44:46] [INFO ] Flatten gal took : 20 ms
[2024-06-01 00:44:46] [INFO ] Flatten gal took : 22 ms
[2024-06-01 00:44:46] [INFO ] Input system was already deterministic with 833 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 498/498 places, 833/833 transitions.
Performed 37 Post agglomeration using F-continuation condition.Transition count delta: 37
Deduced a syphon composed of 37 places in 0 ms
Reduce places removed 74 places and 0 transitions.
Iterating global reduction 0 with 111 rules applied. Total rules applied 111 place count 424 transition count 796
Discarding 252 places :
Symmetric choice reduction at 0 with 252 rule applications. Total rules 363 place count 172 transition count 544
Iterating global reduction 0 with 252 rules applied. Total rules applied 615 place count 172 transition count 544
Discarding 26 places :
Symmetric choice reduction at 0 with 26 rule applications. Total rules 641 place count 146 transition count 336
Iterating global reduction 0 with 26 rules applied. Total rules applied 667 place count 146 transition count 336
Ensure Unique test removed 26 transitions
Reduce isomorphic transitions removed 26 transitions.
Iterating post reduction 0 with 26 rules applied. Total rules applied 693 place count 146 transition count 310
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: 5
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 1 with 10 rules applied. Total rules applied 703 place count 141 transition count 305
Applied a total of 703 rules in 47 ms. Remains 141 /498 variables (removed 357) and now considering 305/833 (removed 528) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 47 ms. Remains : 141/498 places, 305/833 transitions.
[2024-06-01 00:44:46] [INFO ] Flatten gal took : 7 ms
[2024-06-01 00:44:46] [INFO ] Flatten gal took : 6 ms
[2024-06-01 00:44:46] [INFO ] Input system was already deterministic with 305 transitions.
Starting structural reductions in LTL mode, iteration 0 : 498/498 places, 833/833 transitions.
Applied a total of 0 rules in 16 ms. Remains 498 /498 variables (removed 0) and now considering 833/833 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 16 ms. Remains : 498/498 places, 833/833 transitions.
[2024-06-01 00:44:46] [INFO ] Flatten gal took : 20 ms
[2024-06-01 00:44:46] [INFO ] Flatten gal took : 22 ms
[2024-06-01 00:44:46] [INFO ] Input system was already deterministic with 833 transitions.
[2024-06-01 00:44:46] [INFO ] Flatten gal took : 53 ms
[2024-06-01 00:44:46] [INFO ] Flatten gal took : 52 ms
[2024-06-01 00:44:47] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 30 ms.
[2024-06-01 00:44:47] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 498 places, 833 transitions and 3087 arcs took 6 ms.
Total runtime 68968 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : CSRepetitions-PT-07-CTLFireability-2024-00
Could not compute solution for formula : CSRepetitions-PT-07-CTLFireability-2024-01
Could not compute solution for formula : CSRepetitions-PT-07-CTLFireability-2024-02
Could not compute solution for formula : CSRepetitions-PT-07-CTLFireability-2024-03
Could not compute solution for formula : CSRepetitions-PT-07-CTLFireability-2024-04
Could not compute solution for formula : CSRepetitions-PT-07-CTLFireability-2024-05
Could not compute solution for formula : CSRepetitions-PT-07-CTLFireability-2024-06
Could not compute solution for formula : CSRepetitions-PT-07-CTLFireability-2024-07
Could not compute solution for formula : CSRepetitions-PT-07-CTLFireability-2024-09
Could not compute solution for formula : CSRepetitions-PT-07-CTLFireability-2024-10
Could not compute solution for formula : CSRepetitions-PT-07-CTLFireability-2024-11
Could not compute solution for formula : CSRepetitions-PT-07-CTLFireability-2024-12
Could not compute solution for formula : CSRepetitions-PT-07-CTLFireability-2024-13
Could not compute solution for formula : CSRepetitions-PT-07-CTLFireability-2024-14
Could not compute solution for formula : CSRepetitions-PT-07-CTLFireability-2024-15

BK_STOP 1717202687708

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name CSRepetitions-PT-07-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/521/ctl_0_
ctl formula name CSRepetitions-PT-07-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/521/ctl_1_
ctl formula name CSRepetitions-PT-07-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/521/ctl_2_
ctl formula name CSRepetitions-PT-07-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/521/ctl_3_
ctl formula name CSRepetitions-PT-07-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/521/ctl_4_
ctl formula name CSRepetitions-PT-07-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/521/ctl_5_
ctl formula name CSRepetitions-PT-07-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/521/ctl_6_
ctl formula name CSRepetitions-PT-07-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/521/ctl_7_
ctl formula name CSRepetitions-PT-07-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/521/ctl_8_
ctl formula name CSRepetitions-PT-07-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/521/ctl_9_
ctl formula name CSRepetitions-PT-07-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/521/ctl_10_
ctl formula name CSRepetitions-PT-07-CTLFireability-2024-12
ctl formula formula --ctl=/tmp/521/ctl_11_
ctl formula name CSRepetitions-PT-07-CTLFireability-2024-13
ctl formula formula --ctl=/tmp/521/ctl_12_
ctl formula name CSRepetitions-PT-07-CTLFireability-2024-14
ctl formula formula --ctl=/tmp/521/ctl_13_
ctl formula name CSRepetitions-PT-07-CTLFireability-2024-15
ctl formula formula --ctl=/tmp/521/ctl_14_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CSRepetitions-PT-07"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is CSRepetitions-PT-07, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r476-tall-171620505500258"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/CSRepetitions-PT-07.tgz
mv CSRepetitions-PT-07 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;