Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r476-tall-171620505400234.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is CSRepetitions-PT-03, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r476-tall-171620505400234
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 976K
-rw-r--r-- 1 mcc users 26K Apr 12 09:38 CTLCardinality.txt
-rw-r--r-- 1 mcc users 141K Apr 12 09:38 CTLCardinality.xml
-rw-r--r-- 1 mcc users 19K Apr 12 09:32 CTLFireability.txt
-rw-r--r-- 1 mcc users 100K Apr 12 09:32 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 16K Apr 22 14:32 LTLCardinality.txt
-rw-r--r-- 1 mcc users 56K Apr 22 14:32 LTLCardinality.xml
-rw-r--r-- 1 mcc users 9.0K Apr 22 14:32 LTLFireability.txt
-rw-r--r-- 1 mcc users 37K Apr 22 14:32 LTLFireability.xml
-rw-r--r-- 1 mcc users 41K Apr 12 09:43 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 209K Apr 12 09:43 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 39K Apr 12 09:41 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 181K Apr 12 09:41 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 3.2K Apr 22 14:32 UpperBounds.txt
-rw-r--r-- 1 mcc users 6.6K Apr 22 14:32 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 40K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-2024-00
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-2024-01
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-2024-02
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-2024-03
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-2024-04
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-2024-05
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-2024-06
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-2024-07
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-2024-08
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-2024-09
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-2024-10
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-2024-11
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-2024-12
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-2024-13
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-2024-14
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717201692090

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=CSRepetitions-PT-03
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 00:28:13] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 00:28:13] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 00:28:13] [INFO ] Load time of PNML (sax parser for PT used): 46 ms
[2024-06-01 00:28:13] [INFO ] Transformed 58 places.
[2024-06-01 00:28:13] [INFO ] Transformed 81 transitions.
[2024-06-01 00:28:13] [INFO ] Parsed PT model containing 58 places and 81 transitions and 279 arcs in 135 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 21 ms.
Support contains 58 out of 58 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 8 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
// Phase 1: matrix 81 rows 58 cols
[2024-06-01 00:28:13] [INFO ] Computed 12 invariants in 8 ms
[2024-06-01 00:28:13] [INFO ] Implicit Places using invariants in 142 ms returned []
[2024-06-01 00:28:13] [INFO ] Invariant cache hit.
[2024-06-01 00:28:13] [INFO ] State equation strengthened by 9 read => feed constraints.
[2024-06-01 00:28:13] [INFO ] Implicit Places using invariants and state equation in 103 ms returned []
Implicit Place search using SMT with State Equation took 274 ms to find 0 implicit places.
Running 72 sub problems to find dead transitions.
[2024-06-01 00:28:13] [INFO ] Invariant cache hit.
[2024-06-01 00:28:13] [INFO ] State equation strengthened by 9 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/49 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/49 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 2 (OVERLAPS) 9/58 variables, 9/12 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/58 variables, 0/12 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 4 (OVERLAPS) 81/139 variables, 58/70 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/139 variables, 9/79 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/139 variables, 0/79 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 7 (OVERLAPS) 0/139 variables, 0/79 constraints. Problems are: Problem set: 0 solved, 72 unsolved
No progress, stopping.
After SMT solving in domain Real declared 139/139 variables, and 79 constraints, problems are : Problem set: 0 solved, 72 unsolved in 1089 ms.
Refiners :[Positive P Invariants (semi-flows): 12/12 constraints, State Equation: 58/58 constraints, ReadFeed: 9/9 constraints, PredecessorRefiner: 72/72 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 72 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/49 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/49 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 2 (OVERLAPS) 9/58 variables, 9/12 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/58 variables, 0/12 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 4 (OVERLAPS) 81/139 variables, 58/70 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/139 variables, 9/79 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/139 variables, 72/151 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/139 variables, 0/151 constraints. Problems are: Problem set: 0 solved, 72 unsolved
At refinement iteration 8 (OVERLAPS) 0/139 variables, 0/151 constraints. Problems are: Problem set: 0 solved, 72 unsolved
No progress, stopping.
After SMT solving in domain Int declared 139/139 variables, and 151 constraints, problems are : Problem set: 0 solved, 72 unsolved in 966 ms.
Refiners :[Positive P Invariants (semi-flows): 12/12 constraints, State Equation: 58/58 constraints, ReadFeed: 9/9 constraints, PredecessorRefiner: 72/72 constraints, Known Traps: 0/0 constraints]
After SMT, in 2132ms problems are : Problem set: 0 solved, 72 unsolved
Search for dead transitions found 0 dead transitions in 2152ms
Finished structural reductions in LTL mode , in 1 iterations and 2453 ms. Remains : 58/58 places, 81/81 transitions.
Support contains 58 out of 58 places after structural reductions.
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 29 ms
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 19 ms
[2024-06-01 00:28:16] [INFO ] Input system was already deterministic with 81 transitions.
Reduction of identical properties reduced properties to check from 46 to 44
RANDOM walk for 3277 steps (110 resets) in 155 ms. (21 steps per ms) remains 0/44 properties
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 10 ms
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 14 ms
[2024-06-01 00:28:16] [INFO ] Input system was already deterministic with 81 transitions.
Computed a total of 0 stabilizing places and 9 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 7 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 58/58 places, 81/81 transitions.
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 6 ms
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 5 ms
[2024-06-01 00:28:16] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 0 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 58/58 places, 81/81 transitions.
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 5 ms
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 5 ms
[2024-06-01 00:28:16] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 3 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 58/58 places, 81/81 transitions.
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 5 ms
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 5 ms
[2024-06-01 00:28:16] [INFO ] Input system was already deterministic with 81 transitions.
RANDOM walk for 85 steps (0 resets) in 6 ms. (12 steps per ms) remains 0/1 properties
FORMULA CSRepetitions-PT-03-CTLFireability-2024-02 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 1 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 58/58 places, 81/81 transitions.
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 5 ms
[2024-06-01 00:28:16] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 0 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 58/58 places, 81/81 transitions.
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 7 ms
[2024-06-01 00:28:16] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 0 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 58/58 places, 81/81 transitions.
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:28:16] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 0 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 58/58 places, 81/81 transitions.
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:28:16] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 1 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 58/58 places, 81/81 transitions.
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 6 ms
[2024-06-01 00:28:16] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 1 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 58/58 places, 81/81 transitions.
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:28:16] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 1 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 58/58 places, 81/81 transitions.
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 3 ms
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 3 ms
[2024-06-01 00:28:16] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 1 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 58/58 places, 81/81 transitions.
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 3 ms
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:28:16] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 1 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 58/58 places, 81/81 transitions.
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 6 ms
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:28:16] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 12 places and 0 transitions.
Iterating global reduction 0 with 18 rules applied. Total rules applied 18 place count 46 transition count 75
Discarding 15 places :
Symmetric choice reduction at 0 with 15 rule applications. Total rules 33 place count 31 transition count 60
Iterating global reduction 0 with 15 rules applied. Total rules applied 48 place count 31 transition count 60
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 51 place count 28 transition count 48
Iterating global reduction 0 with 3 rules applied. Total rules applied 54 place count 28 transition count 48
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 57 place count 28 transition count 45
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 1 with 2 rules applied. Total rules applied 59 place count 27 transition count 44
Applied a total of 59 rules in 18 ms. Remains 27 /58 variables (removed 31) and now considering 44/81 (removed 37) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 18 ms. Remains : 27/58 places, 44/81 transitions.
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 2 ms
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 2 ms
[2024-06-01 00:28:16] [INFO ] Input system was already deterministic with 44 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Performed 8 Post agglomeration using F-continuation condition.Transition count delta: 8
Deduced a syphon composed of 8 places in 0 ms
Reduce places removed 16 places and 0 transitions.
Iterating global reduction 0 with 24 rules applied. Total rules applied 24 place count 42 transition count 73
Discarding 21 places :
Symmetric choice reduction at 0 with 21 rule applications. Total rules 45 place count 21 transition count 52
Iterating global reduction 0 with 21 rules applied. Total rules applied 66 place count 21 transition count 52
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 72 place count 15 transition count 28
Iterating global reduction 0 with 6 rules applied. Total rules applied 78 place count 15 transition count 28
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 0 with 6 rules applied. Total rules applied 84 place count 15 transition count 22
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 1 with 6 rules applied. Total rules applied 90 place count 12 transition count 19
Applied a total of 90 rules in 6 ms. Remains 12 /58 variables (removed 46) and now considering 19/81 (removed 62) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 12/58 places, 19/81 transitions.
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 1 ms
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 1 ms
[2024-06-01 00:28:16] [INFO ] Input system was already deterministic with 19 transitions.
Starting structural reductions in LTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 1 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 58/58 places, 81/81 transitions.
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 3 ms
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:28:16] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 1 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 58/58 places, 81/81 transitions.
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 3 ms
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 4 ms
[2024-06-01 00:28:16] [INFO ] Input system was already deterministic with 81 transitions.
[2024-06-01 00:28:16] [INFO ] Flatten gal took : 10 ms
[2024-06-01 00:28:17] [INFO ] Flatten gal took : 8 ms
[2024-06-01 00:28:17] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 11 ms.
[2024-06-01 00:28:17] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 58 places, 81 transitions and 279 arcs took 4 ms.
Total runtime 3851 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : CSRepetitions-PT-03-CTLFireability-2024-00
Could not compute solution for formula : CSRepetitions-PT-03-CTLFireability-2024-01
Could not compute solution for formula : CSRepetitions-PT-03-CTLFireability-2024-03
Could not compute solution for formula : CSRepetitions-PT-03-CTLFireability-2024-04
Could not compute solution for formula : CSRepetitions-PT-03-CTLFireability-2024-05
Could not compute solution for formula : CSRepetitions-PT-03-CTLFireability-2024-06
Could not compute solution for formula : CSRepetitions-PT-03-CTLFireability-2024-07
Could not compute solution for formula : CSRepetitions-PT-03-CTLFireability-2024-08
Could not compute solution for formula : CSRepetitions-PT-03-CTLFireability-2024-09
Could not compute solution for formula : CSRepetitions-PT-03-CTLFireability-2024-10
Could not compute solution for formula : CSRepetitions-PT-03-CTLFireability-2024-11
Could not compute solution for formula : CSRepetitions-PT-03-CTLFireability-2024-12
Could not compute solution for formula : CSRepetitions-PT-03-CTLFireability-2024-13
Could not compute solution for formula : CSRepetitions-PT-03-CTLFireability-2024-14
Could not compute solution for formula : CSRepetitions-PT-03-CTLFireability-2024-15

BK_STOP 1717201697467

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name CSRepetitions-PT-03-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/501/ctl_0_
ctl formula name CSRepetitions-PT-03-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/501/ctl_1_
ctl formula name CSRepetitions-PT-03-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/501/ctl_2_
ctl formula name CSRepetitions-PT-03-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/501/ctl_3_
ctl formula name CSRepetitions-PT-03-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/501/ctl_4_
ctl formula name CSRepetitions-PT-03-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/501/ctl_5_
ctl formula name CSRepetitions-PT-03-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/501/ctl_6_
ctl formula name CSRepetitions-PT-03-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/501/ctl_7_
ctl formula name CSRepetitions-PT-03-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/501/ctl_8_
ctl formula name CSRepetitions-PT-03-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/501/ctl_9_
ctl formula name CSRepetitions-PT-03-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/501/ctl_10_
ctl formula name CSRepetitions-PT-03-CTLFireability-2024-12
ctl formula formula --ctl=/tmp/501/ctl_11_
ctl formula name CSRepetitions-PT-03-CTLFireability-2024-13
ctl formula formula --ctl=/tmp/501/ctl_12_
ctl formula name CSRepetitions-PT-03-CTLFireability-2024-14
ctl formula formula --ctl=/tmp/501/ctl_13_
ctl formula name CSRepetitions-PT-03-CTLFireability-2024-15
ctl formula formula --ctl=/tmp/501/ctl_14_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CSRepetitions-PT-03"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is CSRepetitions-PT-03, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r476-tall-171620505400234"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/CSRepetitions-PT-03.tgz
mv CSRepetitions-PT-03 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;