Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r468-smll-171620167800499.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is BART-PT-060, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r468-smll-171620167800499
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 134M
-rw-r--r-- 1 mcc users 4.6M Apr 13 01:14 CTLCardinality.txt
-rw-r--r-- 1 mcc users 16M Apr 13 01:14 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.7M Apr 12 22:55 CTLFireability.txt
-rw-r--r-- 1 mcc users 12M Apr 12 22:55 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.1M Apr 22 14:29 LTLCardinality.txt
-rw-r--r-- 1 mcc users 5.5M Apr 22 14:29 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2M Apr 22 14:29 LTLFireability.txt
-rw-r--r-- 1 mcc users 5.3M Apr 22 14:29 LTLFireability.xml
-rw-r--r-- 1 mcc users 6.3M Apr 13 06:35 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 23M Apr 13 06:34 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.9M Apr 13 03:26 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 32M Apr 13 03:25 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 10K Apr 22 14:29 UpperBounds.txt
-rw-r--r-- 1 mcc users 21K Apr 22 14:29 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 15M May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BART-PT-060-LTLCardinality-00
FORMULA_NAME BART-PT-060-LTLCardinality-01
FORMULA_NAME BART-PT-060-LTLCardinality-02
FORMULA_NAME BART-PT-060-LTLCardinality-03
FORMULA_NAME BART-PT-060-LTLCardinality-04
FORMULA_NAME BART-PT-060-LTLCardinality-05
FORMULA_NAME BART-PT-060-LTLCardinality-06
FORMULA_NAME BART-PT-060-LTLCardinality-07
FORMULA_NAME BART-PT-060-LTLCardinality-08
FORMULA_NAME BART-PT-060-LTLCardinality-09
FORMULA_NAME BART-PT-060-LTLCardinality-10
FORMULA_NAME BART-PT-060-LTLCardinality-11
FORMULA_NAME BART-PT-060-LTLCardinality-12
FORMULA_NAME BART-PT-060-LTLCardinality-13
FORMULA_NAME BART-PT-060-LTLCardinality-14
FORMULA_NAME BART-PT-060-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1717241628830

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=LTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=BART-PT-060
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 11:33:50] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -timeout, 360, -rebuildPNML]
[2024-06-01 11:33:50] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 11:33:52] [INFO ] Load time of PNML (sax parser for PT used): 1289 ms
[2024-06-01 11:33:52] [INFO ] Transformed 8130 places.
[2024-06-01 11:33:52] [INFO ] Transformed 12120 transitions.
[2024-06-01 11:33:52] [INFO ] Found NUPN structural information;
[2024-06-01 11:33:52] [INFO ] Parsed PT model containing 8130 places and 12120 transitions and 97200 arcs in 1582 ms.
Parsed 16 properties from file /home/mcc/execution/LTLCardinality.xml in 335 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 3 formulas.
Reduce places removed 210 places and 0 transitions.
Initial state reduction rules removed 1 formulas.
FORMULA BART-PT-060-LTLCardinality-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-060-LTLCardinality-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-060-LTLCardinality-06 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-060-LTLCardinality-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-060-LTLCardinality-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-060-LTLCardinality-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-060-LTLCardinality-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-060-LTLCardinality-14 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-060-LTLCardinality-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-060-LTLCardinality-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-060-LTLCardinality-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-060-LTLCardinality-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-060-LTLCardinality-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-060-LTLCardinality-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-060-LTLCardinality-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 1 out of 7920 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 7920/7920 places, 12120/12120 transitions.
Discarding 1919 places :
Symmetric choice reduction at 0 with 1919 rule applications. Total rules 1919 place count 6001 transition count 10201
Iterating global reduction 0 with 1919 rules applied. Total rules applied 3838 place count 6001 transition count 10201
Discarding 1619 places :
Symmetric choice reduction at 0 with 1619 rule applications. Total rules 5457 place count 4382 transition count 8582
Iterating global reduction 0 with 1619 rules applied. Total rules applied 7076 place count 4382 transition count 8582
Discarding 240 places :
Symmetric choice reduction at 0 with 240 rule applications. Total rules 7316 place count 4142 transition count 8342
Iterating global reduction 0 with 240 rules applied. Total rules applied 7556 place count 4142 transition count 8342
Discarding 180 places :
Symmetric choice reduction at 0 with 180 rule applications. Total rules 7736 place count 3962 transition count 8162
Iterating global reduction 0 with 180 rules applied. Total rules applied 7916 place count 3962 transition count 8162
Discarding 180 places :
Symmetric choice reduction at 0 with 180 rule applications. Total rules 8096 place count 3782 transition count 7982
Iterating global reduction 0 with 180 rules applied. Total rules applied 8276 place count 3782 transition count 7982
Discarding 180 places :
Symmetric choice reduction at 0 with 180 rule applications. Total rules 8456 place count 3602 transition count 7802
Iterating global reduction 0 with 180 rules applied. Total rules applied 8636 place count 3602 transition count 7802
Discarding 180 places :
Symmetric choice reduction at 0 with 180 rule applications. Total rules 8816 place count 3422 transition count 7622
Iterating global reduction 0 with 180 rules applied. Total rules applied 8996 place count 3422 transition count 7622
Discarding 180 places :
Symmetric choice reduction at 0 with 180 rule applications. Total rules 9176 place count 3242 transition count 7442
Iterating global reduction 0 with 180 rules applied. Total rules applied 9356 place count 3242 transition count 7442
Discarding 120 places :
Symmetric choice reduction at 0 with 120 rule applications. Total rules 9476 place count 3122 transition count 7322
Iterating global reduction 0 with 120 rules applied. Total rules applied 9596 place count 3122 transition count 7322
Discarding 119 places :
Symmetric choice reduction at 0 with 119 rule applications. Total rules 9715 place count 3003 transition count 7203
Iterating global reduction 0 with 119 rules applied. Total rules applied 9834 place count 3003 transition count 7203
Discarding 60 places :
Symmetric choice reduction at 0 with 60 rule applications. Total rules 9894 place count 2943 transition count 7143
Iterating global reduction 0 with 60 rules applied. Total rules applied 9954 place count 2943 transition count 7143
Applied a total of 9954 rules in 6568 ms. Remains 2943 /7920 variables (removed 4977) and now considering 7143/12120 (removed 4977) transitions.
// Phase 1: matrix 7143 rows 2943 cols
[2024-06-01 11:33:59] [INFO ] Computed 60 invariants in 83 ms
[2024-06-01 11:34:01] [INFO ] Implicit Places using invariants in 1244 ms returned []
[2024-06-01 11:34:01] [INFO ] Invariant cache hit.
[2024-06-01 11:34:04] [INFO ] Implicit Places using invariants and state equation in 3689 ms returned []
Implicit Place search using SMT with State Equation took 4990 ms to find 0 implicit places.
Running 4983 sub problems to find dead transitions.
[2024-06-01 11:34:05] [INFO ] Invariant cache hit.
Error getting values : (error "ParserException while parsing response: ((s60 1.0)
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(s991 timeout
1.0) org.smtlib.IParser$ParserException: Unbalanced parentheses at end of input")
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 2883/10086 variables, and 0 constraints, problems are : Problem set: 0 solved, 4983 unsolved in 30173 ms.
Refiners :[Positive P Invariants (semi-flows): 0/60 constraints, State Equation: 0/2943 constraints, PredecessorRefiner: 4983/4983 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 4983 unsolved
Error getting values : (error "ParserException while parsing response: (timeout
org.smtlib.IParser$ParserException: Unbalanced parentheses at end of input")
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 2883/10086 variables, and 0 constraints, problems are : Problem set: 0 solved, 4983 unsolved in 30085 ms.
Refiners :[Positive P Invariants (semi-flows): 0/60 constraints, State Equation: 0/2943 constraints, PredecessorRefiner: 0/4983 constraints, Known Traps: 0/0 constraints]
After SMT, in 64576ms problems are : Problem set: 0 solved, 4983 unsolved
Search for dead transitions found 0 dead transitions in 64761ms
Starting structural reductions in LTL mode, iteration 1 : 2943/7920 places, 7143/12120 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 76387 ms. Remains : 2943/7920 places, 7143/12120 transitions.
Support contains 1 out of 2943 places after structural reductions.
[2024-06-01 11:35:10] [INFO ] Flatten gal took : 491 ms
[2024-06-01 11:35:10] [INFO ] Flatten gal took : 230 ms
[2024-06-01 11:35:11] [INFO ] Input system was already deterministic with 7143 transitions.
RANDOM walk for 31268 steps (6 resets) in 2704 ms. (11 steps per ms) remains 0/1 properties
Computed a total of 0 stabilizing places and 0 stable transitions
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G(F(p0)))'
Support contains 1 out of 2943 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 2943/2943 places, 7143/7143 transitions.
Graph (trivial) has 7141 edges and 2943 vertex of which 2940 / 2943 are part of one of the 60 SCC in 15 ms
Free SCC test removed 2880 places
Ensure Unique test removed 7079 transitions
Reduce isomorphic transitions removed 7079 transitions.
Reduce places removed 59 places and 0 transitions.
Ensure Unique test removed 58 transitions
Reduce isomorphic transitions removed 58 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 59 rules applied. Total rules applied 60 place count 4 transition count 5
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 61 place count 3 transition count 5
Drop transitions (Redundant composition of simpler transitions.) removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 62 place count 3 transition count 4
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 62 place count 3 transition count 3
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 64 place count 2 transition count 3
Applied a total of 64 rules in 73 ms. Remains 2 /2943 variables (removed 2941) and now considering 3/7143 (removed 7140) transitions.
// Phase 1: matrix 3 rows 2 cols
[2024-06-01 11:35:12] [INFO ] Computed 1 invariants in 1 ms
[2024-06-01 11:35:12] [INFO ] Implicit Places using invariants in 25 ms returned []
[2024-06-01 11:35:12] [INFO ] Invariant cache hit.
[2024-06-01 11:35:12] [INFO ] Implicit Places using invariants and state equation in 23 ms returned []
Implicit Place search using SMT with State Equation took 53 ms to find 0 implicit places.
[2024-06-01 11:35:12] [INFO ] Redundant transitions in 1 ms returned []
Running 1 sub problems to find dead transitions.
[2024-06-01 11:35:12] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/1 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 1 (OVERLAPS) 1/2 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/2 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 3 (OVERLAPS) 2/4 variables, 2/3 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/4 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 5 (OVERLAPS) 0/4 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 1 unsolved
No progress, stopping.
After SMT solving in domain Real declared 4/5 variables, and 3 constraints, problems are : Problem set: 0 solved, 1 unsolved in 38 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, State Equation: 2/2 constraints, PredecessorRefiner: 1/1 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 1 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/1 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 1 (OVERLAPS) 1/2 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/2 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 3 (OVERLAPS) 2/4 variables, 2/3 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/4 variables, 1/4 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/4 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 6 (OVERLAPS) 0/4 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 1 unsolved
No progress, stopping.
After SMT solving in domain Int declared 4/5 variables, and 4 constraints, problems are : Problem set: 0 solved, 1 unsolved in 30 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, State Equation: 2/2 constraints, PredecessorRefiner: 1/1 constraints, Known Traps: 0/0 constraints]
After SMT, in 71ms problems are : Problem set: 0 solved, 1 unsolved
Search for dead transitions found 0 dead transitions in 72ms
Starting structural reductions in SI_LTL mode, iteration 1 : 2/2943 places, 3/7143 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 205 ms. Remains : 2/2943 places, 3/7143 transitions.
Stuttering acceptance computed with spot in 254 ms :[(NOT p0), (NOT p0)]
Running random walk in product with property : BART-PT-060-LTLCardinality-08
Stuttering criterion allowed to conclude after 0 steps with 0 reset in 1 ms.
FORMULA BART-PT-060-LTLCardinality-08 FALSE TECHNIQUES STUTTER_TEST
Treatment of property BART-PT-060-LTLCardinality-08 finished in 551 ms.
All properties solved by simple procedures.
Total runtime 82105 ms.
ITS solved all properties within timeout

BK_STOP 1717241712960

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination LTLCardinality -timeout 360 -rebuildPNML

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BART-PT-060"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is BART-PT-060, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r468-smll-171620167800499"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BART-PT-060.tgz
mv BART-PT-060 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;