About the Execution of LTSMin+red for BART-PT-002
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
313.403 | 12580.00 | 22210.00 | 159.80 | FFTFTTTFFFFFFFFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r468-smll-171620167700443.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is BART-PT-002, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r468-smll-171620167700443
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 6.2M
-rw-r--r-- 1 mcc users 231K Apr 12 21:33 CTLCardinality.txt
-rw-r--r-- 1 mcc users 891K Apr 12 21:33 CTLCardinality.xml
-rw-r--r-- 1 mcc users 98K Apr 12 21:17 CTLFireability.txt
-rw-r--r-- 1 mcc users 351K Apr 12 21:17 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 105K Apr 22 14:29 LTLCardinality.txt
-rw-r--r-- 1 mcc users 278K Apr 22 14:29 LTLCardinality.xml
-rw-r--r-- 1 mcc users 31K Apr 22 14:29 LTLFireability.txt
-rw-r--r-- 1 mcc users 86K Apr 22 14:29 LTLFireability.xml
-rw-r--r-- 1 mcc users 405K Apr 12 22:08 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 1.5M Apr 12 22:08 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 383K Apr 12 21:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 1.3M Apr 12 21:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 19K Apr 22 14:29 UpperBounds.txt
-rw-r--r-- 1 mcc users 37K Apr 22 14:29 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 534K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME BART-PT-002-LTLCardinality-00
FORMULA_NAME BART-PT-002-LTLCardinality-01
FORMULA_NAME BART-PT-002-LTLCardinality-02
FORMULA_NAME BART-PT-002-LTLCardinality-03
FORMULA_NAME BART-PT-002-LTLCardinality-04
FORMULA_NAME BART-PT-002-LTLCardinality-05
FORMULA_NAME BART-PT-002-LTLCardinality-06
FORMULA_NAME BART-PT-002-LTLCardinality-07
FORMULA_NAME BART-PT-002-LTLCardinality-08
FORMULA_NAME BART-PT-002-LTLCardinality-09
FORMULA_NAME BART-PT-002-LTLCardinality-10
FORMULA_NAME BART-PT-002-LTLCardinality-11
FORMULA_NAME BART-PT-002-LTLCardinality-12
FORMULA_NAME BART-PT-002-LTLCardinality-13
FORMULA_NAME BART-PT-002-LTLCardinality-14
FORMULA_NAME BART-PT-002-LTLCardinality-15
=== Now, execution of the tool begins
BK_START 1717232334354
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=LTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=BART-PT-002
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 08:58:56] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -timeout, 360, -rebuildPNML]
[2024-06-01 08:58:56] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 08:58:56] [INFO ] Load time of PNML (sax parser for PT used): 205 ms
[2024-06-01 08:58:56] [INFO ] Transformed 474 places.
[2024-06-01 08:58:56] [INFO ] Transformed 404 transitions.
[2024-06-01 08:58:56] [INFO ] Found NUPN structural information;
[2024-06-01 08:58:56] [INFO ] Parsed PT model containing 474 places and 404 transitions and 3240 arcs in 454 ms.
Parsed 16 properties from file /home/mcc/execution/LTLCardinality.xml in 49 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 2 formulas.
Reduce places removed 210 places and 0 transitions.
Initial state reduction rules removed 2 formulas.
FORMULA BART-PT-002-LTLCardinality-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-002-LTLCardinality-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-002-LTLCardinality-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-002-LTLCardinality-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-002-LTLCardinality-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-002-LTLCardinality-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-002-LTLCardinality-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-002-LTLCardinality-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-002-LTLCardinality-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-002-LTLCardinality-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-002-LTLCardinality-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-002-LTLCardinality-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-002-LTLCardinality-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-002-LTLCardinality-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-002-LTLCardinality-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 2 out of 264 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 264/264 places, 404/404 transitions.
Discarding 63 places :
Symmetric choice reduction at 0 with 63 rule applications. Total rules 63 place count 201 transition count 341
Iterating global reduction 0 with 63 rules applied. Total rules applied 126 place count 201 transition count 341
Discarding 52 places :
Symmetric choice reduction at 0 with 52 rule applications. Total rules 178 place count 149 transition count 289
Iterating global reduction 0 with 52 rules applied. Total rules applied 230 place count 149 transition count 289
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 238 place count 141 transition count 281
Iterating global reduction 0 with 8 rules applied. Total rules applied 246 place count 141 transition count 281
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 251 place count 136 transition count 276
Iterating global reduction 0 with 5 rules applied. Total rules applied 256 place count 136 transition count 276
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 261 place count 131 transition count 271
Iterating global reduction 0 with 5 rules applied. Total rules applied 266 place count 131 transition count 271
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 271 place count 126 transition count 266
Iterating global reduction 0 with 5 rules applied. Total rules applied 276 place count 126 transition count 266
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 281 place count 121 transition count 261
Iterating global reduction 0 with 5 rules applied. Total rules applied 286 place count 121 transition count 261
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 291 place count 116 transition count 256
Iterating global reduction 0 with 5 rules applied. Total rules applied 296 place count 116 transition count 256
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 300 place count 112 transition count 252
Iterating global reduction 0 with 4 rules applied. Total rules applied 304 place count 112 transition count 252
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 307 place count 109 transition count 249
Iterating global reduction 0 with 3 rules applied. Total rules applied 310 place count 109 transition count 249
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 312 place count 107 transition count 247
Iterating global reduction 0 with 2 rules applied. Total rules applied 314 place count 107 transition count 247
Applied a total of 314 rules in 118 ms. Remains 107 /264 variables (removed 157) and now considering 247/404 (removed 157) transitions.
// Phase 1: matrix 247 rows 107 cols
[2024-06-01 08:58:57] [INFO ] Computed 2 invariants in 23 ms
[2024-06-01 08:58:57] [INFO ] Implicit Places using invariants in 323 ms returned []
[2024-06-01 08:58:57] [INFO ] Invariant cache hit.
[2024-06-01 08:58:57] [INFO ] Implicit Places using invariants and state equation in 199 ms returned []
Implicit Place search using SMT with State Equation took 569 ms to find 0 implicit places.
Running 175 sub problems to find dead transitions.
[2024-06-01 08:58:57] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/105 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 175 unsolved
At refinement iteration 1 (OVERLAPS) 2/107 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 175 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/107 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 175 unsolved
At refinement iteration 3 (OVERLAPS) 247/354 variables, 107/109 constraints. Problems are: Problem set: 0 solved, 175 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/354 variables, 0/109 constraints. Problems are: Problem set: 0 solved, 175 unsolved
At refinement iteration 5 (OVERLAPS) 0/354 variables, 0/109 constraints. Problems are: Problem set: 0 solved, 175 unsolved
No progress, stopping.
After SMT solving in domain Real declared 354/354 variables, and 109 constraints, problems are : Problem set: 0 solved, 175 unsolved in 4934 ms.
Refiners :[Positive P Invariants (semi-flows): 2/2 constraints, State Equation: 107/107 constraints, PredecessorRefiner: 175/175 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 175 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/105 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 175 unsolved
At refinement iteration 1 (OVERLAPS) 2/107 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 175 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/107 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 175 unsolved
At refinement iteration 3 (OVERLAPS) 247/354 variables, 107/109 constraints. Problems are: Problem set: 0 solved, 175 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/354 variables, 175/284 constraints. Problems are: Problem set: 0 solved, 175 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/354 variables, 0/284 constraints. Problems are: Problem set: 0 solved, 175 unsolved
At refinement iteration 6 (OVERLAPS) 0/354 variables, 0/284 constraints. Problems are: Problem set: 0 solved, 175 unsolved
No progress, stopping.
After SMT solving in domain Int declared 354/354 variables, and 284 constraints, problems are : Problem set: 0 solved, 175 unsolved in 3691 ms.
Refiners :[Positive P Invariants (semi-flows): 2/2 constraints, State Equation: 107/107 constraints, PredecessorRefiner: 175/175 constraints, Known Traps: 0/0 constraints]
After SMT, in 8731ms problems are : Problem set: 0 solved, 175 unsolved
Search for dead transitions found 0 dead transitions in 8754ms
Starting structural reductions in LTL mode, iteration 1 : 107/264 places, 247/404 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9470 ms. Remains : 107/264 places, 247/404 transitions.
Support contains 2 out of 107 places after structural reductions.
[2024-06-01 08:59:06] [INFO ] Flatten gal took : 58 ms
[2024-06-01 08:59:06] [INFO ] Flatten gal took : 20 ms
[2024-06-01 08:59:06] [INFO ] Input system was already deterministic with 247 transitions.
RANDOM walk for 1490 steps (0 resets) in 86 ms. (17 steps per ms) remains 0/2 properties
FORMULA BART-PT-002-LTLCardinality-11 FALSE TECHNIQUES REACHABILITY_KNOWLEDGE
Computed a total of 0 stabilizing places and 0 stable transitions
All properties solved by simple procedures.
Total runtime 10734 ms.
ITS solved all properties within timeout
BK_STOP 1717232346934
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination LTLCardinality -timeout 360 -rebuildPNML
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BART-PT-002"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is BART-PT-002, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r468-smll-171620167700443"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/BART-PT-002.tgz
mv BART-PT-002 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;