Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r468-smll-171620167700434.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is BART-COL-060, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r468-smll-171620167700434
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 628K
-rw-r--r-- 1 mcc users 7.2K Apr 13 01:12 CTLCardinality.txt
-rw-r--r-- 1 mcc users 65K Apr 13 01:12 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.6K Apr 12 22:53 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K Apr 12 22:53 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Apr 22 14:29 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 22 14:29 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Apr 22 14:29 LTLFireability.txt
-rw-r--r-- 1 mcc users 14K Apr 22 14:29 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Apr 13 06:31 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 91K Apr 13 06:31 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.3K Apr 13 03:22 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 71K Apr 13 03:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:29 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 22 14:29 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_pt
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 5 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 219K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BART-COL-060-CTLFireability-2024-00
FORMULA_NAME BART-COL-060-CTLFireability-2024-01
FORMULA_NAME BART-COL-060-CTLFireability-2024-02
FORMULA_NAME BART-COL-060-CTLFireability-2024-03
FORMULA_NAME BART-COL-060-CTLFireability-2024-04
FORMULA_NAME BART-COL-060-CTLFireability-2024-05
FORMULA_NAME BART-COL-060-CTLFireability-2024-06
FORMULA_NAME BART-COL-060-CTLFireability-2024-07
FORMULA_NAME BART-COL-060-CTLFireability-2024-08
FORMULA_NAME BART-COL-060-CTLFireability-2024-09
FORMULA_NAME BART-COL-060-CTLFireability-2024-10
FORMULA_NAME BART-COL-060-CTLFireability-2024-11
FORMULA_NAME BART-COL-060-CTLFireability-2024-12
FORMULA_NAME BART-COL-060-CTLFireability-2024-13
FORMULA_NAME BART-COL-060-CTLFireability-2024-14
FORMULA_NAME BART-COL-060-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717232119854

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=BART-COL-060
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 08:55:22] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 08:55:22] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 08:55:22] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2024-06-01 08:55:23] [WARNING] Using fallBack plugin, rng conformance not checked
[2024-06-01 08:55:24] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 1640 ms
[2024-06-01 08:55:24] [INFO ] Detected 3 constant HL places corresponding to 10373 PT places.
[2024-06-01 08:55:24] [INFO ] Imported 4 HL places and 7 HL transitions for a total of 25133 PT places and 8.443377072E10 transition bindings in 150 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 27 ms.
[2024-06-01 08:55:24] [INFO ] Built PT skeleton of HLPN with 4 places and 7 transitions 26 arcs in 9 ms.
[2024-06-01 08:55:24] [INFO ] Skeletonized 0 HLPN properties in 3 ms. Removed 16 properties that had guard overlaps.
Symmetric sort wr.t. initial and guards and successors and join/free detected :trainid
Symmetric sort wr.t. initial detected :trainid
Symmetric sort wr.t. initial and guards detected :trainid
Applying symmetric unfolding of full symmetric sort :trainid domain size was 60
Domain [distance(41), speed(6), distance(41)] of place NewDistTable breaks symmetries in sort distance
Arc [3:1*[$db, (MOD (ADD $tsp 1) 6), $da2]] contains successor/predecessor on variables of sort speed
[2024-06-01 08:55:25] [INFO ] Unfolded HLPN to a Petri net with 10619 places and 323 transitions 601 arcs in 733 ms.
[2024-06-01 08:55:25] [INFO ] Unfolded 16 HLPN properties in 4 ms.
[2024-06-01 08:55:25] [INFO ] Reduced 35 identical enabling conditions.
[2024-06-01 08:55:25] [INFO ] Reduced 35 identical enabling conditions.
[2024-06-01 08:55:25] [INFO ] Reduced 35 identical enabling conditions.
[2024-06-01 08:55:25] [INFO ] Reduced 35 identical enabling conditions.
[2024-06-01 08:55:25] [INFO ] Reduced 35 identical enabling conditions.
[2024-06-01 08:55:25] [INFO ] Reduced 35 identical enabling conditions.
[2024-06-01 08:55:25] [INFO ] Reduced 35 identical enabling conditions.
[2024-06-01 08:55:25] [INFO ] Reduced 35 identical enabling conditions.
[2024-06-01 08:55:25] [INFO ] Reduced 35 identical enabling conditions.
[2024-06-01 08:55:25] [INFO ] Reduced 35 identical enabling conditions.
[2024-06-01 08:55:25] [INFO ] Reduced 35 identical enabling conditions.
[2024-06-01 08:55:25] [INFO ] Reduced 35 identical enabling conditions.
[2024-06-01 08:55:25] [INFO ] Reduced 35 identical enabling conditions.
[2024-06-01 08:55:25] [INFO ] Reduced 35 identical enabling conditions.
[2024-06-01 08:55:25] [INFO ] Reduced 35 identical enabling conditions.
Deduced a syphon composed of 10215 places in 4 ms
Reduce places removed 10487 places and 121 transitions.
Support contains 132 out of 132 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Applied a total of 0 rules in 18 ms. Remains 132 /132 variables (removed 0) and now considering 202/202 (removed 0) transitions.
// Phase 1: matrix 202 rows 132 cols
[2024-06-01 08:55:25] [INFO ] Computed 1 invariants in 19 ms
[2024-06-01 08:55:25] [INFO ] Implicit Places using invariants in 349 ms returned []
[2024-06-01 08:55:26] [INFO ] Invariant cache hit.
[2024-06-01 08:55:26] [INFO ] Implicit Places using invariants and state equation in 180 ms returned []
Implicit Place search using SMT with State Equation took 573 ms to find 0 implicit places.
Running 166 sub problems to find dead transitions.
[2024-06-01 08:55:26] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/131 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 166 unsolved
At refinement iteration 1 (OVERLAPS) 1/132 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 166 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/132 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 166 unsolved
At refinement iteration 3 (OVERLAPS) 202/334 variables, 132/133 constraints. Problems are: Problem set: 0 solved, 166 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/334 variables, 0/133 constraints. Problems are: Problem set: 0 solved, 166 unsolved
At refinement iteration 5 (OVERLAPS) 0/334 variables, 0/133 constraints. Problems are: Problem set: 0 solved, 166 unsolved
No progress, stopping.
After SMT solving in domain Real declared 334/334 variables, and 133 constraints, problems are : Problem set: 0 solved, 166 unsolved in 6463 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, State Equation: 132/132 constraints, PredecessorRefiner: 166/166 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 166 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/131 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 166 unsolved
At refinement iteration 1 (OVERLAPS) 1/132 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 166 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/132 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 166 unsolved
At refinement iteration 3 (OVERLAPS) 202/334 variables, 132/133 constraints. Problems are: Problem set: 0 solved, 166 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/334 variables, 166/299 constraints. Problems are: Problem set: 0 solved, 166 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/334 variables, 0/299 constraints. Problems are: Problem set: 0 solved, 166 unsolved
At refinement iteration 6 (OVERLAPS) 0/334 variables, 0/299 constraints. Problems are: Problem set: 0 solved, 166 unsolved
No progress, stopping.
After SMT solving in domain Int declared 334/334 variables, and 299 constraints, problems are : Problem set: 0 solved, 166 unsolved in 5420 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, State Equation: 132/132 constraints, PredecessorRefiner: 166/166 constraints, Known Traps: 0/0 constraints]
After SMT, in 11972ms problems are : Problem set: 0 solved, 166 unsolved
Search for dead transitions found 0 dead transitions in 11997ms
Finished structural reductions in LTL mode , in 1 iterations and 12618 ms. Remains : 132/132 places, 202/202 transitions.
Support contains 132 out of 132 places after structural reductions.
[2024-06-01 08:55:38] [INFO ] Flatten gal took : 88 ms
[2024-06-01 08:55:38] [INFO ] Flatten gal took : 48 ms
[2024-06-01 08:55:38] [INFO ] Input system was already deterministic with 202 transitions.
Reduction of identical properties reduced properties to check from 18 to 17
RANDOM walk for 40052 steps (8 resets) in 221 ms. (180 steps per ms) remains 1/17 properties
BEST_FIRST walk for 40004 steps (8 resets) in 1636 ms. (24 steps per ms) remains 1/1 properties
[2024-06-01 08:55:39] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/99 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 1 (OVERLAPS) 33/132 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/132 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 3 (OVERLAPS) 202/334 variables, 132/133 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/334 variables, 0/133 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 5 (OVERLAPS) 0/334 variables, 0/133 constraints. Problems are: Problem set: 0 solved, 1 unsolved
No progress, stopping.
After SMT solving in domain Real declared 334/334 variables, and 133 constraints, problems are : Problem set: 0 solved, 1 unsolved in 216 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, State Equation: 132/132 constraints, PredecessorRefiner: 1/1 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 1 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/99 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 1 (OVERLAPS) 33/132 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/132 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 3 (OVERLAPS) 202/334 variables, 132/133 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/334 variables, 1/134 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/334 variables, 0/134 constraints. Problems are: Problem set: 0 solved, 1 unsolved
At refinement iteration 6 (OVERLAPS) 0/334 variables, 0/134 constraints. Problems are: Problem set: 0 solved, 1 unsolved
No progress, stopping.
After SMT solving in domain Int declared 334/334 variables, and 134 constraints, problems are : Problem set: 0 solved, 1 unsolved in 326 ms.
Refiners :[Positive P Invariants (semi-flows): 1/1 constraints, State Equation: 132/132 constraints, PredecessorRefiner: 1/1 constraints, Known Traps: 0/0 constraints]
After SMT, in 590ms problems are : Problem set: 0 solved, 1 unsolved
Finished Parikh walk after 98 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=49 )
Parikh walk visited 1 properties in 11 ms.
[2024-06-01 08:55:40] [INFO ] Flatten gal took : 18 ms
[2024-06-01 08:55:40] [INFO ] Flatten gal took : 24 ms
[2024-06-01 08:55:40] [INFO ] Input system was already deterministic with 202 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Applied a total of 0 rules in 2 ms. Remains 132 /132 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 132/132 places, 202/202 transitions.
[2024-06-01 08:55:40] [INFO ] Flatten gal took : 10 ms
[2024-06-01 08:55:40] [INFO ] Flatten gal took : 11 ms
[2024-06-01 08:55:40] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Applied a total of 0 rules in 1 ms. Remains 132 /132 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 132/132 places, 202/202 transitions.
[2024-06-01 08:55:40] [INFO ] Flatten gal took : 11 ms
[2024-06-01 08:55:40] [INFO ] Flatten gal took : 11 ms
[2024-06-01 08:55:40] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Applied a total of 0 rules in 1 ms. Remains 132 /132 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 132/132 places, 202/202 transitions.
[2024-06-01 08:55:40] [INFO ] Flatten gal took : 10 ms
[2024-06-01 08:55:40] [INFO ] Flatten gal took : 11 ms
[2024-06-01 08:55:40] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Applied a total of 0 rules in 4 ms. Remains 132 /132 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 132/132 places, 202/202 transitions.
[2024-06-01 08:55:40] [INFO ] Flatten gal took : 9 ms
[2024-06-01 08:55:40] [INFO ] Flatten gal took : 9 ms
[2024-06-01 08:55:40] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Applied a total of 0 rules in 3 ms. Remains 132 /132 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 132/132 places, 202/202 transitions.
[2024-06-01 08:55:40] [INFO ] Flatten gal took : 8 ms
[2024-06-01 08:55:40] [INFO ] Flatten gal took : 8 ms
[2024-06-01 08:55:40] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Performed 23 Post agglomeration using F-continuation condition.Transition count delta: 23
Iterating post reduction 0 with 23 rules applied. Total rules applied 23 place count 132 transition count 179
Reduce places removed 23 places and 0 transitions.
Iterating post reduction 1 with 23 rules applied. Total rules applied 46 place count 109 transition count 179
Applied a total of 46 rules in 23 ms. Remains 109 /132 variables (removed 23) and now considering 179/202 (removed 23) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 23 ms. Remains : 109/132 places, 179/202 transitions.
[2024-06-01 08:55:40] [INFO ] Flatten gal took : 7 ms
[2024-06-01 08:55:40] [INFO ] Flatten gal took : 7 ms
[2024-06-01 08:55:40] [INFO ] Input system was already deterministic with 179 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Applied a total of 0 rules in 5 ms. Remains 132 /132 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 132/132 places, 202/202 transitions.
[2024-06-01 08:55:40] [INFO ] Flatten gal took : 8 ms
[2024-06-01 08:55:40] [INFO ] Flatten gal took : 10 ms
[2024-06-01 08:55:40] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Applied a total of 0 rules in 1 ms. Remains 132 /132 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 132/132 places, 202/202 transitions.
[2024-06-01 08:55:40] [INFO ] Flatten gal took : 8 ms
[2024-06-01 08:55:40] [INFO ] Flatten gal took : 9 ms
[2024-06-01 08:55:40] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Applied a total of 0 rules in 1 ms. Remains 132 /132 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 132/132 places, 202/202 transitions.
[2024-06-01 08:55:40] [INFO ] Flatten gal took : 8 ms
[2024-06-01 08:55:40] [INFO ] Flatten gal took : 9 ms
[2024-06-01 08:55:40] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Applied a total of 0 rules in 1 ms. Remains 132 /132 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 132/132 places, 202/202 transitions.
[2024-06-01 08:55:40] [INFO ] Flatten gal took : 7 ms
[2024-06-01 08:55:40] [INFO ] Flatten gal took : 9 ms
[2024-06-01 08:55:40] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 132 transition count 199
Reduce places removed 3 places and 0 transitions.
Performed 27 Post agglomeration using F-continuation condition.Transition count delta: 27
Iterating post reduction 1 with 30 rules applied. Total rules applied 33 place count 129 transition count 172
Reduce places removed 27 places and 0 transitions.
Iterating post reduction 2 with 27 rules applied. Total rules applied 60 place count 102 transition count 172
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 61 place count 101 transition count 171
Iterating global reduction 3 with 1 rules applied. Total rules applied 62 place count 101 transition count 171
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 3 with 8 rules applied. Total rules applied 70 place count 97 transition count 167
Applied a total of 70 rules in 21 ms. Remains 97 /132 variables (removed 35) and now considering 167/202 (removed 35) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 21 ms. Remains : 97/132 places, 167/202 transitions.
[2024-06-01 08:55:40] [INFO ] Flatten gal took : 6 ms
[2024-06-01 08:55:40] [INFO ] Flatten gal took : 8 ms
[2024-06-01 08:55:40] [INFO ] Input system was already deterministic with 167 transitions.
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 129 transition count 199
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 129 transition count 199
Applied a total of 6 rules in 7 ms. Remains 129 /132 variables (removed 3) and now considering 199/202 (removed 3) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 129/132 places, 199/202 transitions.
[2024-06-01 08:55:41] [INFO ] Flatten gal took : 7 ms
[2024-06-01 08:55:41] [INFO ] Flatten gal took : 6 ms
[2024-06-01 08:55:41] [INFO ] Input system was already deterministic with 199 transitions.
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Discarding 23 places :
Symmetric choice reduction at 0 with 23 rule applications. Total rules 23 place count 109 transition count 179
Iterating global reduction 0 with 23 rules applied. Total rules applied 46 place count 109 transition count 179
Discarding 19 places :
Symmetric choice reduction at 0 with 19 rule applications. Total rules 65 place count 90 transition count 160
Iterating global reduction 0 with 19 rules applied. Total rules applied 84 place count 90 transition count 160
Applied a total of 84 rules in 13 ms. Remains 90 /132 variables (removed 42) and now considering 160/202 (removed 42) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13 ms. Remains : 90/132 places, 160/202 transitions.
[2024-06-01 08:55:41] [INFO ] Flatten gal took : 9 ms
[2024-06-01 08:55:41] [INFO ] Flatten gal took : 5 ms
[2024-06-01 08:55:41] [INFO ] Input system was already deterministic with 160 transitions.
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Applied a total of 0 rules in 2 ms. Remains 132 /132 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 132/132 places, 202/202 transitions.
[2024-06-01 08:55:41] [INFO ] Flatten gal took : 6 ms
[2024-06-01 08:55:41] [INFO ] Flatten gal took : 7 ms
[2024-06-01 08:55:41] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Applied a total of 0 rules in 2 ms. Remains 132 /132 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 132/132 places, 202/202 transitions.
[2024-06-01 08:55:41] [INFO ] Flatten gal took : 6 ms
[2024-06-01 08:55:41] [INFO ] Flatten gal took : 7 ms
[2024-06-01 08:55:41] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Applied a total of 0 rules in 2 ms. Remains 132 /132 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 132/132 places, 202/202 transitions.
[2024-06-01 08:55:41] [INFO ] Flatten gal took : 6 ms
[2024-06-01 08:55:41] [INFO ] Flatten gal took : 7 ms
[2024-06-01 08:55:41] [INFO ] Input system was already deterministic with 202 transitions.
[2024-06-01 08:55:41] [INFO ] Flatten gal took : 21 ms
[2024-06-01 08:55:41] [INFO ] Flatten gal took : 18 ms
[2024-06-01 08:55:41] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 20 ms.
[2024-06-01 08:55:41] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 132 places, 202 transitions and 404 arcs took 5 ms.
Total runtime 18947 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : BART-COL-060-CTLFireability-2024-00
Could not compute solution for formula : BART-COL-060-CTLFireability-2024-01
Could not compute solution for formula : BART-COL-060-CTLFireability-2024-02
Could not compute solution for formula : BART-COL-060-CTLFireability-2024-03
Could not compute solution for formula : BART-COL-060-CTLFireability-2024-04
Could not compute solution for formula : BART-COL-060-CTLFireability-2024-05
Could not compute solution for formula : BART-COL-060-CTLFireability-2024-06
Could not compute solution for formula : BART-COL-060-CTLFireability-2024-07
Could not compute solution for formula : BART-COL-060-CTLFireability-2024-08
Could not compute solution for formula : BART-COL-060-CTLFireability-2024-09
Could not compute solution for formula : BART-COL-060-CTLFireability-2024-10
Could not compute solution for formula : BART-COL-060-CTLFireability-2024-11
Could not compute solution for formula : BART-COL-060-CTLFireability-2024-12
Could not compute solution for formula : BART-COL-060-CTLFireability-2024-13
Could not compute solution for formula : BART-COL-060-CTLFireability-2024-14
Could not compute solution for formula : BART-COL-060-CTLFireability-2024-15

BK_STOP 1717232141982

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ perl -pe 's/.*\.//g'
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name BART-COL-060-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/521/ctl_0_
ctl formula name BART-COL-060-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/521/ctl_1_
ctl formula name BART-COL-060-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/521/ctl_2_
ctl formula name BART-COL-060-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/521/ctl_3_
ctl formula name BART-COL-060-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/521/ctl_4_
ctl formula name BART-COL-060-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/521/ctl_5_
ctl formula name BART-COL-060-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/521/ctl_6_
ctl formula name BART-COL-060-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/521/ctl_7_
ctl formula name BART-COL-060-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/521/ctl_8_
ctl formula name BART-COL-060-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/521/ctl_9_
ctl formula name BART-COL-060-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/521/ctl_10_
ctl formula name BART-COL-060-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/521/ctl_11_
ctl formula name BART-COL-060-CTLFireability-2024-12
ctl formula formula --ctl=/tmp/521/ctl_12_
ctl formula name BART-COL-060-CTLFireability-2024-13
ctl formula formula --ctl=/tmp/521/ctl_13_
ctl formula name BART-COL-060-CTLFireability-2024-14
ctl formula formula --ctl=/tmp/521/ctl_14_
ctl formula name BART-COL-060-CTLFireability-2024-15
ctl formula formula --ctl=/tmp/521/ctl_15_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BART-COL-060"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is BART-COL-060, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r468-smll-171620167700434"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BART-COL-060.tgz
mv BART-COL-060 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;