fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r468-smll-171620167000090
Last Updated
July 7, 2024

About the Execution of LTSMin+red for AutoFlight-PT-03a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
354.027 6742.00 15416.00 144.20 ?T?????????????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r468-smll-171620167000090.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is AutoFlight-PT-03a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r468-smll-171620167000090
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 444K
-rw-r--r-- 1 mcc users 5.9K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 63K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Apr 22 14:28 LTLCardinality.txt
-rw-r--r-- 1 mcc users 30K Apr 22 14:28 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Apr 22 14:28 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Apr 22 14:28 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.0K Apr 12 22:09 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 94K Apr 12 22:09 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.2K Apr 12 22:07 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K Apr 12 22:07 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 22 14:28 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 22 14:28 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 23K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-2024-00
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-2024-01
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-2024-02
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-2024-03
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-2024-04
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-2024-05
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-2024-06
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-2024-07
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-2024-08
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-2024-09
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-2024-10
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-2024-11
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-2023-12
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-2023-13
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-2023-14
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717183585330

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AutoFlight-PT-03a
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-05-31 19:26:27] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-05-31 19:26:27] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-31 19:26:27] [INFO ] Load time of PNML (sax parser for PT used): 80 ms
[2024-05-31 19:26:27] [INFO ] Transformed 82 places.
[2024-05-31 19:26:27] [INFO ] Transformed 80 transitions.
[2024-05-31 19:26:27] [INFO ] Found NUPN structural information;
[2024-05-31 19:26:27] [INFO ] Parsed PT model containing 82 places and 80 transitions and 260 arcs in 252 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 108 ms.
Ensure Unique test removed 15 transitions
Reduce redundant transitions removed 15 transitions.
Support contains 66 out of 82 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 82/82 places, 65/65 transitions.
Applied a total of 0 rules in 16 ms. Remains 82 /82 variables (removed 0) and now considering 65/65 (removed 0) transitions.
// Phase 1: matrix 65 rows 82 cols
[2024-05-31 19:26:27] [INFO ] Computed 22 invariants in 13 ms
[2024-05-31 19:26:27] [INFO ] Implicit Places using invariants in 294 ms returned [27, 67]
Discarding 2 places :
Implicit Place search using SMT only with invariants took 342 ms to find 2 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 80/82 places, 65/65 transitions.
Applied a total of 0 rules in 2 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 394 ms. Remains : 80/82 places, 65/65 transitions.
Support contains 66 out of 80 places after structural reductions.
[2024-05-31 19:26:28] [INFO ] Flatten gal took : 47 ms
[2024-05-31 19:26:28] [INFO ] Flatten gal took : 16 ms
[2024-05-31 19:26:28] [INFO ] Input system was already deterministic with 65 transitions.
Reduction of identical properties reduced properties to check from 71 to 60
RANDOM walk for 40000 steps (1441 resets) in 2366 ms. (16 steps per ms) remains 7/60 properties
BEST_FIRST walk for 40003 steps (341 resets) in 292 ms. (136 steps per ms) remains 7/7 properties
BEST_FIRST walk for 40003 steps (303 resets) in 90 ms. (439 steps per ms) remains 7/7 properties
BEST_FIRST walk for 40002 steps (311 resets) in 115 ms. (344 steps per ms) remains 7/7 properties
BEST_FIRST walk for 40003 steps (8 resets) in 150 ms. (264 steps per ms) remains 7/7 properties
BEST_FIRST walk for 40004 steps (364 resets) in 123 ms. (322 steps per ms) remains 7/7 properties
BEST_FIRST walk for 40002 steps (338 resets) in 108 ms. (366 steps per ms) remains 7/7 properties
BEST_FIRST walk for 40002 steps (280 resets) in 124 ms. (320 steps per ms) remains 7/7 properties
// Phase 1: matrix 65 rows 80 cols
[2024-05-31 19:26:29] [INFO ] Computed 20 invariants in 8 ms
[2024-05-31 19:26:29] [INFO ] State equation strengthened by 14 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/22 variables, 22/22 constraints. Problems are: Problem set: 0 solved, 7 unsolved
Problem AtomicPropp25 is UNSAT
At refinement iteration 1 (INCLUDED_ONLY) 0/22 variables, 3/25 constraints. Problems are: Problem set: 1 solved, 6 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/22 variables, 0/25 constraints. Problems are: Problem set: 1 solved, 6 unsolved
Problem AtomicPropp22 is UNSAT
Problem AtomicPropp32 is UNSAT
Problem AtomicPropp62 is UNSAT
Problem AtomicPropp67 is UNSAT
At refinement iteration 3 (OVERLAPS) 58/80 variables, 17/42 constraints. Problems are: Problem set: 5 solved, 2 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/80 variables, 58/100 constraints. Problems are: Problem set: 5 solved, 2 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/80 variables, 0/100 constraints. Problems are: Problem set: 5 solved, 2 unsolved
At refinement iteration 6 (OVERLAPS) 65/145 variables, 80/180 constraints. Problems are: Problem set: 5 solved, 2 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/145 variables, 14/194 constraints. Problems are: Problem set: 5 solved, 2 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/145 variables, 0/194 constraints. Problems are: Problem set: 5 solved, 2 unsolved
[2024-05-31 19:26:30] [INFO ] Deduced a trap composed of 33 places in 86 ms of which 10 ms to minimize.
[2024-05-31 19:26:30] [INFO ] Deduced a trap composed of 35 places in 70 ms of which 2 ms to minimize.
At refinement iteration 9 (OVERLAPS) 0/145 variables, 2/196 constraints. Problems are: Problem set: 5 solved, 2 unsolved
At refinement iteration 10 (INCLUDED_ONLY) 0/145 variables, 0/196 constraints. Problems are: Problem set: 5 solved, 2 unsolved
At refinement iteration 11 (OVERLAPS) 0/145 variables, 0/196 constraints. Problems are: Problem set: 5 solved, 2 unsolved
No progress, stopping.
After SMT solving in domain Real declared 145/145 variables, and 196 constraints, problems are : Problem set: 5 solved, 2 unsolved in 500 ms.
Refiners :[Domain max(s): 80/80 constraints, Positive P Invariants (semi-flows): 20/20 constraints, State Equation: 80/80 constraints, ReadFeed: 14/14 constraints, PredecessorRefiner: 7/7 constraints, Known Traps: 2/2 constraints]
Escalating to Integer solving :Problem set: 5 solved, 2 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/6 variables, 6/6 constraints. Problems are: Problem set: 5 solved, 2 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/6 variables, 0/6 constraints. Problems are: Problem set: 5 solved, 2 unsolved
At refinement iteration 2 (OVERLAPS) 50/56 variables, 7/13 constraints. Problems are: Problem set: 5 solved, 2 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/56 variables, 50/63 constraints. Problems are: Problem set: 5 solved, 2 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/56 variables, 0/63 constraints. Problems are: Problem set: 5 solved, 2 unsolved
At refinement iteration 5 (OVERLAPS) 24/80 variables, 13/76 constraints. Problems are: Problem set: 5 solved, 2 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/80 variables, 24/100 constraints. Problems are: Problem set: 5 solved, 2 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/80 variables, 2/102 constraints. Problems are: Problem set: 5 solved, 2 unsolved
[2024-05-31 19:26:30] [INFO ] Deduced a trap composed of 34 places in 82 ms of which 13 ms to minimize.
At refinement iteration 8 (INCLUDED_ONLY) 0/80 variables, 1/103 constraints. Problems are: Problem set: 5 solved, 2 unsolved
At refinement iteration 9 (INCLUDED_ONLY) 0/80 variables, 0/103 constraints. Problems are: Problem set: 5 solved, 2 unsolved
At refinement iteration 10 (OVERLAPS) 65/145 variables, 80/183 constraints. Problems are: Problem set: 5 solved, 2 unsolved
At refinement iteration 11 (INCLUDED_ONLY) 0/145 variables, 14/197 constraints. Problems are: Problem set: 5 solved, 2 unsolved
At refinement iteration 12 (INCLUDED_ONLY) 0/145 variables, 2/199 constraints. Problems are: Problem set: 5 solved, 2 unsolved
At refinement iteration 13 (INCLUDED_ONLY) 0/145 variables, 0/199 constraints. Problems are: Problem set: 5 solved, 2 unsolved
At refinement iteration 14 (OVERLAPS) 0/145 variables, 0/199 constraints. Problems are: Problem set: 5 solved, 2 unsolved
No progress, stopping.
After SMT solving in domain Int declared 145/145 variables, and 199 constraints, problems are : Problem set: 5 solved, 2 unsolved in 355 ms.
Refiners :[Domain max(s): 80/80 constraints, Positive P Invariants (semi-flows): 20/20 constraints, State Equation: 80/80 constraints, ReadFeed: 14/14 constraints, PredecessorRefiner: 2/7 constraints, Known Traps: 3/3 constraints]
After SMT, in 915ms problems are : Problem set: 5 solved, 2 unsolved
Parikh walk visited 0 properties in 121 ms.
Support contains 6 out of 80 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 80/80 places, 65/65 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 7 transitions
Trivial Post-agglo rules discarded 7 transitions
Performed 7 trivial Post agglomeration. Transition count delta: 7
Iterating post reduction 0 with 7 rules applied. Total rules applied 7 place count 80 transition count 58
Reduce places removed 7 places and 0 transitions.
Iterating post reduction 1 with 7 rules applied. Total rules applied 14 place count 73 transition count 58
Performed 6 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 6 Pre rules applied. Total rules applied 14 place count 73 transition count 52
Deduced a syphon composed of 6 places in 1 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 2 with 12 rules applied. Total rules applied 26 place count 67 transition count 52
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 2 with 8 rules applied. Total rules applied 34 place count 63 transition count 48
Free-agglomeration rule applied 6 times.
Iterating global reduction 2 with 6 rules applied. Total rules applied 40 place count 63 transition count 42
Reduce places removed 6 places and 0 transitions.
Iterating post reduction 2 with 6 rules applied. Total rules applied 46 place count 57 transition count 42
Applied a total of 46 rules in 64 ms. Remains 57 /80 variables (removed 23) and now considering 42/65 (removed 23) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 64 ms. Remains : 57/80 places, 42/65 transitions.
RANDOM walk for 40000 steps (8 resets) in 232 ms. (171 steps per ms) remains 0/2 properties
Successfully simplified 5 atomic propositions for a total of 16 simplifications.
[2024-05-31 19:26:30] [INFO ] Flatten gal took : 9 ms
[2024-05-31 19:26:30] [INFO ] Flatten gal took : 9 ms
[2024-05-31 19:26:31] [INFO ] Input system was already deterministic with 65 transitions.
Computed a total of 6 stabilizing places and 1 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Applied a total of 0 rules in 4 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 80/80 places, 65/65 transitions.
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 13 ms
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 7 ms
[2024-05-31 19:26:31] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Reduce places removed 1 places and 1 transitions.
Reduce places removed 5 places and 0 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 18 transitions
Trivial Post-agglo rules discarded 18 transitions
Performed 18 trivial Post agglomeration. Transition count delta: 18
Iterating post reduction 0 with 23 rules applied. Total rules applied 23 place count 74 transition count 46
Reduce places removed 18 places and 0 transitions.
Iterating post reduction 1 with 18 rules applied. Total rules applied 41 place count 56 transition count 46
Performed 8 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 8 Pre rules applied. Total rules applied 41 place count 56 transition count 38
Deduced a syphon composed of 8 places in 0 ms
Reduce places removed 11 places and 0 transitions.
Iterating global reduction 2 with 19 rules applied. Total rules applied 60 place count 45 transition count 38
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 3 Pre rules applied. Total rules applied 60 place count 45 transition count 35
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 66 place count 42 transition count 35
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 2 with 12 rules applied. Total rules applied 78 place count 36 transition count 29
Applied a total of 78 rules in 11 ms. Remains 36 /80 variables (removed 44) and now considering 29/65 (removed 36) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 11 ms. Remains : 36/80 places, 29/65 transitions.
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 3 ms
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 3 ms
[2024-05-31 19:26:31] [INFO ] Input system was already deterministic with 29 transitions.
RANDOM walk for 313 steps (27 resets) in 6 ms. (44 steps per ms) remains 0/1 properties
FORMULA AutoFlight-PT-03a-CTLFireability-2024-01 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Applied a total of 0 rules in 4 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 80/80 places, 65/65 transitions.
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 6 ms
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 6 ms
[2024-05-31 19:26:31] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Applied a total of 0 rules in 3 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 80/80 places, 65/65 transitions.
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 6 ms
[2024-05-31 19:26:31] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Applied a total of 0 rules in 3 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 80/80 places, 65/65 transitions.
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 6 ms
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 6 ms
[2024-05-31 19:26:31] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Applied a total of 0 rules in 3 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 80/80 places, 65/65 transitions.
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 6 ms
[2024-05-31 19:26:31] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Applied a total of 0 rules in 3 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 80/80 places, 65/65 transitions.
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 6 ms
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 6 ms
[2024-05-31 19:26:31] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Applied a total of 0 rules in 4 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 80/80 places, 65/65 transitions.
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:26:31] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 7 transitions
Trivial Post-agglo rules discarded 7 transitions
Performed 7 trivial Post agglomeration. Transition count delta: 7
Iterating post reduction 0 with 7 rules applied. Total rules applied 7 place count 80 transition count 58
Reduce places removed 7 places and 0 transitions.
Iterating post reduction 1 with 7 rules applied. Total rules applied 14 place count 73 transition count 58
Performed 6 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 6 Pre rules applied. Total rules applied 14 place count 73 transition count 52
Deduced a syphon composed of 6 places in 1 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 2 with 12 rules applied. Total rules applied 26 place count 67 transition count 52
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: 5
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 2 with 10 rules applied. Total rules applied 36 place count 62 transition count 47
Applied a total of 36 rules in 12 ms. Remains 62 /80 variables (removed 18) and now considering 47/65 (removed 18) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 62/80 places, 47/65 transitions.
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 4 ms
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:26:31] [INFO ] Input system was already deterministic with 47 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 80/80 places, 65/65 transitions.
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:26:31] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Applied a total of 0 rules in 2 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 80/80 places, 65/65 transitions.
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 4 ms
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:26:31] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Applied a total of 0 rules in 3 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 80/80 places, 65/65 transitions.
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 4 ms
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:26:31] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Applied a total of 0 rules in 2 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 80/80 places, 65/65 transitions.
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 11 ms
[2024-05-31 19:26:31] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 80/80 places, 65/65 transitions.
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:26:31] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 80/80 places, 65/65 transitions.
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 4 ms
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:26:31] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 80/80 places, 65/65 transitions.
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 4 ms
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 4 ms
[2024-05-31 19:26:31] [INFO ] Input system was already deterministic with 65 transitions.
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:26:31] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:26:31] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 7 ms.
[2024-05-31 19:26:31] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 80 places, 65 transitions and 224 arcs took 6 ms.
Total runtime 4505 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : AutoFlight-PT-03a-CTLFireability-2024-00
Could not compute solution for formula : AutoFlight-PT-03a-CTLFireability-2024-02
Could not compute solution for formula : AutoFlight-PT-03a-CTLFireability-2024-03
Could not compute solution for formula : AutoFlight-PT-03a-CTLFireability-2024-04
Could not compute solution for formula : AutoFlight-PT-03a-CTLFireability-2024-05
Could not compute solution for formula : AutoFlight-PT-03a-CTLFireability-2024-06
Could not compute solution for formula : AutoFlight-PT-03a-CTLFireability-2024-07
Could not compute solution for formula : AutoFlight-PT-03a-CTLFireability-2024-08
Could not compute solution for formula : AutoFlight-PT-03a-CTLFireability-2024-09
Could not compute solution for formula : AutoFlight-PT-03a-CTLFireability-2024-10
Could not compute solution for formula : AutoFlight-PT-03a-CTLFireability-2024-11
Could not compute solution for formula : AutoFlight-PT-03a-CTLFireability-2023-12
Could not compute solution for formula : AutoFlight-PT-03a-CTLFireability-2023-13
Could not compute solution for formula : AutoFlight-PT-03a-CTLFireability-2023-14
Could not compute solution for formula : AutoFlight-PT-03a-CTLFireability-2023-15

BK_STOP 1717183592072

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name AutoFlight-PT-03a-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/506/ctl_0_
ctl formula name AutoFlight-PT-03a-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/506/ctl_1_
ctl formula name AutoFlight-PT-03a-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/506/ctl_2_
ctl formula name AutoFlight-PT-03a-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/506/ctl_3_
ctl formula name AutoFlight-PT-03a-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/506/ctl_4_
ctl formula name AutoFlight-PT-03a-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/506/ctl_5_
ctl formula name AutoFlight-PT-03a-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/506/ctl_6_
ctl formula name AutoFlight-PT-03a-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/506/ctl_7_
ctl formula name AutoFlight-PT-03a-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/506/ctl_8_
ctl formula name AutoFlight-PT-03a-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/506/ctl_9_
ctl formula name AutoFlight-PT-03a-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/506/ctl_10_
ctl formula name AutoFlight-PT-03a-CTLFireability-2023-12
ctl formula formula --ctl=/tmp/506/ctl_11_
ctl formula name AutoFlight-PT-03a-CTLFireability-2023-13
ctl formula formula --ctl=/tmp/506/ctl_12_
ctl formula name AutoFlight-PT-03a-CTLFireability-2023-14
ctl formula formula --ctl=/tmp/506/ctl_13_
ctl formula name AutoFlight-PT-03a-CTLFireability-2023-15
ctl formula formula --ctl=/tmp/506/ctl_14_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AutoFlight-PT-03a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is AutoFlight-PT-03a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r468-smll-171620167000090"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AutoFlight-PT-03a.tgz
mv AutoFlight-PT-03a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;