Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r468-smll-171620166900050.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is Angiogenesis-PT-50, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r468-smll-171620166900050
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 488K
-rw-r--r-- 1 mcc users 9.4K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 92K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 61K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Apr 22 14:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Apr 22 14:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Apr 22 14:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 22 14:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Apr 11 19:32 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 122K Apr 11 19:32 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.4K Apr 11 19:32 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 40K Apr 11 19:32 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K May 19 07:09 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 19 15:23 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 33K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Angiogenesis-PT-50-CTLFireability-2024-00
FORMULA_NAME Angiogenesis-PT-50-CTLFireability-2024-01
FORMULA_NAME Angiogenesis-PT-50-CTLFireability-2024-02
FORMULA_NAME Angiogenesis-PT-50-CTLFireability-2024-03
FORMULA_NAME Angiogenesis-PT-50-CTLFireability-2024-04
FORMULA_NAME Angiogenesis-PT-50-CTLFireability-2024-05
FORMULA_NAME Angiogenesis-PT-50-CTLFireability-2024-06
FORMULA_NAME Angiogenesis-PT-50-CTLFireability-2024-07
FORMULA_NAME Angiogenesis-PT-50-CTLFireability-2024-08
FORMULA_NAME Angiogenesis-PT-50-CTLFireability-2024-09
FORMULA_NAME Angiogenesis-PT-50-CTLFireability-2024-10
FORMULA_NAME Angiogenesis-PT-50-CTLFireability-2024-11
FORMULA_NAME Angiogenesis-PT-50-CTLFireability-2023-12
FORMULA_NAME Angiogenesis-PT-50-CTLFireability-2023-13
FORMULA_NAME Angiogenesis-PT-50-CTLFireability-2023-14
FORMULA_NAME Angiogenesis-PT-50-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717182457511

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Angiogenesis-PT-50
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-05-31 19:07:39] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-05-31 19:07:39] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-31 19:07:39] [INFO ] Load time of PNML (sax parser for PT used): 75 ms
[2024-05-31 19:07:39] [INFO ] Transformed 39 places.
[2024-05-31 19:07:39] [INFO ] Transformed 64 transitions.
[2024-05-31 19:07:39] [INFO ] Parsed PT model containing 39 places and 64 transitions and 185 arcs in 305 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 23 ms.
Support contains 37 out of 39 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 39/39 places, 64/64 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 38 transition count 64
Applied a total of 1 rules in 35 ms. Remains 38 /39 variables (removed 1) and now considering 64/64 (removed 0) transitions.
// Phase 1: matrix 64 rows 38 cols
[2024-05-31 19:07:39] [INFO ] Computed 7 invariants in 14 ms
[2024-05-31 19:07:40] [INFO ] Implicit Places using invariants in 251 ms returned []
[2024-05-31 19:07:40] [INFO ] Invariant cache hit.
[2024-05-31 19:07:40] [INFO ] Implicit Places using invariants and state equation in 117 ms returned []
Implicit Place search using SMT with State Equation took 414 ms to find 0 implicit places.
Running 61 sub problems to find dead transitions.
[2024-05-31 19:07:40] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/38 variables, 7/7 constraints. Problems are: Problem set: 0 solved, 61 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/38 variables, 0/7 constraints. Problems are: Problem set: 0 solved, 61 unsolved
At refinement iteration 2 (OVERLAPS) 64/102 variables, 38/45 constraints. Problems are: Problem set: 0 solved, 61 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/102 variables, 0/45 constraints. Problems are: Problem set: 0 solved, 61 unsolved
At refinement iteration 4 (OVERLAPS) 0/102 variables, 0/45 constraints. Problems are: Problem set: 0 solved, 61 unsolved
No progress, stopping.
After SMT solving in domain Real declared 102/102 variables, and 45 constraints, problems are : Problem set: 0 solved, 61 unsolved in 1335 ms.
Refiners :[Positive P Invariants (semi-flows): 7/7 constraints, State Equation: 38/38 constraints, PredecessorRefiner: 61/61 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 61 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/38 variables, 7/7 constraints. Problems are: Problem set: 0 solved, 61 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/38 variables, 0/7 constraints. Problems are: Problem set: 0 solved, 61 unsolved
At refinement iteration 2 (OVERLAPS) 64/102 variables, 38/45 constraints. Problems are: Problem set: 0 solved, 61 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/102 variables, 61/106 constraints. Problems are: Problem set: 0 solved, 61 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/102 variables, 0/106 constraints. Problems are: Problem set: 0 solved, 61 unsolved
At refinement iteration 5 (OVERLAPS) 0/102 variables, 0/106 constraints. Problems are: Problem set: 0 solved, 61 unsolved
No progress, stopping.
After SMT solving in domain Int declared 102/102 variables, and 106 constraints, problems are : Problem set: 0 solved, 61 unsolved in 1396 ms.
Refiners :[Positive P Invariants (semi-flows): 7/7 constraints, State Equation: 38/38 constraints, PredecessorRefiner: 61/61 constraints, Known Traps: 0/0 constraints]
After SMT, in 2821ms problems are : Problem set: 0 solved, 61 unsolved
Search for dead transitions found 0 dead transitions in 2839ms
Starting structural reductions in LTL mode, iteration 1 : 38/39 places, 64/64 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3318 ms. Remains : 38/39 places, 64/64 transitions.
Support contains 37 out of 38 places after structural reductions.
[2024-05-31 19:07:43] [INFO ] Flatten gal took : 35 ms
[2024-05-31 19:07:43] [INFO ] Flatten gal took : 14 ms
[2024-05-31 19:07:43] [INFO ] Input system was already deterministic with 64 transitions.
Reduction of identical properties reduced properties to check from 60 to 59
RANDOM walk for 40043 steps (9 resets) in 581 ms. (68 steps per ms) remains 13/59 properties
BEST_FIRST walk for 40004 steps (8 resets) in 329 ms. (121 steps per ms) remains 3/13 properties
BEST_FIRST walk for 40004 steps (8 resets) in 189 ms. (210 steps per ms) remains 2/3 properties
BEST_FIRST walk for 36063 steps (7 resets) in 173 ms. (207 steps per ms) remains 0/2 properties
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 14 ms
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 16 ms
[2024-05-31 19:07:44] [INFO ] Input system was already deterministic with 64 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Applied a total of 0 rules in 3 ms. Remains 38 /38 variables (removed 0) and now considering 64/64 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 38/38 places, 64/64 transitions.
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 11 ms
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 11 ms
[2024-05-31 19:07:44] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Applied a total of 0 rules in 2 ms. Remains 38 /38 variables (removed 0) and now considering 64/64 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 38/38 places, 64/64 transitions.
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 10 ms
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 9 ms
[2024-05-31 19:07:44] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 38 transition count 63
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 36 transition count 63
Partial Post-agglomeration rule applied 4 times.
Drop transitions (Partial Post agglomeration) removed 4 transitions
Iterating global reduction 0 with 4 rules applied. Total rules applied 7 place count 36 transition count 63
Applied a total of 7 rules in 37 ms. Remains 36 /38 variables (removed 2) and now considering 63/64 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 37 ms. Remains : 36/38 places, 63/64 transitions.
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 8 ms
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 8 ms
[2024-05-31 19:07:44] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Applied a total of 0 rules in 2 ms. Remains 38 /38 variables (removed 0) and now considering 64/64 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 38/38 places, 64/64 transitions.
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 7 ms
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 8 ms
[2024-05-31 19:07:44] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Applied a total of 0 rules in 1 ms. Remains 38 /38 variables (removed 0) and now considering 64/64 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 38/38 places, 64/64 transitions.
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 7 ms
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 8 ms
[2024-05-31 19:07:44] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Applied a total of 0 rules in 1 ms. Remains 38 /38 variables (removed 0) and now considering 64/64 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 38/38 places, 64/64 transitions.
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 7 ms
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 8 ms
[2024-05-31 19:07:44] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Applied a total of 0 rules in 1 ms. Remains 38 /38 variables (removed 0) and now considering 64/64 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 38/38 places, 64/64 transitions.
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 4 ms
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:07:44] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Applied a total of 0 rules in 2 ms. Remains 38 /38 variables (removed 0) and now considering 64/64 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 38/38 places, 64/64 transitions.
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:07:44] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Applied a total of 0 rules in 1 ms. Remains 38 /38 variables (removed 0) and now considering 64/64 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 38/38 places, 64/64 transitions.
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 6 ms
[2024-05-31 19:07:44] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 38 transition count 63
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 36 transition count 63
Partial Post-agglomeration rule applied 4 times.
Drop transitions (Partial Post agglomeration) removed 4 transitions
Iterating global reduction 0 with 4 rules applied. Total rules applied 7 place count 36 transition count 63
Applied a total of 7 rules in 8 ms. Remains 36 /38 variables (removed 2) and now considering 63/64 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 36/38 places, 63/64 transitions.
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 4 ms
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:07:44] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Applied a total of 0 rules in 1 ms. Remains 38 /38 variables (removed 0) and now considering 64/64 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 38/38 places, 64/64 transitions.
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:07:44] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 38 transition count 63
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 36 transition count 63
Partial Post-agglomeration rule applied 3 times.
Drop transitions (Partial Post agglomeration) removed 3 transitions
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 36 transition count 63
Applied a total of 6 rules in 7 ms. Remains 36 /38 variables (removed 2) and now considering 63/64 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 36/38 places, 63/64 transitions.
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 4 ms
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:07:44] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Applied a total of 0 rules in 1 ms. Remains 38 /38 variables (removed 0) and now considering 64/64 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 38/38 places, 64/64 transitions.
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 4 ms
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:07:44] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Applied a total of 0 rules in 1 ms. Remains 38 /38 variables (removed 0) and now considering 64/64 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 38/38 places, 64/64 transitions.
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:07:44] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Applied a total of 0 rules in 1 ms. Remains 38 /38 variables (removed 0) and now considering 64/64 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 38/38 places, 64/64 transitions.
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 4 ms
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:07:44] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 38 transition count 63
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 36 transition count 63
Partial Post-agglomeration rule applied 2 times.
Drop transitions (Partial Post agglomeration) removed 2 transitions
Iterating global reduction 0 with 2 rules applied. Total rules applied 5 place count 36 transition count 63
Applied a total of 5 rules in 8 ms. Remains 36 /38 variables (removed 2) and now considering 63/64 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 36/38 places, 63/64 transitions.
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 4 ms
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 4 ms
[2024-05-31 19:07:44] [INFO ] Input system was already deterministic with 63 transitions.
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 6 ms
[2024-05-31 19:07:44] [INFO ] Flatten gal took : 5 ms
[2024-05-31 19:07:44] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 6 ms.
[2024-05-31 19:07:44] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 38 places, 64 transitions and 184 arcs took 6 ms.
Total runtime 5393 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : Angiogenesis-PT-50-CTLFireability-2024-00
Could not compute solution for formula : Angiogenesis-PT-50-CTLFireability-2024-01
Could not compute solution for formula : Angiogenesis-PT-50-CTLFireability-2024-02
Could not compute solution for formula : Angiogenesis-PT-50-CTLFireability-2024-03
Could not compute solution for formula : Angiogenesis-PT-50-CTLFireability-2024-04
Could not compute solution for formula : Angiogenesis-PT-50-CTLFireability-2024-05
Could not compute solution for formula : Angiogenesis-PT-50-CTLFireability-2024-06
Could not compute solution for formula : Angiogenesis-PT-50-CTLFireability-2024-07
Could not compute solution for formula : Angiogenesis-PT-50-CTLFireability-2024-08
Could not compute solution for formula : Angiogenesis-PT-50-CTLFireability-2024-09
Could not compute solution for formula : Angiogenesis-PT-50-CTLFireability-2024-10
Could not compute solution for formula : Angiogenesis-PT-50-CTLFireability-2024-11
Could not compute solution for formula : Angiogenesis-PT-50-CTLFireability-2023-12
Could not compute solution for formula : Angiogenesis-PT-50-CTLFireability-2023-13
Could not compute solution for formula : Angiogenesis-PT-50-CTLFireability-2023-14
Could not compute solution for formula : Angiogenesis-PT-50-CTLFireability-2023-15

BK_STOP 1717182465240

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name Angiogenesis-PT-50-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/506/ctl_0_
ctl formula name Angiogenesis-PT-50-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/506/ctl_1_
ctl formula name Angiogenesis-PT-50-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/506/ctl_2_
ctl formula name Angiogenesis-PT-50-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/506/ctl_3_
ctl formula name Angiogenesis-PT-50-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/506/ctl_4_
ctl formula name Angiogenesis-PT-50-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/506/ctl_5_
ctl formula name Angiogenesis-PT-50-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/506/ctl_6_
ctl formula name Angiogenesis-PT-50-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/506/ctl_7_
ctl formula name Angiogenesis-PT-50-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/506/ctl_8_
ctl formula name Angiogenesis-PT-50-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/506/ctl_9_
ctl formula name Angiogenesis-PT-50-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/506/ctl_10_
ctl formula name Angiogenesis-PT-50-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/506/ctl_11_
ctl formula name Angiogenesis-PT-50-CTLFireability-2023-12
ctl formula formula --ctl=/tmp/506/ctl_12_
ctl formula name Angiogenesis-PT-50-CTLFireability-2023-13
ctl formula formula --ctl=/tmp/506/ctl_13_
ctl formula name Angiogenesis-PT-50-CTLFireability-2023-14
ctl formula formula --ctl=/tmp/506/ctl_14_
ctl formula name Angiogenesis-PT-50-CTLFireability-2023-15
ctl formula formula --ctl=/tmp/506/ctl_15_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Angiogenesis-PT-50"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is Angiogenesis-PT-50, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r468-smll-171620166900050"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Angiogenesis-PT-50.tgz
mv Angiogenesis-PT-50 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;