fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r464-smll-171620118300305
Last Updated
July 7, 2024

About the Execution of LTSMin+red for AirplaneLD-PT-4000

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
4531.319 124838.00 295679.00 602.40 ?F?FF???T????F?? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r464-smll-171620118300305.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is AirplaneLD-PT-4000, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r464-smll-171620118300305
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 88M
-rw-r--r-- 1 mcc users 1.9M Apr 12 10:01 CTLCardinality.txt
-rw-r--r-- 1 mcc users 5.6M Apr 12 10:01 CTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9M Apr 12 07:07 CTLFireability.txt
-rw-r--r-- 1 mcc users 11M Apr 12 07:07 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 1.4M Apr 22 14:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 3.4M Apr 22 14:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 900K Apr 22 14:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 3.7M Apr 22 14:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 5.0M Apr 12 16:19 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16M Apr 12 16:19 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.3M Apr 12 13:51 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18M Apr 12 13:51 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 191K Apr 22 14:27 UpperBounds.txt
-rw-r--r-- 1 mcc users 358K Apr 22 14:27 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 18M May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-PT-4000-CTLCardinality-2024-00
FORMULA_NAME AirplaneLD-PT-4000-CTLCardinality-2024-01
FORMULA_NAME AirplaneLD-PT-4000-CTLCardinality-2024-02
FORMULA_NAME AirplaneLD-PT-4000-CTLCardinality-2024-03
FORMULA_NAME AirplaneLD-PT-4000-CTLCardinality-2024-04
FORMULA_NAME AirplaneLD-PT-4000-CTLCardinality-2024-05
FORMULA_NAME AirplaneLD-PT-4000-CTLCardinality-2024-06
FORMULA_NAME AirplaneLD-PT-4000-CTLCardinality-2024-07
FORMULA_NAME AirplaneLD-PT-4000-CTLCardinality-2024-08
FORMULA_NAME AirplaneLD-PT-4000-CTLCardinality-2024-09
FORMULA_NAME AirplaneLD-PT-4000-CTLCardinality-2024-10
FORMULA_NAME AirplaneLD-PT-4000-CTLCardinality-2024-11
FORMULA_NAME AirplaneLD-PT-4000-CTLCardinality-2024-12
FORMULA_NAME AirplaneLD-PT-4000-CTLCardinality-2024-13
FORMULA_NAME AirplaneLD-PT-4000-CTLCardinality-2024-14
FORMULA_NAME AirplaneLD-PT-4000-CTLCardinality-2024-15

=== Now, execution of the tool begins

BK_START 1717252791683

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AirplaneLD-PT-4000
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 14:39:53] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2024-06-01 14:39:53] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 14:39:55] [INFO ] Load time of PNML (sax parser for PT used): 1615 ms
[2024-06-01 14:39:55] [INFO ] Transformed 28019 places.
[2024-06-01 14:39:55] [INFO ] Transformed 32008 transitions.
[2024-06-01 14:39:55] [INFO ] Found NUPN structural information;
[2024-06-01 14:39:55] [INFO ] Parsed PT model containing 28019 places and 32008 transitions and 122028 arcs in 2007 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 282 ms.
Reduce places removed 12002 places and 0 transitions.
Initial state reduction rules removed 1 formulas.
FORMULA AirplaneLD-PT-4000-CTLCardinality-2024-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-4000-CTLCardinality-2024-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-4000-CTLCardinality-2024-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 12014 out of 16017 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 16017/16017 places, 32008/32008 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 16016 transition count 32008
Discarding 3992 places :
Symmetric choice reduction at 1 with 3992 rule applications. Total rules 3993 place count 12024 transition count 28016
Iterating global reduction 1 with 3992 rules applied. Total rules applied 7985 place count 12024 transition count 28016
Ensure Unique test removed 3992 transitions
Reduce isomorphic transitions removed 3992 transitions.
Iterating post reduction 1 with 3992 rules applied. Total rules applied 11977 place count 12024 transition count 24024
Applied a total of 11977 rules in 1411 ms. Remains 12024 /16017 variables (removed 3993) and now considering 24024/32008 (removed 7984) transitions.
// Phase 1: matrix 24024 rows 12024 cols
[2024-06-01 14:40:10] [INFO ] Computed 2 invariants in 12248 ms
[2024-06-01 14:40:13] [INFO ] Implicit Places using invariants in 15520 ms returned [12023]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 15597 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 12023/16017 places, 24024/32008 transitions.
Applied a total of 0 rules in 68 ms. Remains 12023 /12023 variables (removed 0) and now considering 24024/24024 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 17113 ms. Remains : 12023/16017 places, 24024/32008 transitions.
Support contains 12014 out of 12023 places after structural reductions.
[2024-06-01 14:40:15] [INFO ] Initial state reduction rules for CTL removed 2 formulas.
[2024-06-01 14:40:15] [INFO ] Flatten gal took : 1224 ms
FORMULA AirplaneLD-PT-4000-CTLCardinality-2024-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-4000-CTLCardinality-2024-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 14:40:16] [INFO ] Flatten gal took : 903 ms
[2024-06-01 14:40:18] [INFO ] Input system was already deterministic with 24024 transitions.
RANDOM walk for 37919 steps (4784 resets) in 120015 ms. (0 steps per ms) remains 8/22 properties
BEST_FIRST walk for 40004 steps (0 resets) in 2324 ms. (17 steps per ms) remains 8/8 properties
BEST_FIRST walk for 40004 steps (0 resets) in 2410 ms. (16 steps per ms) remains 8/8 properties
BEST_FIRST walk for 40004 steps (0 resets) in 2529 ms. (15 steps per ms) remains 8/8 properties
BEST_FIRST walk for 40004 steps (0 resets) in 95 ms. (416 steps per ms) remains 8/8 properties
BEST_FIRST walk for 40004 steps (0 resets) in 222 ms. (179 steps per ms) remains 8/8 properties
BEST_FIRST walk for 40004 steps (0 resets) in 119 ms. (333 steps per ms) remains 8/8 properties
BEST_FIRST walk for 40004 steps (0 resets) in 221 ms. (180 steps per ms) remains 8/8 properties
BEST_FIRST walk for 40004 steps (0 resets) in 99 ms. (400 steps per ms) remains 8/8 properties
// Phase 1: matrix 24024 rows 12023 cols
[2024-06-01 14:41:02] [INFO ] Computed 1 invariants in 11085 ms
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/4006 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 8 unsolved
At refinement iteration 1 (OVERLAPS) 8/4014 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 8 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/4014 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 8 unsolved
SMT process timed out in 17719ms, After SMT, problems are : Problem set: 0 solved, 8 unsolved
Skipping Parikh replay, no witness traces provided.
Support contains 4006 out of 12023 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 12023/12023 places, 24024/24024 transitions.
Graph (complete) has 24032 edges and 12023 vertex of which 12016 are kept as prefixes of interest. Removing 7 places using SCC suffix rule.57 ms
Discarding 7 places :
Also discarding 1 output transitions
Drop transitions (Output transitions of discarded places.) removed 1 transitions
Drop transitions (Empty/Sink Transition effects.) removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 10 rules applied. Total rules applied 11 place count 12016 transition count 24013
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 12 place count 12015 transition count 24013
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 2 Pre rules applied. Total rules applied 12 place count 12015 transition count 24011
Deduced a syphon composed of 2 places in 6 ms
Ensure Unique test removed 1 places
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 5 rules applied. Total rules applied 17 place count 12012 transition count 24011
Discarding 7997 places :
Symmetric choice reduction at 2 with 7997 rule applications. Total rules 8014 place count 4015 transition count 16014
Iterating global reduction 2 with 7997 rules applied. Total rules applied 16011 place count 4015 transition count 16014
Ensure Unique test removed 7997 transitions
Reduce isomorphic transitions removed 7997 transitions.
Iterating post reduction 2 with 7997 rules applied. Total rules applied 24008 place count 4015 transition count 8017
Free-agglomeration rule applied 3 times.
Iterating global reduction 3 with 3 rules applied. Total rules applied 24011 place count 4015 transition count 8014
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 3 with 3 rules applied. Total rules applied 24014 place count 4012 transition count 8014
Free-agglomeration rule (complex) applied 1 times.
Iterating global reduction 4 with 1 rules applied. Total rules applied 24015 place count 4012 transition count 8013
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 4 with 1 rules applied. Total rules applied 24016 place count 4011 transition count 8013
Applied a total of 24016 rules in 1183 ms. Remains 4011 /12023 variables (removed 8012) and now considering 8013/24024 (removed 16011) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1186 ms. Remains : 4011/12023 places, 8013/24024 transitions.
RANDOM walk for 40000 steps (6085 resets) in 34946 ms. (1 steps per ms) remains 4/8 properties
BEST_FIRST walk for 40004 steps (8 resets) in 1847 ms. (21 steps per ms) remains 4/4 properties
BEST_FIRST walk for 40004 steps (8 resets) in 2080 ms. (19 steps per ms) remains 4/4 properties
BEST_FIRST walk for 40004 steps (8 resets) in 68 ms. (579 steps per ms) remains 4/4 properties
BEST_FIRST walk for 40004 steps (8 resets) in 67 ms. (588 steps per ms) remains 3/4 properties
// Phase 1: matrix 8013 rows 4011 cols
[2024-06-01 14:41:23] [INFO ] Computed 1 invariants in 3599 ms
At refinement iteration 0 (INCLUDED_ONLY) 0/4000 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 1 (OVERLAPS) 8000/12000 variables, 4000/4000 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/12000 variables, 0/4000 constraints. Problems are: Problem set: 0 solved, 3 unsolved
Problem AtomicPropp2 is UNSAT
Problem AtomicPropp6 is UNSAT
Problem AtomicPropp10 is UNSAT
After SMT solving in domain Real declared 12009/12024 variables, and 4003 constraints, problems are : Problem set: 3 solved, 0 unsolved in 5324 ms.
Refiners :[Generalized P Invariants (flows): 0/1 constraints, State Equation: 4003/4011 constraints, PredecessorRefiner: 3/1 constraints, Known Traps: 0/0 constraints]
After SMT, in 9694ms problems are : Problem set: 3 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 3 atomic propositions for a total of 10 simplifications.
[2024-06-01 14:41:30] [INFO ] Flatten gal took : 597 ms
[2024-06-01 14:41:31] [INFO ] Flatten gal took : 587 ms
[2024-06-01 14:41:32] [INFO ] Input system was already deterministic with 24024 transitions.
Computed a total of 12023 stabilizing places and 24024 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 12023 transition count 24024
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Starting structural reductions in SI_CTL mode, iteration 0 : 12023/12023 places, 24024/24024 transitions.
Graph (complete) has 24032 edges and 12023 vertex of which 12021 are kept as prefixes of interest. Removing 2 places using SCC suffix rule.63 ms
Discarding 2 places :
Also discarding 0 output transitions
Discarding 8004 places :
Symmetric choice reduction at 0 with 8004 rule applications. Total rules 8005 place count 4017 transition count 16020
Iterating global reduction 0 with 8004 rules applied. Total rules applied 16009 place count 4017 transition count 16020
Ensure Unique test removed 8004 transitions
Reduce isomorphic transitions removed 8004 transitions.
Iterating post reduction 0 with 8004 rules applied. Total rules applied 24013 place count 4017 transition count 8016
Applied a total of 24013 rules in 612 ms. Remains 4017 /12023 variables (removed 8006) and now considering 8016/24024 (removed 16008) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 614 ms. Remains : 4017/12023 places, 8016/24024 transitions.
[2024-06-01 14:41:33] [INFO ] Flatten gal took : 165 ms
[2024-06-01 14:41:33] [INFO ] Flatten gal took : 191 ms
[2024-06-01 14:41:33] [INFO ] Input system was already deterministic with 8016 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12023/12023 places, 24024/24024 transitions.
Applied a total of 0 rules in 32 ms. Remains 12023 /12023 variables (removed 0) and now considering 24024/24024 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 33 ms. Remains : 12023/12023 places, 24024/24024 transitions.
[2024-06-01 14:41:34] [INFO ] Flatten gal took : 522 ms
[2024-06-01 14:41:34] [INFO ] Flatten gal took : 585 ms
[2024-06-01 14:41:35] [INFO ] Input system was already deterministic with 24024 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12023/12023 places, 24024/24024 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 12021 transition count 24024
Applied a total of 2 rules in 47 ms. Remains 12021 /12023 variables (removed 2) and now considering 24024/24024 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 49 ms. Remains : 12021/12023 places, 24024/24024 transitions.
[2024-06-01 14:41:36] [INFO ] Flatten gal took : 505 ms
[2024-06-01 14:41:37] [INFO ] Flatten gal took : 570 ms
[2024-06-01 14:41:38] [INFO ] Input system was already deterministic with 24024 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12023/12023 places, 24024/24024 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 12021 transition count 24024
Discarding 4005 places :
Symmetric choice reduction at 1 with 4005 rule applications. Total rules 4007 place count 8016 transition count 20019
Iterating global reduction 1 with 4005 rules applied. Total rules applied 8012 place count 8016 transition count 20019
Ensure Unique test removed 4005 transitions
Reduce isomorphic transitions removed 4005 transitions.
Iterating post reduction 1 with 4005 rules applied. Total rules applied 12017 place count 8016 transition count 16014
Applied a total of 12017 rules in 808 ms. Remains 8016 /12023 variables (removed 4007) and now considering 16014/24024 (removed 8010) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 810 ms. Remains : 8016/12023 places, 16014/24024 transitions.
[2024-06-01 14:41:39] [INFO ] Flatten gal took : 338 ms
[2024-06-01 14:41:39] [INFO ] Flatten gal took : 377 ms
[2024-06-01 14:41:40] [INFO ] Input system was already deterministic with 16014 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12023/12023 places, 24024/24024 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 12021 transition count 24024
Applied a total of 2 rules in 97 ms. Remains 12021 /12023 variables (removed 2) and now considering 24024/24024 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 99 ms. Remains : 12021/12023 places, 24024/24024 transitions.
[2024-06-01 14:41:41] [INFO ] Flatten gal took : 480 ms
[2024-06-01 14:41:41] [INFO ] Flatten gal took : 554 ms
[2024-06-01 14:41:42] [INFO ] Input system was already deterministic with 24024 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12023/12023 places, 24024/24024 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 12021 transition count 24024
Applied a total of 2 rules in 42 ms. Remains 12021 /12023 variables (removed 2) and now considering 24024/24024 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 43 ms. Remains : 12021/12023 places, 24024/24024 transitions.
[2024-06-01 14:41:43] [INFO ] Flatten gal took : 482 ms
[2024-06-01 14:41:43] [INFO ] Flatten gal took : 563 ms
[2024-06-01 14:41:44] [INFO ] Input system was already deterministic with 24024 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12023/12023 places, 24024/24024 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 12021 transition count 24024
Applied a total of 2 rules in 45 ms. Remains 12021 /12023 variables (removed 2) and now considering 24024/24024 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 46 ms. Remains : 12021/12023 places, 24024/24024 transitions.
[2024-06-01 14:41:45] [INFO ] Flatten gal took : 496 ms
[2024-06-01 14:41:46] [INFO ] Flatten gal took : 552 ms
[2024-06-01 14:41:47] [INFO ] Input system was already deterministic with 24024 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 12023/12023 places, 24024/24024 transitions.
Graph (complete) has 24032 edges and 12023 vertex of which 8018 are kept as prefixes of interest. Removing 4005 places using SCC suffix rule.40 ms
Discarding 4005 places :
Also discarding 8001 output transitions
Drop transitions (Output transitions of discarded places.) removed 8001 transitions
Drop transitions (Trivial Post-Agglo cleanup.) removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 8018 transition count 16022
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 3 place count 8017 transition count 16022
Discarding 8003 places :
Symmetric choice reduction at 2 with 8003 rule applications. Total rules 8006 place count 14 transition count 8019
Iterating global reduction 2 with 8003 rules applied. Total rules applied 16009 place count 14 transition count 8019
Ensure Unique test removed 8003 transitions
Reduce isomorphic transitions removed 8003 transitions.
Iterating post reduction 2 with 8003 rules applied. Total rules applied 24012 place count 14 transition count 16
Applied a total of 24012 rules in 662 ms. Remains 14 /12023 variables (removed 12009) and now considering 16/24024 (removed 24008) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 662 ms. Remains : 14/12023 places, 16/24024 transitions.
[2024-06-01 14:41:47] [INFO ] Flatten gal took : 1 ms
[2024-06-01 14:41:47] [INFO ] Flatten gal took : 0 ms
[2024-06-01 14:41:47] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12023/12023 places, 24024/24024 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 12021 transition count 24024
Applied a total of 2 rules in 43 ms. Remains 12021 /12023 variables (removed 2) and now considering 24024/24024 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 44 ms. Remains : 12021/12023 places, 24024/24024 transitions.
[2024-06-01 14:41:48] [INFO ] Flatten gal took : 479 ms
[2024-06-01 14:41:48] [INFO ] Flatten gal took : 552 ms
[2024-06-01 14:41:49] [INFO ] Input system was already deterministic with 24024 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12023/12023 places, 24024/24024 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 12021 transition count 24024
Applied a total of 2 rules in 43 ms. Remains 12021 /12023 variables (removed 2) and now considering 24024/24024 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 44 ms. Remains : 12021/12023 places, 24024/24024 transitions.
[2024-06-01 14:41:50] [INFO ] Flatten gal took : 498 ms
[2024-06-01 14:41:51] [INFO ] Flatten gal took : 564 ms
[2024-06-01 14:41:52] [INFO ] Input system was already deterministic with 24024 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12023/12023 places, 24024/24024 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 12021 transition count 24024
Applied a total of 2 rules in 41 ms. Remains 12021 /12023 variables (removed 2) and now considering 24024/24024 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 42 ms. Remains : 12021/12023 places, 24024/24024 transitions.
[2024-06-01 14:41:52] [INFO ] Flatten gal took : 531 ms
[2024-06-01 14:41:53] [INFO ] Flatten gal took : 537 ms
[2024-06-01 14:41:54] [INFO ] Input system was already deterministic with 24024 transitions.
[2024-06-01 14:41:55] [INFO ] Flatten gal took : 630 ms
[2024-06-01 14:41:55] [INFO ] Flatten gal took : 676 ms
[2024-06-01 14:41:55] [INFO ] Export to MCC of 11 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 11 ms.
[2024-06-01 14:41:56] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 12023 places, 24024 transitions and 60058 arcs took 116 ms.
Total runtime 122561 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : AirplaneLD-PT-4000-CTLCardinality-2024-00
Could not compute solution for formula : AirplaneLD-PT-4000-CTLCardinality-2024-02
Could not compute solution for formula : AirplaneLD-PT-4000-CTLCardinality-2024-05
Could not compute solution for formula : AirplaneLD-PT-4000-CTLCardinality-2024-06
Could not compute solution for formula : AirplaneLD-PT-4000-CTLCardinality-2024-07
Could not compute solution for formula : AirplaneLD-PT-4000-CTLCardinality-2024-09
Could not compute solution for formula : AirplaneLD-PT-4000-CTLCardinality-2024-10
Could not compute solution for formula : AirplaneLD-PT-4000-CTLCardinality-2024-11
Could not compute solution for formula : AirplaneLD-PT-4000-CTLCardinality-2024-12
Could not compute solution for formula : AirplaneLD-PT-4000-CTLCardinality-2024-14
Could not compute solution for formula : AirplaneLD-PT-4000-CTLCardinality-2024-15

BK_STOP 1717252916521

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
mcc2024
ctl formula name AirplaneLD-PT-4000-CTLCardinality-2024-00
ctl formula formula --ctl=/tmp/533/ctl_0_
ctl formula name AirplaneLD-PT-4000-CTLCardinality-2024-02
ctl formula formula --ctl=/tmp/533/ctl_1_
ctl formula name AirplaneLD-PT-4000-CTLCardinality-2024-05
ctl formula formula --ctl=/tmp/533/ctl_2_
ctl formula name AirplaneLD-PT-4000-CTLCardinality-2024-06
ctl formula formula --ctl=/tmp/533/ctl_3_
ctl formula name AirplaneLD-PT-4000-CTLCardinality-2024-07
ctl formula formula --ctl=/tmp/533/ctl_4_
ctl formula name AirplaneLD-PT-4000-CTLCardinality-2024-09
ctl formula formula --ctl=/tmp/533/ctl_5_
ctl formula name AirplaneLD-PT-4000-CTLCardinality-2024-10
ctl formula formula --ctl=/tmp/533/ctl_6_
ctl formula name AirplaneLD-PT-4000-CTLCardinality-2024-11
ctl formula formula --ctl=/tmp/533/ctl_7_
ctl formula name AirplaneLD-PT-4000-CTLCardinality-2024-12
ctl formula formula --ctl=/tmp/533/ctl_8_
ctl formula name AirplaneLD-PT-4000-CTLCardinality-2024-14
ctl formula formula --ctl=/tmp/533/ctl_9_
ctl formula name AirplaneLD-PT-4000-CTLCardinality-2024-15
ctl formula formula --ctl=/tmp/533/ctl_10_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-PT-4000"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is AirplaneLD-PT-4000, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r464-smll-171620118300305"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-PT-4000.tgz
mv AirplaneLD-PT-4000 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;