fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r464-smll-171620118200298
Last Updated
July 7, 2024

About the Execution of LTSMin+red for AirplaneLD-PT-2000

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
11149.987 309343.00 449222.00 892.00 ???????????T???? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r464-smll-171620118200298.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is AirplaneLD-PT-2000, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r464-smll-171620118200298
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 48M
-rw-r--r-- 1 mcc users 2.0M Apr 12 06:09 CTLCardinality.txt
-rw-r--r-- 1 mcc users 6.7M Apr 12 06:09 CTLCardinality.xml
-rw-r--r-- 1 mcc users 729K Apr 12 04:45 CTLFireability.txt
-rw-r--r-- 1 mcc users 3.9M Apr 12 04:45 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 382K Apr 22 14:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 962K Apr 22 14:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 382K Apr 22 14:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 1.5M Apr 22 14:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8M Apr 12 10:03 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 13M Apr 12 10:03 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 994K Apr 12 08:39 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 5.1M Apr 12 08:39 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 107K Apr 22 14:27 UpperBounds.txt
-rw-r--r-- 1 mcc users 191K Apr 22 14:27 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 8.7M May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-PT-2000-CTLFireability-2024-00
FORMULA_NAME AirplaneLD-PT-2000-CTLFireability-2024-01
FORMULA_NAME AirplaneLD-PT-2000-CTLFireability-2024-02
FORMULA_NAME AirplaneLD-PT-2000-CTLFireability-2024-03
FORMULA_NAME AirplaneLD-PT-2000-CTLFireability-2024-04
FORMULA_NAME AirplaneLD-PT-2000-CTLFireability-2024-05
FORMULA_NAME AirplaneLD-PT-2000-CTLFireability-2024-06
FORMULA_NAME AirplaneLD-PT-2000-CTLFireability-2024-07
FORMULA_NAME AirplaneLD-PT-2000-CTLFireability-2024-08
FORMULA_NAME AirplaneLD-PT-2000-CTLFireability-2024-09
FORMULA_NAME AirplaneLD-PT-2000-CTLFireability-2024-10
FORMULA_NAME AirplaneLD-PT-2000-CTLFireability-2024-11
FORMULA_NAME AirplaneLD-PT-2000-CTLFireability-2024-12
FORMULA_NAME AirplaneLD-PT-2000-CTLFireability-2024-13
FORMULA_NAME AirplaneLD-PT-2000-CTLFireability-2024-14
FORMULA_NAME AirplaneLD-PT-2000-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717251774335

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AirplaneLD-PT-2000
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 14:22:56] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 14:22:56] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 14:22:57] [INFO ] Load time of PNML (sax parser for PT used): 1259 ms
[2024-06-01 14:22:57] [INFO ] Transformed 14019 places.
[2024-06-01 14:22:57] [INFO ] Transformed 16008 transitions.
[2024-06-01 14:22:57] [INFO ] Found NUPN structural information;
[2024-06-01 14:22:57] [INFO ] Parsed PT model containing 14019 places and 16008 transitions and 61028 arcs in 1549 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 195 ms.
Reduction of identical properties reduced properties to check from 16 to 15
Reduce places removed 6002 places and 0 transitions.
Support contains 8014 out of 8017 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 8017/8017 places, 16008/16008 transitions.
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 8014 transition count 16008
Applied a total of 3 rules in 159 ms. Remains 8014 /8017 variables (removed 3) and now considering 16008/16008 (removed 0) transitions.
// Phase 1: matrix 16008 rows 8014 cols
[2024-06-01 14:23:07] [INFO ] Computed 1 invariants in 7825 ms
[2024-06-01 14:23:10] [INFO ] Implicit Places using invariants in 10549 ms returned []
Implicit Place search using SMT only with invariants took 10599 ms to find 0 implicit places.
Running 8004 sub problems to find dead transitions.
[2024-06-01 14:23:10] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/8009 variables, 8009/8009 constraints. Problems are: Problem set: 0 solved, 8004 unsolved
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 8009/24022 variables, and 8009 constraints, problems are : Problem set: 0 solved, 8004 unsolved in 30327 ms.
Refiners :[Domain max(s): 8009/8014 constraints, Generalized P Invariants (flows): 0/1 constraints, State Equation: 0/8014 constraints, PredecessorRefiner: 8004/4 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 8004 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/8009 variables, 8009/8009 constraints. Problems are: Problem set: 0 solved, 8004 unsolved
Error getting values : (error "ParserException while parsing response: (timeout
org.smtlib.IParser$ParserException: Unbalanced parentheses at end of input")
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 8009/24022 variables, and 8009 constraints, problems are : Problem set: 0 solved, 8004 unsolved in 30135 ms.
Refiners :[Domain max(s): 8009/8014 constraints, Generalized P Invariants (flows): 0/1 constraints, State Equation: 0/8014 constraints, PredecessorRefiner: 8000/4 constraints, Known Traps: 0/0 constraints]
After SMT, in 175454ms problems are : Problem set: 0 solved, 8004 unsolved
Search for dead transitions found 0 dead transitions in 175688ms
Starting structural reductions in LTL mode, iteration 1 : 8014/8017 places, 16008/16008 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 186529 ms. Remains : 8014/8017 places, 16008/16008 transitions.
Support contains 8014 out of 8014 places after structural reductions.
[2024-06-01 14:26:08] [INFO ] Flatten gal took : 916 ms
[2024-06-01 14:26:10] [INFO ] Flatten gal took : 778 ms
[2024-06-01 14:26:13] [INFO ] Input system was already deterministic with 16008 transitions.
Reduction of identical properties reduced properties to check from 51 to 47
RANDOM walk for 40000 steps (5026 resets) in 41748 ms. (0 steps per ms) remains 20/47 properties
BEST_FIRST walk for 4004 steps (0 resets) in 1834 ms. (2 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (0 resets) in 585 ms. (6 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (0 resets) in 696 ms. (5 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (0 resets) in 581 ms. (6 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (0 resets) in 14 ms. (266 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (0 resets) in 22 ms. (174 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (0 resets) in 16 ms. (235 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (0 resets) in 13 ms. (286 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (0 resets) in 14 ms. (266 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (0 resets) in 15 ms. (250 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (0 resets) in 14 ms. (266 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (0 resets) in 12 ms. (308 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (0 resets) in 15 ms. (250 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (0 resets) in 12 ms. (308 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (0 resets) in 15 ms. (250 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (0 resets) in 15 ms. (250 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (0 resets) in 25 ms. (154 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (0 resets) in 14 ms. (266 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (0 resets) in 14 ms. (266 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (0 resets) in 12 ms. (308 steps per ms) remains 20/20 properties
[2024-06-01 14:26:25] [INFO ] Invariant cache hit.
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/5014 variables, 5014/5014 constraints. Problems are: Problem set: 0 solved, 20 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/5014 variables, 1/5015 constraints. Problems are: Problem set: 0 solved, 20 unsolved
Error getting values : (error "ParserException while parsing response: ((s0 1.0)
(s1001 1.0)
(s1002 1.0)
(s1003 1.0)
(s1004 1.0)
(s1005 1.0)
(s1006 1.0)
(s1007 1.0)
(s1008 1.0)
(s1009 1.0)
(s1010 1.0)
(s1011 1.0)
(s1012 1.0)
(s1013 1.0)
(s1014 1.0)
(s1015 1.0)
(s1016 1.0)
(s1017 1.0)
(s1018 1.0)
(s1019 1.0)
(s1020 1.0)
(s1021 1.0)
(s1022 1.0)
(s1023 1.0)
(s1024 1.0)
(s1025 1.0)
(s1026 1.0)
(s1027 1.0)
(s1028 1.0)
(s1029 1.0)
(s1030 1.0)
(s1031 1.0)
(s1032 1.0)
(s1033 1.0)
(s1034 1.0)
(s1035 1.0)
(s1036 1.0)
(s1037 timeout
org.smtlib.IParser$ParserException: Unbalanced parentheses at end of input")
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 5014/24022 variables, and 5015 constraints, problems are : Problem set: 0 solved, 20 unsolved in 5010 ms.
Refiners :[Domain max(s): 5014/8014 constraints, Generalized P Invariants (flows): 1/1 constraints, State Equation: 0/8014 constraints, PredecessorRefiner: 20/0 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 20 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/5014 variables, 5014/5014 constraints. Problems are: Problem set: 0 solved, 20 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/5014 variables, 1/5015 constraints. Problems are: Problem set: 0 solved, 20 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/5014 variables, 0/5015 constraints. Problems are: Problem set: 0 solved, 20 unsolved
SMT process timed out in 17340ms, After SMT, problems are : Problem set: 0 solved, 20 unsolved
Skipping Parikh replay, no witness traces provided.
Support contains 5014 out of 8014 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 8014/8014 places, 16008/16008 transitions.
Discarding 2997 places :
Symmetric choice reduction at 0 with 2997 rule applications. Total rules 2997 place count 5017 transition count 13011
Iterating global reduction 0 with 2997 rules applied. Total rules applied 5994 place count 5017 transition count 13011
Ensure Unique test removed 2997 transitions
Reduce isomorphic transitions removed 2997 transitions.
Iterating post reduction 0 with 2997 rules applied. Total rules applied 8991 place count 5017 transition count 10014
Applied a total of 8991 rules in 839 ms. Remains 5017 /8014 variables (removed 2997) and now considering 10014/16008 (removed 5994) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 842 ms. Remains : 5017/8014 places, 10014/16008 transitions.
RANDOM walk for 40000 steps (5066 resets) in 29144 ms. (1 steps per ms) remains 17/20 properties
BEST_FIRST walk for 4004 steps (0 resets) in 301 ms. (13 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4004 steps (0 resets) in 583 ms. (6 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4004 steps (0 resets) in 308 ms. (12 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4004 steps (0 resets) in 570 ms. (7 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4004 steps (0 resets) in 11 ms. (333 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4004 steps (0 resets) in 12 ms. (308 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4004 steps (0 resets) in 12 ms. (308 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4004 steps (0 resets) in 9 ms. (400 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4004 steps (0 resets) in 11 ms. (333 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4004 steps (0 resets) in 10 ms. (364 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4004 steps (0 resets) in 9 ms. (400 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4004 steps (0 resets) in 11 ms. (333 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4004 steps (0 resets) in 9 ms. (400 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4004 steps (0 resets) in 10 ms. (364 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4004 steps (0 resets) in 8 ms. (444 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4004 steps (0 resets) in 19 ms. (200 steps per ms) remains 17/17 properties
BEST_FIRST walk for 4004 steps (0 resets) in 9 ms. (400 steps per ms) remains 17/17 properties
// Phase 1: matrix 10014 rows 5017 cols
[2024-06-01 14:26:55] [INFO ] Computed 1 invariants in 3733 ms
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/5014 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 17 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/5014 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 17 unsolved
Problem AtomicPropp0 is UNSAT
Problem AtomicPropp8 is UNSAT
Problem AtomicPropp14 is UNSAT
Problem AtomicPropp34 is UNSAT
At refinement iteration 2 (OVERLAPS) 10014/15028 variables, 5014/5015 constraints. Problems are: Problem set: 4 solved, 13 unsolved
Problem AtomicPropp5 is UNSAT
At refinement iteration 3 (INCLUDED_ONLY) 0/15028 variables, 0/5015 constraints. Problems are: Problem set: 5 solved, 12 unsolved
Error getting values : (error "ParserException while parsing response: (timeout
org.smtlib.IParser$ParserException: Unbalanced parentheses at end of input")
SMT process timed out in 56029ms, After SMT, problems are : Problem set: 5 solved, 12 unsolved
Fused 12 Parikh solutions to 5 different solutions.
Parikh walk visited 4 properties in 269 ms.
Support contains 11 out of 5017 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 5017/5017 places, 10014/10014 transitions.
Graph (complete) has 7015 edges and 5017 vertex of which 5015 are kept as prefixes of interest. Removing 2 places using SCC suffix rule.14 ms
Discarding 2 places :
Also discarding 0 output transitions
Drop transitions (Empty/Sink Transition effects.) removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 5 place count 5015 transition count 10010
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 1 with 3 Pre rules applied. Total rules applied 5 place count 5015 transition count 10007
Deduced a syphon composed of 3 places in 5 ms
Ensure Unique test removed 2 places
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 1 with 8 rules applied. Total rules applied 13 place count 5010 transition count 10007
Discarding 4990 places :
Symmetric choice reduction at 1 with 4990 rule applications. Total rules 5003 place count 20 transition count 5017
Iterating global reduction 1 with 4990 rules applied. Total rules applied 9993 place count 20 transition count 5017
Ensure Unique test removed 4990 transitions
Reduce isomorphic transitions removed 4990 transitions.
Iterating post reduction 1 with 4990 rules applied. Total rules applied 14983 place count 20 transition count 27
Free-agglomeration rule applied 5 times.
Iterating global reduction 2 with 5 rules applied. Total rules applied 14988 place count 20 transition count 22
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 2 with 5 rules applied. Total rules applied 14993 place count 15 transition count 22
Applied a total of 14993 rules in 463 ms. Remains 15 /5017 variables (removed 5002) and now considering 22/10014 (removed 9992) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 463 ms. Remains : 15/5017 places, 22/10014 transitions.
RANDOM walk for 2102 steps (320 resets) in 30 ms. (67 steps per ms) remains 0/8 properties
Successfully simplified 5 atomic propositions for a total of 15 simplifications.
[2024-06-01 14:27:49] [INFO ] Flatten gal took : 510 ms
[2024-06-01 14:27:49] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA AirplaneLD-PT-2000-CTLFireability-2024-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 14:27:50] [INFO ] Flatten gal took : 478 ms
[2024-06-01 14:27:52] [INFO ] Input system was already deterministic with 16008 transitions.
Computed a total of 8014 stabilizing places and 16008 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 8014 transition count 16008
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Starting structural reductions in LTL mode, iteration 0 : 8014/8014 places, 16008/16008 transitions.
Discarding 6996 places :
Symmetric choice reduction at 0 with 6996 rule applications. Total rules 6996 place count 1018 transition count 9012
Iterating global reduction 0 with 6996 rules applied. Total rules applied 13992 place count 1018 transition count 9012
Ensure Unique test removed 6996 transitions
Reduce isomorphic transitions removed 6996 transitions.
Iterating post reduction 0 with 6996 rules applied. Total rules applied 20988 place count 1018 transition count 2016
Applied a total of 20988 rules in 193 ms. Remains 1018 /8014 variables (removed 6996) and now considering 2016/16008 (removed 13992) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 193 ms. Remains : 1018/8014 places, 2016/16008 transitions.
[2024-06-01 14:27:52] [INFO ] Flatten gal took : 41 ms
[2024-06-01 14:27:52] [INFO ] Flatten gal took : 51 ms
[2024-06-01 14:27:52] [INFO ] Input system was already deterministic with 2016 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8014/8014 places, 16008/16008 transitions.
Discarding 3996 places :
Symmetric choice reduction at 0 with 3996 rule applications. Total rules 3996 place count 4018 transition count 12012
Iterating global reduction 0 with 3996 rules applied. Total rules applied 7992 place count 4018 transition count 12012
Ensure Unique test removed 3996 transitions
Reduce isomorphic transitions removed 3996 transitions.
Iterating post reduction 0 with 3996 rules applied. Total rules applied 11988 place count 4018 transition count 8016
Applied a total of 11988 rules in 254 ms. Remains 4018 /8014 variables (removed 3996) and now considering 8016/16008 (removed 7992) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 255 ms. Remains : 4018/8014 places, 8016/16008 transitions.
[2024-06-01 14:27:53] [INFO ] Flatten gal took : 174 ms
[2024-06-01 14:27:53] [INFO ] Flatten gal took : 223 ms
[2024-06-01 14:27:54] [INFO ] Input system was already deterministic with 8016 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8014/8014 places, 16008/16008 transitions.
Discarding 5997 places :
Symmetric choice reduction at 0 with 5997 rule applications. Total rules 5997 place count 2017 transition count 10011
Iterating global reduction 0 with 5997 rules applied. Total rules applied 11994 place count 2017 transition count 10011
Ensure Unique test removed 5997 transitions
Reduce isomorphic transitions removed 5997 transitions.
Iterating post reduction 0 with 5997 rules applied. Total rules applied 17991 place count 2017 transition count 4014
Applied a total of 17991 rules in 294 ms. Remains 2017 /8014 variables (removed 5997) and now considering 4014/16008 (removed 11994) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 294 ms. Remains : 2017/8014 places, 4014/16008 transitions.
[2024-06-01 14:27:54] [INFO ] Flatten gal took : 90 ms
[2024-06-01 14:27:54] [INFO ] Flatten gal took : 111 ms
[2024-06-01 14:27:54] [INFO ] Input system was already deterministic with 4014 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 8014/8014 places, 16008/16008 transitions.
Discarding 5996 places :
Symmetric choice reduction at 0 with 5996 rule applications. Total rules 5996 place count 2018 transition count 10012
Iterating global reduction 0 with 5996 rules applied. Total rules applied 11992 place count 2018 transition count 10012
Ensure Unique test removed 5996 transitions
Reduce isomorphic transitions removed 5996 transitions.
Iterating post reduction 0 with 5996 rules applied. Total rules applied 17988 place count 2018 transition count 4016
Applied a total of 17988 rules in 462 ms. Remains 2018 /8014 variables (removed 5996) and now considering 4016/16008 (removed 11992) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 463 ms. Remains : 2018/8014 places, 4016/16008 transitions.
[2024-06-01 14:27:55] [INFO ] Flatten gal took : 88 ms
[2024-06-01 14:27:55] [INFO ] Flatten gal took : 106 ms
[2024-06-01 14:27:55] [INFO ] Input system was already deterministic with 4016 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8014/8014 places, 16008/16008 transitions.
Discarding 6994 places :
Symmetric choice reduction at 0 with 6994 rule applications. Total rules 6994 place count 1020 transition count 9014
Iterating global reduction 0 with 6994 rules applied. Total rules applied 13988 place count 1020 transition count 9014
Ensure Unique test removed 6994 transitions
Reduce isomorphic transitions removed 6994 transitions.
Iterating post reduction 0 with 6994 rules applied. Total rules applied 20982 place count 1020 transition count 2020
Applied a total of 20982 rules in 177 ms. Remains 1020 /8014 variables (removed 6994) and now considering 2020/16008 (removed 13988) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 177 ms. Remains : 1020/8014 places, 2020/16008 transitions.
[2024-06-01 14:27:56] [INFO ] Flatten gal took : 38 ms
[2024-06-01 14:27:56] [INFO ] Flatten gal took : 51 ms
[2024-06-01 14:27:56] [INFO ] Input system was already deterministic with 2020 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8014/8014 places, 16008/16008 transitions.
Discarding 6994 places :
Symmetric choice reduction at 0 with 6994 rule applications. Total rules 6994 place count 1020 transition count 9014
Iterating global reduction 0 with 6994 rules applied. Total rules applied 13988 place count 1020 transition count 9014
Ensure Unique test removed 6994 transitions
Reduce isomorphic transitions removed 6994 transitions.
Iterating post reduction 0 with 6994 rules applied. Total rules applied 20982 place count 1020 transition count 2020
Applied a total of 20982 rules in 200 ms. Remains 1020 /8014 variables (removed 6994) and now considering 2020/16008 (removed 13988) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 200 ms. Remains : 1020/8014 places, 2020/16008 transitions.
[2024-06-01 14:27:56] [INFO ] Flatten gal took : 37 ms
[2024-06-01 14:27:56] [INFO ] Flatten gal took : 47 ms
[2024-06-01 14:27:56] [INFO ] Input system was already deterministic with 2020 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 8014/8014 places, 16008/16008 transitions.
Graph (complete) has 11012 edges and 8014 vertex of which 6012 are kept as prefixes of interest. Removing 2002 places using SCC suffix rule.17 ms
Discarding 2002 places :
Also discarding 4000 output transitions
Drop transitions (Output transitions of discarded places.) removed 4000 transitions
Discarding 3000 places :
Symmetric choice reduction at 0 with 3000 rule applications. Total rules 3001 place count 3012 transition count 9008
Iterating global reduction 0 with 3000 rules applied. Total rules applied 6001 place count 3012 transition count 9008
Ensure Unique test removed 3000 transitions
Reduce isomorphic transitions removed 3000 transitions.
Iterating post reduction 0 with 3000 rules applied. Total rules applied 9001 place count 3012 transition count 6008
Applied a total of 9001 rules in 281 ms. Remains 3012 /8014 variables (removed 5002) and now considering 6008/16008 (removed 10000) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 281 ms. Remains : 3012/8014 places, 6008/16008 transitions.
[2024-06-01 14:27:57] [INFO ] Flatten gal took : 121 ms
[2024-06-01 14:27:57] [INFO ] Flatten gal took : 156 ms
[2024-06-01 14:27:57] [INFO ] Input system was already deterministic with 6008 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 8014/8014 places, 16008/16008 transitions.
Graph (complete) has 11012 edges and 8014 vertex of which 4011 are kept as prefixes of interest. Removing 4003 places using SCC suffix rule.9 ms
Discarding 4003 places :
Also discarding 6000 output transitions
Drop transitions (Output transitions of discarded places.) removed 6000 transitions
Ensure Unique test removed 1999 transitions
Reduce isomorphic transitions removed 1999 transitions.
Iterating post reduction 0 with 1999 rules applied. Total rules applied 2000 place count 4011 transition count 8009
Discarding 3997 places :
Symmetric choice reduction at 1 with 3997 rule applications. Total rules 5997 place count 14 transition count 4012
Iterating global reduction 1 with 3997 rules applied. Total rules applied 9994 place count 14 transition count 4012
Ensure Unique test removed 3997 transitions
Reduce isomorphic transitions removed 3997 transitions.
Iterating post reduction 1 with 3997 rules applied. Total rules applied 13991 place count 14 transition count 15
Applied a total of 13991 rules in 294 ms. Remains 14 /8014 variables (removed 8000) and now considering 15/16008 (removed 15993) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 295 ms. Remains : 14/8014 places, 15/16008 transitions.
[2024-06-01 14:27:57] [INFO ] Flatten gal took : 0 ms
[2024-06-01 14:27:57] [INFO ] Flatten gal took : 0 ms
[2024-06-01 14:27:57] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 8014/8014 places, 16008/16008 transitions.
Graph (complete) has 11012 edges and 8014 vertex of which 4011 are kept as prefixes of interest. Removing 4003 places using SCC suffix rule.8 ms
Discarding 4003 places :
Also discarding 6000 output transitions
Drop transitions (Output transitions of discarded places.) removed 6000 transitions
Ensure Unique test removed 1999 transitions
Reduce isomorphic transitions removed 1999 transitions.
Iterating post reduction 0 with 1999 rules applied. Total rules applied 2000 place count 4011 transition count 8009
Discarding 3997 places :
Symmetric choice reduction at 1 with 3997 rule applications. Total rules 5997 place count 14 transition count 4012
Iterating global reduction 1 with 3997 rules applied. Total rules applied 9994 place count 14 transition count 4012
Ensure Unique test removed 3997 transitions
Reduce isomorphic transitions removed 3997 transitions.
Iterating post reduction 1 with 3997 rules applied. Total rules applied 13991 place count 14 transition count 15
Applied a total of 13991 rules in 294 ms. Remains 14 /8014 variables (removed 8000) and now considering 15/16008 (removed 15993) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 294 ms. Remains : 14/8014 places, 15/16008 transitions.
[2024-06-01 14:27:58] [INFO ] Flatten gal took : 1 ms
[2024-06-01 14:27:58] [INFO ] Flatten gal took : 0 ms
[2024-06-01 14:27:58] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 8014/8014 places, 16008/16008 transitions.
Graph (complete) has 11012 edges and 8014 vertex of which 4010 are kept as prefixes of interest. Removing 4004 places using SCC suffix rule.9 ms
Discarding 4004 places :
Also discarding 8000 output transitions
Drop transitions (Output transitions of discarded places.) removed 8000 transitions
Discarding 3997 places :
Symmetric choice reduction at 0 with 3997 rule applications. Total rules 3998 place count 13 transition count 4011
Iterating global reduction 0 with 3997 rules applied. Total rules applied 7995 place count 13 transition count 4011
Ensure Unique test removed 3997 transitions
Reduce isomorphic transitions removed 3997 transitions.
Iterating post reduction 0 with 3997 rules applied. Total rules applied 11992 place count 13 transition count 14
Applied a total of 11992 rules in 272 ms. Remains 13 /8014 variables (removed 8001) and now considering 14/16008 (removed 15994) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 272 ms. Remains : 13/8014 places, 14/16008 transitions.
[2024-06-01 14:27:58] [INFO ] Flatten gal took : 0 ms
[2024-06-01 14:27:58] [INFO ] Flatten gal took : 0 ms
[2024-06-01 14:27:58] [INFO ] Input system was already deterministic with 14 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8014/8014 places, 16008/16008 transitions.
Discarding 7989 places :
Symmetric choice reduction at 0 with 7989 rule applications. Total rules 7989 place count 25 transition count 8019
Iterating global reduction 0 with 7989 rules applied. Total rules applied 15978 place count 25 transition count 8019
Ensure Unique test removed 7989 transitions
Reduce isomorphic transitions removed 7989 transitions.
Iterating post reduction 0 with 7989 rules applied. Total rules applied 23967 place count 25 transition count 30
Applied a total of 23967 rules in 168 ms. Remains 25 /8014 variables (removed 7989) and now considering 30/16008 (removed 15978) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 168 ms. Remains : 25/8014 places, 30/16008 transitions.
[2024-06-01 14:27:58] [INFO ] Flatten gal took : 1 ms
[2024-06-01 14:27:58] [INFO ] Flatten gal took : 1 ms
[2024-06-01 14:27:58] [INFO ] Input system was already deterministic with 30 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 8014/8014 places, 16008/16008 transitions.
Graph (complete) has 11012 edges and 8014 vertex of which 1 are kept as prefixes of interest. Removing 8013 places using SCC suffix rule.5 ms
Discarding 8013 places :
Also discarding 12008 output transitions
Drop transitions (Output transitions of discarded places.) removed 12008 transitions
Ensure Unique test removed 3999 transitions
Reduce isomorphic transitions removed 3999 transitions.
Iterating post reduction 0 with 3999 rules applied. Total rules applied 4000 place count 1 transition count 1
Applied a total of 4000 rules in 38 ms. Remains 1 /8014 variables (removed 8013) and now considering 1/16008 (removed 16007) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 38 ms. Remains : 1/8014 places, 1/16008 transitions.
[2024-06-01 14:27:58] [INFO ] Flatten gal took : 0 ms
[2024-06-01 14:27:58] [INFO ] Flatten gal took : 0 ms
[2024-06-01 14:27:58] [INFO ] Input system was already deterministic with 1 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 8014/8014 places, 16008/16008 transitions.
Discarding 7991 places :
Symmetric choice reduction at 0 with 7991 rule applications. Total rules 7991 place count 23 transition count 8017
Iterating global reduction 0 with 7991 rules applied. Total rules applied 15982 place count 23 transition count 8017
Ensure Unique test removed 7991 transitions
Reduce isomorphic transitions removed 7991 transitions.
Iterating post reduction 0 with 7991 rules applied. Total rules applied 23973 place count 23 transition count 26
Applied a total of 23973 rules in 241 ms. Remains 23 /8014 variables (removed 7991) and now considering 26/16008 (removed 15982) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 241 ms. Remains : 23/8014 places, 26/16008 transitions.
[2024-06-01 14:27:58] [INFO ] Flatten gal took : 1 ms
[2024-06-01 14:27:58] [INFO ] Flatten gal took : 1 ms
[2024-06-01 14:27:58] [INFO ] Input system was already deterministic with 26 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8014/8014 places, 16008/16008 transitions.
Discarding 7992 places :
Symmetric choice reduction at 0 with 7992 rule applications. Total rules 7992 place count 22 transition count 8016
Iterating global reduction 0 with 7992 rules applied. Total rules applied 15984 place count 22 transition count 8016
Ensure Unique test removed 7992 transitions
Reduce isomorphic transitions removed 7992 transitions.
Iterating post reduction 0 with 7992 rules applied. Total rules applied 23976 place count 22 transition count 24
Applied a total of 23976 rules in 202 ms. Remains 22 /8014 variables (removed 7992) and now considering 24/16008 (removed 15984) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 202 ms. Remains : 22/8014 places, 24/16008 transitions.
[2024-06-01 14:27:59] [INFO ] Flatten gal took : 1 ms
[2024-06-01 14:27:59] [INFO ] Flatten gal took : 0 ms
[2024-06-01 14:27:59] [INFO ] Input system was already deterministic with 24 transitions.
[2024-06-01 14:27:59] [INFO ] Flatten gal took : 522 ms
[2024-06-01 14:28:00] [INFO ] Flatten gal took : 509 ms
[2024-06-01 14:28:01] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 120 ms.
[2024-06-01 14:28:01] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 8014 places, 16008 transitions and 35020 arcs took 72 ms.
Total runtime 305802 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : AirplaneLD-PT-2000-CTLFireability-2024-00
Could not compute solution for formula : AirplaneLD-PT-2000-CTLFireability-2024-01
Could not compute solution for formula : AirplaneLD-PT-2000-CTLFireability-2024-02
Could not compute solution for formula : AirplaneLD-PT-2000-CTLFireability-2024-03
Could not compute solution for formula : AirplaneLD-PT-2000-CTLFireability-2024-04
Could not compute solution for formula : AirplaneLD-PT-2000-CTLFireability-2024-06
Could not compute solution for formula : AirplaneLD-PT-2000-CTLFireability-2024-07
Could not compute solution for formula : AirplaneLD-PT-2000-CTLFireability-2024-08
Could not compute solution for formula : AirplaneLD-PT-2000-CTLFireability-2024-09
Could not compute solution for formula : AirplaneLD-PT-2000-CTLFireability-2024-10
Could not compute solution for formula : AirplaneLD-PT-2000-CTLFireability-2024-12
Could not compute solution for formula : AirplaneLD-PT-2000-CTLFireability-2024-13
Could not compute solution for formula : AirplaneLD-PT-2000-CTLFireability-2024-14
Could not compute solution for formula : AirplaneLD-PT-2000-CTLFireability-2024-15

BK_STOP 1717252083678

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name AirplaneLD-PT-2000-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/550/ctl_0_
ctl formula name AirplaneLD-PT-2000-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/550/ctl_1_
ctl formula name AirplaneLD-PT-2000-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/550/ctl_2_
ctl formula name AirplaneLD-PT-2000-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/550/ctl_3_
ctl formula name AirplaneLD-PT-2000-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/550/ctl_4_
ctl formula name AirplaneLD-PT-2000-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/550/ctl_5_
ctl formula name AirplaneLD-PT-2000-CTLFireability-2024-07
ctl formula formula --ctl=/tmp/550/ctl_6_
ctl formula name AirplaneLD-PT-2000-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/550/ctl_7_
ctl formula name AirplaneLD-PT-2000-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/550/ctl_8_
ctl formula name AirplaneLD-PT-2000-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/550/ctl_9_
ctl formula name AirplaneLD-PT-2000-CTLFireability-2024-12
ctl formula formula --ctl=/tmp/550/ctl_10_
ctl formula name AirplaneLD-PT-2000-CTLFireability-2024-13
ctl formula formula --ctl=/tmp/550/ctl_11_
ctl formula name AirplaneLD-PT-2000-CTLFireability-2024-14
ctl formula formula --ctl=/tmp/550/ctl_12_
ctl formula name AirplaneLD-PT-2000-CTLFireability-2024-15
ctl formula formula --ctl=/tmp/550/ctl_13_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-PT-2000"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is AirplaneLD-PT-2000, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r464-smll-171620118200298"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-PT-2000.tgz
mv AirplaneLD-PT-2000 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;