Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r464-smll-171620118200258.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is AirplaneLD-PT-0050, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r464-smll-171620118200258
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.5M
-rw-r--r-- 1 mcc users 42K Apr 12 03:32 CTLCardinality.txt
-rw-r--r-- 1 mcc users 202K Apr 12 03:32 CTLCardinality.xml
-rw-r--r-- 1 mcc users 22K Apr 12 03:29 CTLFireability.txt
-rw-r--r-- 1 mcc users 143K Apr 12 03:29 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 31K Apr 22 14:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 93K Apr 22 14:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 16K Apr 22 14:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 72K Apr 22 14:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 31K Apr 12 03:41 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 132K Apr 12 03:41 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 62K Apr 12 03:39 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 391K Apr 12 03:39 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 3.8K Apr 22 14:27 UpperBounds.txt
-rw-r--r-- 1 mcc users 7.9K Apr 22 14:27 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 219K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-2024-00
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-2024-01
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-2024-02
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-2024-03
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-2024-04
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-2024-05
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-2024-06
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-2024-07
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-2024-08
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-2024-09
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-2024-10
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-2024-11
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-2024-12
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-2024-13
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-2024-14
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717249572924

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AirplaneLD-PT-0050
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 13:46:15] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 13:46:15] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 13:46:15] [INFO ] Load time of PNML (sax parser for PT used): 244 ms
[2024-06-01 13:46:15] [INFO ] Transformed 369 places.
[2024-06-01 13:46:15] [INFO ] Transformed 408 transitions.
[2024-06-01 13:46:15] [INFO ] Found NUPN structural information;
[2024-06-01 13:46:15] [INFO ] Parsed PT model containing 369 places and 408 transitions and 1553 arcs in 492 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 52 ms.
Reduce places removed 152 places and 0 transitions.
Support contains 214 out of 217 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 217/217 places, 408/408 transitions.
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 214 transition count 408
Applied a total of 3 rules in 27 ms. Remains 214 /217 variables (removed 3) and now considering 408/408 (removed 0) transitions.
// Phase 1: matrix 408 rows 214 cols
[2024-06-01 13:46:16] [INFO ] Computed 1 invariants in 41 ms
[2024-06-01 13:46:16] [INFO ] Implicit Places using invariants in 473 ms returned []
[2024-06-01 13:46:16] [INFO ] Invariant cache hit.
[2024-06-01 13:46:16] [INFO ] Implicit Places using invariants and state equation in 449 ms returned []
Implicit Place search using SMT with State Equation took 971 ms to find 0 implicit places.
Running 204 sub problems to find dead transitions.
[2024-06-01 13:46:17] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/209 variables, 209/209 constraints. Problems are: Problem set: 0 solved, 204 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/209 variables, 0/209 constraints. Problems are: Problem set: 0 solved, 204 unsolved
At refinement iteration 2 (OVERLAPS) 1/210 variables, 1/210 constraints. Problems are: Problem set: 0 solved, 204 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/210 variables, 1/211 constraints. Problems are: Problem set: 0 solved, 204 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/210 variables, 0/211 constraints. Problems are: Problem set: 0 solved, 204 unsolved
At refinement iteration 5 (OVERLAPS) 408/618 variables, 210/421 constraints. Problems are: Problem set: 0 solved, 204 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/618 variables, 0/421 constraints. Problems are: Problem set: 0 solved, 204 unsolved
At refinement iteration 7 (OVERLAPS) 4/622 variables, 4/425 constraints. Problems are: Problem set: 0 solved, 204 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/622 variables, 4/429 constraints. Problems are: Problem set: 0 solved, 204 unsolved
At refinement iteration 9 (INCLUDED_ONLY) 0/622 variables, 0/429 constraints. Problems are: Problem set: 0 solved, 204 unsolved
At refinement iteration 10 (OVERLAPS) 0/622 variables, 0/429 constraints. Problems are: Problem set: 0 solved, 204 unsolved
No progress, stopping.
After SMT solving in domain Real declared 622/622 variables, and 429 constraints, problems are : Problem set: 0 solved, 204 unsolved in 20231 ms.
Refiners :[Domain max(s): 214/214 constraints, Generalized P Invariants (flows): 1/1 constraints, State Equation: 214/214 constraints, PredecessorRefiner: 204/204 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 204 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/209 variables, 209/209 constraints. Problems are: Problem set: 0 solved, 204 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/209 variables, 0/209 constraints. Problems are: Problem set: 0 solved, 204 unsolved
At refinement iteration 2 (OVERLAPS) 1/210 variables, 1/210 constraints. Problems are: Problem set: 0 solved, 204 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/210 variables, 1/211 constraints. Problems are: Problem set: 0 solved, 204 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/210 variables, 0/211 constraints. Problems are: Problem set: 0 solved, 204 unsolved
At refinement iteration 5 (OVERLAPS) 408/618 variables, 210/421 constraints. Problems are: Problem set: 0 solved, 204 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/618 variables, 204/625 constraints. Problems are: Problem set: 0 solved, 204 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/618 variables, 0/625 constraints. Problems are: Problem set: 0 solved, 204 unsolved
At refinement iteration 8 (OVERLAPS) 4/622 variables, 4/629 constraints. Problems are: Problem set: 0 solved, 204 unsolved
At refinement iteration 9 (INCLUDED_ONLY) 0/622 variables, 4/633 constraints. Problems are: Problem set: 0 solved, 204 unsolved
At refinement iteration 10 (INCLUDED_ONLY) 0/622 variables, 0/633 constraints. Problems are: Problem set: 0 solved, 204 unsolved
At refinement iteration 11 (OVERLAPS) 0/622 variables, 0/633 constraints. Problems are: Problem set: 0 solved, 204 unsolved
No progress, stopping.
After SMT solving in domain Int declared 622/622 variables, and 633 constraints, problems are : Problem set: 0 solved, 204 unsolved in 25853 ms.
Refiners :[Domain max(s): 214/214 constraints, Generalized P Invariants (flows): 1/1 constraints, State Equation: 214/214 constraints, PredecessorRefiner: 204/204 constraints, Known Traps: 0/0 constraints]
After SMT, in 46950ms problems are : Problem set: 0 solved, 204 unsolved
Search for dead transitions found 0 dead transitions in 46991ms
Starting structural reductions in LTL mode, iteration 1 : 214/217 places, 408/408 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 48025 ms. Remains : 214/217 places, 408/408 transitions.
Support contains 214 out of 214 places after structural reductions.
[2024-06-01 13:47:04] [INFO ] Flatten gal took : 87 ms
[2024-06-01 13:47:04] [INFO ] Flatten gal took : 77 ms
[2024-06-01 13:47:04] [INFO ] Input system was already deterministic with 408 transitions.
Reduction of identical properties reduced properties to check from 51 to 45
RANDOM walk for 40000 steps (5043 resets) in 4362 ms. (9 steps per ms) remains 6/45 properties
BEST_FIRST walk for 40004 steps (81 resets) in 564 ms. (70 steps per ms) remains 6/6 properties
BEST_FIRST walk for 40004 steps (62 resets) in 36 ms. (1081 steps per ms) remains 6/6 properties
BEST_FIRST walk for 40004 steps (72 resets) in 52 ms. (754 steps per ms) remains 6/6 properties
BEST_FIRST walk for 40004 steps (64 resets) in 44 ms. (888 steps per ms) remains 6/6 properties
BEST_FIRST walk for 40004 steps (63 resets) in 32 ms. (1212 steps per ms) remains 6/6 properties
BEST_FIRST walk for 40004 steps (97 resets) in 52 ms. (754 steps per ms) remains 6/6 properties
[2024-06-01 13:47:06] [INFO ] Invariant cache hit.
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/69 variables, 69/69 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/69 variables, 1/70 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/69 variables, 0/70 constraints. Problems are: Problem set: 0 solved, 6 unsolved
Problem AtomicPropp8 is UNSAT
Problem AtomicPropp11 is UNSAT
Problem AtomicPropp13 is UNSAT
Problem AtomicPropp44 is UNSAT
Problem AtomicPropp49 is UNSAT
At refinement iteration 3 (OVERLAPS) 408/477 variables, 69/139 constraints. Problems are: Problem set: 5 solved, 1 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/477 variables, 0/139 constraints. Problems are: Problem set: 5 solved, 1 unsolved
Problem AtomicPropp43 is UNSAT
After SMT solving in domain Real declared 622/622 variables, and 284 constraints, problems are : Problem set: 6 solved, 0 unsolved in 287 ms.
Refiners :[Domain max(s): 69/214 constraints, Generalized P Invariants (flows): 1/1 constraints, State Equation: 214/214 constraints, PredecessorRefiner: 6/6 constraints, Known Traps: 0/0 constraints]
After SMT, in 383ms problems are : Problem set: 6 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 6 atomic propositions for a total of 16 simplifications.
FORMULA AirplaneLD-PT-0050-CTLFireability-2024-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 13:47:06] [INFO ] Flatten gal took : 43 ms
[2024-06-01 13:47:06] [INFO ] Flatten gal took : 31 ms
[2024-06-01 13:47:07] [INFO ] Input system was already deterministic with 408 transitions.
Computed a total of 214 stabilizing places and 408 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 214 transition count 408
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 2 formulas.
FORMULA AirplaneLD-PT-0050-CTLFireability-2024-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in SI_CTL mode, iteration 0 : 214/214 places, 408/408 transitions.
Graph (complete) has 287 edges and 214 vertex of which 110 are kept as prefixes of interest. Removing 104 places using SCC suffix rule.3 ms
Discarding 104 places :
Also discarding 200 output transitions
Drop transitions (Output transitions of discarded places.) removed 200 transitions
Discarding 50 places :
Symmetric choice reduction at 0 with 50 rule applications. Total rules 51 place count 60 transition count 158
Iterating global reduction 0 with 50 rules applied. Total rules applied 101 place count 60 transition count 158
Ensure Unique test removed 50 transitions
Reduce isomorphic transitions removed 50 transitions.
Iterating post reduction 0 with 50 rules applied. Total rules applied 151 place count 60 transition count 108
Applied a total of 151 rules in 28 ms. Remains 60 /214 variables (removed 154) and now considering 108/408 (removed 300) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 28 ms. Remains : 60/214 places, 108/408 transitions.
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 7 ms
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 7 ms
[2024-06-01 13:47:07] [INFO ] Input system was already deterministic with 108 transitions.
Starting structural reductions in LTL mode, iteration 0 : 214/214 places, 408/408 transitions.
Discarding 195 places :
Symmetric choice reduction at 0 with 195 rule applications. Total rules 195 place count 19 transition count 213
Iterating global reduction 0 with 195 rules applied. Total rules applied 390 place count 19 transition count 213
Ensure Unique test removed 195 transitions
Reduce isomorphic transitions removed 195 transitions.
Iterating post reduction 0 with 195 rules applied. Total rules applied 585 place count 19 transition count 18
Applied a total of 585 rules in 7 ms. Remains 19 /214 variables (removed 195) and now considering 18/408 (removed 390) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 19/214 places, 18/408 transitions.
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:47:07] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 214/214 places, 408/408 transitions.
Discarding 71 places :
Symmetric choice reduction at 0 with 71 rule applications. Total rules 71 place count 143 transition count 337
Iterating global reduction 0 with 71 rules applied. Total rules applied 142 place count 143 transition count 337
Ensure Unique test removed 71 transitions
Reduce isomorphic transitions removed 71 transitions.
Iterating post reduction 0 with 71 rules applied. Total rules applied 213 place count 143 transition count 266
Applied a total of 213 rules in 4 ms. Remains 143 /214 variables (removed 71) and now considering 266/408 (removed 142) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 143/214 places, 266/408 transitions.
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 14 ms
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 16 ms
[2024-06-01 13:47:07] [INFO ] Input system was already deterministic with 266 transitions.
Starting structural reductions in LTL mode, iteration 0 : 214/214 places, 408/408 transitions.
Discarding 169 places :
Symmetric choice reduction at 0 with 169 rule applications. Total rules 169 place count 45 transition count 239
Iterating global reduction 0 with 169 rules applied. Total rules applied 338 place count 45 transition count 239
Ensure Unique test removed 169 transitions
Reduce isomorphic transitions removed 169 transitions.
Iterating post reduction 0 with 169 rules applied. Total rules applied 507 place count 45 transition count 70
Applied a total of 507 rules in 4 ms. Remains 45 /214 variables (removed 169) and now considering 70/408 (removed 338) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 45/214 places, 70/408 transitions.
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 3 ms
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 4 ms
[2024-06-01 13:47:07] [INFO ] Input system was already deterministic with 70 transitions.
Starting structural reductions in LTL mode, iteration 0 : 214/214 places, 408/408 transitions.
Discarding 98 places :
Symmetric choice reduction at 0 with 98 rule applications. Total rules 98 place count 116 transition count 310
Iterating global reduction 0 with 98 rules applied. Total rules applied 196 place count 116 transition count 310
Ensure Unique test removed 98 transitions
Reduce isomorphic transitions removed 98 transitions.
Iterating post reduction 0 with 98 rules applied. Total rules applied 294 place count 116 transition count 212
Applied a total of 294 rules in 4 ms. Remains 116 /214 variables (removed 98) and now considering 212/408 (removed 196) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 116/214 places, 212/408 transitions.
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 10 ms
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 11 ms
[2024-06-01 13:47:07] [INFO ] Input system was already deterministic with 212 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 214/214 places, 408/408 transitions.
Graph (complete) has 287 edges and 214 vertex of which 8 are kept as prefixes of interest. Removing 206 places using SCC suffix rule.1 ms
Discarding 206 places :
Also discarding 400 output transitions
Drop transitions (Output transitions of discarded places.) removed 400 transitions
Applied a total of 1 rules in 3 ms. Remains 8 /214 variables (removed 206) and now considering 8/408 (removed 400) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 8/214 places, 8/408 transitions.
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 0 ms
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 1 ms
[2024-06-01 13:47:07] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 214/214 places, 408/408 transitions.
Graph (complete) has 287 edges and 214 vertex of which 8 are kept as prefixes of interest. Removing 206 places using SCC suffix rule.1 ms
Discarding 206 places :
Also discarding 400 output transitions
Drop transitions (Output transitions of discarded places.) removed 400 transitions
Applied a total of 1 rules in 2 ms. Remains 8 /214 variables (removed 206) and now considering 8/408 (removed 400) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 8/214 places, 8/408 transitions.
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 0 ms
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 0 ms
[2024-06-01 13:47:07] [INFO ] Input system was already deterministic with 8 transitions.
RANDOM walk for 60 steps (12 resets) in 5 ms. (10 steps per ms) remains 0/1 properties
FORMULA AirplaneLD-PT-0050-CTLFireability-2024-07 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 214/214 places, 408/408 transitions.
Discarding 192 places :
Symmetric choice reduction at 0 with 192 rule applications. Total rules 192 place count 22 transition count 216
Iterating global reduction 0 with 192 rules applied. Total rules applied 384 place count 22 transition count 216
Ensure Unique test removed 192 transitions
Reduce isomorphic transitions removed 192 transitions.
Iterating post reduction 0 with 192 rules applied. Total rules applied 576 place count 22 transition count 24
Applied a total of 576 rules in 4 ms. Remains 22 /214 variables (removed 192) and now considering 24/408 (removed 384) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 22/214 places, 24/408 transitions.
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 1 ms
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 1 ms
[2024-06-01 13:47:07] [INFO ] Input system was already deterministic with 24 transitions.
Starting structural reductions in LTL mode, iteration 0 : 214/214 places, 408/408 transitions.
Discarding 191 places :
Symmetric choice reduction at 0 with 191 rule applications. Total rules 191 place count 23 transition count 217
Iterating global reduction 0 with 191 rules applied. Total rules applied 382 place count 23 transition count 217
Ensure Unique test removed 191 transitions
Reduce isomorphic transitions removed 191 transitions.
Iterating post reduction 0 with 191 rules applied. Total rules applied 573 place count 23 transition count 26
Applied a total of 573 rules in 4 ms. Remains 23 /214 variables (removed 191) and now considering 26/408 (removed 382) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 23/214 places, 26/408 transitions.
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 1 ms
[2024-06-01 13:47:07] [INFO ] Input system was already deterministic with 26 transitions.
Starting structural reductions in LTL mode, iteration 0 : 214/214 places, 408/408 transitions.
Discarding 187 places :
Symmetric choice reduction at 0 with 187 rule applications. Total rules 187 place count 27 transition count 221
Iterating global reduction 0 with 187 rules applied. Total rules applied 374 place count 27 transition count 221
Ensure Unique test removed 187 transitions
Reduce isomorphic transitions removed 187 transitions.
Iterating post reduction 0 with 187 rules applied. Total rules applied 561 place count 27 transition count 34
Applied a total of 561 rules in 4 ms. Remains 27 /214 variables (removed 187) and now considering 34/408 (removed 374) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 27/214 places, 34/408 transitions.
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 1 ms
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:47:07] [INFO ] Input system was already deterministic with 34 transitions.
Starting structural reductions in LTL mode, iteration 0 : 214/214 places, 408/408 transitions.
Discarding 195 places :
Symmetric choice reduction at 0 with 195 rule applications. Total rules 195 place count 19 transition count 213
Iterating global reduction 0 with 195 rules applied. Total rules applied 390 place count 19 transition count 213
Ensure Unique test removed 195 transitions
Reduce isomorphic transitions removed 195 transitions.
Iterating post reduction 0 with 195 rules applied. Total rules applied 585 place count 19 transition count 18
Applied a total of 585 rules in 5 ms. Remains 19 /214 variables (removed 195) and now considering 18/408 (removed 390) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 19/214 places, 18/408 transitions.
[2024-06-01 13:47:07] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 2 ms
FORMULA AirplaneLD-PT-0050-CTLFireability-2024-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 1 ms
[2024-06-01 13:47:07] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 214/214 places, 408/408 transitions.
Discarding 194 places :
Symmetric choice reduction at 0 with 194 rule applications. Total rules 194 place count 20 transition count 214
Iterating global reduction 0 with 194 rules applied. Total rules applied 388 place count 20 transition count 214
Ensure Unique test removed 194 transitions
Reduce isomorphic transitions removed 194 transitions.
Iterating post reduction 0 with 194 rules applied. Total rules applied 582 place count 20 transition count 20
Applied a total of 582 rules in 4 ms. Remains 20 /214 variables (removed 194) and now considering 20/408 (removed 388) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 20/214 places, 20/408 transitions.
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 1 ms
[2024-06-01 13:47:07] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 214/214 places, 408/408 transitions.
Discarding 192 places :
Symmetric choice reduction at 0 with 192 rule applications. Total rules 192 place count 22 transition count 216
Iterating global reduction 0 with 192 rules applied. Total rules applied 384 place count 22 transition count 216
Ensure Unique test removed 192 transitions
Reduce isomorphic transitions removed 192 transitions.
Iterating post reduction 0 with 192 rules applied. Total rules applied 576 place count 22 transition count 24
Applied a total of 576 rules in 5 ms. Remains 22 /214 variables (removed 192) and now considering 24/408 (removed 384) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 22/214 places, 24/408 transitions.
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 1 ms
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:47:07] [INFO ] Input system was already deterministic with 24 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 214/214 places, 408/408 transitions.
Graph (complete) has 287 edges and 214 vertex of which 1 are kept as prefixes of interest. Removing 213 places using SCC suffix rule.1 ms
Discarding 213 places :
Also discarding 358 output transitions
Drop transitions (Output transitions of discarded places.) removed 358 transitions
Ensure Unique test removed 49 transitions
Reduce isomorphic transitions removed 49 transitions.
Iterating post reduction 0 with 49 rules applied. Total rules applied 50 place count 1 transition count 1
Applied a total of 50 rules in 3 ms. Remains 1 /214 variables (removed 213) and now considering 1/408 (removed 407) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 1/214 places, 1/408 transitions.
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 0 ms
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 1 ms
[2024-06-01 13:47:07] [INFO ] Input system was already deterministic with 1 transitions.
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 23 ms
[2024-06-01 13:47:07] [INFO ] Flatten gal took : 23 ms
[2024-06-01 13:47:07] [INFO ] Export to MCC of 12 properties in file /home/mcc/execution/CTLFireability.sr.xml took 15 ms.
[2024-06-01 13:47:07] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 214 places, 408 transitions and 895 arcs took 8 ms.
Total runtime 52446 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : AirplaneLD-PT-0050-CTLFireability-2024-00
Could not compute solution for formula : AirplaneLD-PT-0050-CTLFireability-2024-01
Could not compute solution for formula : AirplaneLD-PT-0050-CTLFireability-2024-03
Could not compute solution for formula : AirplaneLD-PT-0050-CTLFireability-2024-04
Could not compute solution for formula : AirplaneLD-PT-0050-CTLFireability-2024-05
Could not compute solution for formula : AirplaneLD-PT-0050-CTLFireability-2024-06
Could not compute solution for formula : AirplaneLD-PT-0050-CTLFireability-2024-08
Could not compute solution for formula : AirplaneLD-PT-0050-CTLFireability-2024-09
Could not compute solution for formula : AirplaneLD-PT-0050-CTLFireability-2024-10
Could not compute solution for formula : AirplaneLD-PT-0050-CTLFireability-2024-13
Could not compute solution for formula : AirplaneLD-PT-0050-CTLFireability-2024-14
Could not compute solution for formula : AirplaneLD-PT-0050-CTLFireability-2024-15

BK_STOP 1717249627896

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name AirplaneLD-PT-0050-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/525/ctl_0_
ctl formula name AirplaneLD-PT-0050-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/525/ctl_1_
ctl formula name AirplaneLD-PT-0050-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/525/ctl_2_
ctl formula name AirplaneLD-PT-0050-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/525/ctl_3_
ctl formula name AirplaneLD-PT-0050-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/525/ctl_4_
ctl formula name AirplaneLD-PT-0050-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/525/ctl_5_
ctl formula name AirplaneLD-PT-0050-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/525/ctl_6_
ctl formula name AirplaneLD-PT-0050-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/525/ctl_7_
ctl formula name AirplaneLD-PT-0050-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/525/ctl_8_
ctl formula name AirplaneLD-PT-0050-CTLFireability-2024-13
ctl formula formula --ctl=/tmp/525/ctl_9_
ctl formula name AirplaneLD-PT-0050-CTLFireability-2024-14
ctl formula formula --ctl=/tmp/525/ctl_10_
ctl formula name AirplaneLD-PT-0050-CTLFireability-2024-15
ctl formula formula --ctl=/tmp/525/ctl_11_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-PT-0050"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is AirplaneLD-PT-0050, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r464-smll-171620118200258"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-PT-0050.tgz
mv AirplaneLD-PT-0050 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;