fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r464-smll-171620118100250
Last Updated
July 7, 2024

About the Execution of LTSMin+red for AirplaneLD-PT-0020

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
298.592 13491.00 31107.00 107.60 ?????F?T?????F?? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r464-smll-171620118100250.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is AirplaneLD-PT-0020, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r464-smll-171620118100250
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 996K
-rw-r--r-- 1 mcc users 27K Apr 12 03:30 CTLCardinality.txt
-rw-r--r-- 1 mcc users 149K Apr 12 03:30 CTLCardinality.xml
-rw-r--r-- 1 mcc users 8.3K Apr 12 03:25 CTLFireability.txt
-rw-r--r-- 1 mcc users 58K Apr 12 03:25 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 12K Apr 22 14:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 45K Apr 22 14:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 5.2K Apr 22 14:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 29K Apr 22 14:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 33K Apr 12 03:37 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 180K Apr 12 03:37 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 38K Apr 12 03:35 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 254K Apr 12 03:35 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.8K Apr 22 14:27 UpperBounds.txt
-rw-r--r-- 1 mcc users 6.0K Apr 22 14:27 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:42 instance
-rw-r--r-- 1 mcc users 6 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 91K May 18 16:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-2024-00
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-2024-01
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-2024-02
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-2024-03
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-2024-04
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-2024-05
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-2024-06
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-2024-07
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-2024-08
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-2024-09
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-2024-10
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-2024-11
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-2024-12
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-2024-13
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-2024-14
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717249477170

Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AirplaneLD-PT-0020
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 13:44:39] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 13:44:39] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 13:44:39] [INFO ] Load time of PNML (sax parser for PT used): 123 ms
[2024-06-01 13:44:39] [INFO ] Transformed 159 places.
[2024-06-01 13:44:39] [INFO ] Transformed 168 transitions.
[2024-06-01 13:44:39] [INFO ] Found NUPN structural information;
[2024-06-01 13:44:39] [INFO ] Parsed PT model containing 159 places and 168 transitions and 638 arcs in 274 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 21 ms.
Reduce places removed 62 places and 0 transitions.
Support contains 78 out of 97 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 97/97 places, 168/168 transitions.
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 94 transition count 168
Discarding 14 places :
Symmetric choice reduction at 1 with 14 rule applications. Total rules 17 place count 80 transition count 154
Iterating global reduction 1 with 14 rules applied. Total rules applied 31 place count 80 transition count 154
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 1 with 14 rules applied. Total rules applied 45 place count 80 transition count 140
Applied a total of 45 rules in 39 ms. Remains 80 /97 variables (removed 17) and now considering 140/168 (removed 28) transitions.
// Phase 1: matrix 140 rows 80 cols
[2024-06-01 13:44:39] [INFO ] Computed 1 invariants in 29 ms
[2024-06-01 13:44:40] [INFO ] Implicit Places using invariants in 448 ms returned []
[2024-06-01 13:44:40] [INFO ] Invariant cache hit.
[2024-06-01 13:44:40] [INFO ] Implicit Places using invariants and state equation in 241 ms returned []
Implicit Place search using SMT with State Equation took 759 ms to find 0 implicit places.
Running 70 sub problems to find dead transitions.
[2024-06-01 13:44:40] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/75 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 1 (OVERLAPS) 1/76 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/76 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 3 (OVERLAPS) 140/216 variables, 76/77 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/216 variables, 0/77 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 5 (OVERLAPS) 4/220 variables, 4/81 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/220 variables, 0/81 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 7 (OVERLAPS) 0/220 variables, 0/81 constraints. Problems are: Problem set: 0 solved, 70 unsolved
No progress, stopping.
After SMT solving in domain Real declared 220/220 variables, and 81 constraints, problems are : Problem set: 0 solved, 70 unsolved in 3204 ms.
Refiners :[Generalized P Invariants (flows): 1/1 constraints, State Equation: 80/80 constraints, PredecessorRefiner: 70/70 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 70 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/75 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 1 (OVERLAPS) 1/76 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/76 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 3 (OVERLAPS) 140/216 variables, 76/77 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/216 variables, 70/147 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/216 variables, 0/147 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 6 (OVERLAPS) 4/220 variables, 4/151 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/220 variables, 0/151 constraints. Problems are: Problem set: 0 solved, 70 unsolved
At refinement iteration 8 (OVERLAPS) 0/220 variables, 0/151 constraints. Problems are: Problem set: 0 solved, 70 unsolved
No progress, stopping.
After SMT solving in domain Int declared 220/220 variables, and 151 constraints, problems are : Problem set: 0 solved, 70 unsolved in 3435 ms.
Refiners :[Generalized P Invariants (flows): 1/1 constraints, State Equation: 80/80 constraints, PredecessorRefiner: 70/70 constraints, Known Traps: 0/0 constraints]
After SMT, in 6921ms problems are : Problem set: 0 solved, 70 unsolved
Search for dead transitions found 0 dead transitions in 6948ms
Starting structural reductions in LTL mode, iteration 1 : 80/97 places, 140/168 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7785 ms. Remains : 80/97 places, 140/168 transitions.
Support contains 78 out of 80 places after structural reductions.
[2024-06-01 13:44:47] [INFO ] Flatten gal took : 67 ms
[2024-06-01 13:44:47] [INFO ] Flatten gal took : 31 ms
[2024-06-01 13:44:48] [INFO ] Input system was already deterministic with 140 transitions.
Reduction of identical properties reduced properties to check from 40 to 38
RANDOM walk for 40000 steps (5056 resets) in 2411 ms. (16 steps per ms) remains 4/38 properties
BEST_FIRST walk for 40004 steps (230 resets) in 279 ms. (142 steps per ms) remains 4/4 properties
BEST_FIRST walk for 40004 steps (216 resets) in 147 ms. (270 steps per ms) remains 3/4 properties
BEST_FIRST walk for 40003 steps (119 resets) in 49 ms. (800 steps per ms) remains 3/3 properties
BEST_FIRST walk for 40004 steps (193 resets) in 39 ms. (1000 steps per ms) remains 3/3 properties
[2024-06-01 13:44:49] [INFO ] Invariant cache hit.
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/16 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 1 (OVERLAPS) 102/118 variables, 16/16 constraints. Problems are: Problem set: 0 solved, 3 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/118 variables, 0/16 constraints. Problems are: Problem set: 0 solved, 3 unsolved
Problem AtomicPropp5 is UNSAT
Problem AtomicPropp35 is UNSAT
At refinement iteration 3 (OVERLAPS) 93/211 variables, 59/75 constraints. Problems are: Problem set: 2 solved, 1 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/211 variables, 0/75 constraints. Problems are: Problem set: 2 solved, 1 unsolved
At refinement iteration 5 (OVERLAPS) 2/213 variables, 1/76 constraints. Problems are: Problem set: 2 solved, 1 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/213 variables, 0/76 constraints. Problems are: Problem set: 2 solved, 1 unsolved
At refinement iteration 7 (OVERLAPS) 4/217 variables, 2/78 constraints. Problems are: Problem set: 2 solved, 1 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/217 variables, 0/78 constraints. Problems are: Problem set: 2 solved, 1 unsolved
At refinement iteration 9 (OVERLAPS) 2/219 variables, 1/79 constraints. Problems are: Problem set: 2 solved, 1 unsolved
At refinement iteration 10 (INCLUDED_ONLY) 0/219 variables, 0/79 constraints. Problems are: Problem set: 2 solved, 1 unsolved
At refinement iteration 11 (OVERLAPS) 1/220 variables, 2/81 constraints. Problems are: Problem set: 2 solved, 1 unsolved
At refinement iteration 12 (INCLUDED_ONLY) 0/220 variables, 0/81 constraints. Problems are: Problem set: 2 solved, 1 unsolved
At refinement iteration 13 (OVERLAPS) 0/220 variables, 0/81 constraints. Problems are: Problem set: 2 solved, 1 unsolved
No progress, stopping.
After SMT solving in domain Real declared 220/220 variables, and 81 constraints, problems are : Problem set: 2 solved, 1 unsolved in 151 ms.
Refiners :[Generalized P Invariants (flows): 1/1 constraints, State Equation: 80/80 constraints, PredecessorRefiner: 3/3 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 2 solved, 1 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/3 variables, 0/0 constraints. Problems are: Problem set: 2 solved, 1 unsolved
At refinement iteration 1 (OVERLAPS) 74/77 variables, 3/3 constraints. Problems are: Problem set: 2 solved, 1 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/77 variables, 0/3 constraints. Problems are: Problem set: 2 solved, 1 unsolved
Problem AtomicPropp20 is UNSAT
After SMT solving in domain Int declared 176/220 variables, and 57 constraints, problems are : Problem set: 3 solved, 0 unsolved in 99 ms.
Refiners :[Generalized P Invariants (flows): 0/1 constraints, State Equation: 57/80 constraints, PredecessorRefiner: 0/3 constraints, Known Traps: 0/0 constraints]
After SMT, in 262ms problems are : Problem set: 3 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 3 atomic propositions for a total of 16 simplifications.
FORMULA AirplaneLD-PT-0020-CTLFireability-2024-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 19 ms
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 22 ms
[2024-06-01 13:44:49] [INFO ] Input system was already deterministic with 140 transitions.
Computed a total of 80 stabilizing places and 140 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 80 transition count 140
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 2 formulas.
FORMULA AirplaneLD-PT-0020-CTLFireability-2024-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-0020-CTLFireability-2024-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in SI_CTL mode, iteration 0 : 80/80 places, 140/140 transitions.
Graph (complete) has 100 edges and 80 vertex of which 10 are kept as prefixes of interest. Removing 70 places using SCC suffix rule.2 ms
Discarding 70 places :
Also discarding 78 output transitions
Drop transitions (Output transitions of discarded places.) removed 78 transitions
Ensure Unique test removed 52 transitions
Reduce isomorphic transitions removed 52 transitions.
Iterating post reduction 0 with 52 rules applied. Total rules applied 53 place count 10 transition count 10
Applied a total of 53 rules in 20 ms. Remains 10 /80 variables (removed 70) and now considering 10/140 (removed 130) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 20 ms. Remains : 10/80 places, 10/140 transitions.
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 1 ms
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:44:49] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 140/140 transitions.
Discarding 50 places :
Symmetric choice reduction at 0 with 50 rule applications. Total rules 50 place count 30 transition count 90
Iterating global reduction 0 with 50 rules applied. Total rules applied 100 place count 30 transition count 90
Ensure Unique test removed 50 transitions
Reduce isomorphic transitions removed 50 transitions.
Iterating post reduction 0 with 50 rules applied. Total rules applied 150 place count 30 transition count 40
Applied a total of 150 rules in 4 ms. Remains 30 /80 variables (removed 50) and now considering 40/140 (removed 100) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 30/80 places, 40/140 transitions.
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 5 ms
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 5 ms
[2024-06-01 13:44:49] [INFO ] Input system was already deterministic with 40 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 140/140 transitions.
Discarding 61 places :
Symmetric choice reduction at 0 with 61 rule applications. Total rules 61 place count 19 transition count 79
Iterating global reduction 0 with 61 rules applied. Total rules applied 122 place count 19 transition count 79
Ensure Unique test removed 61 transitions
Reduce isomorphic transitions removed 61 transitions.
Iterating post reduction 0 with 61 rules applied. Total rules applied 183 place count 19 transition count 18
Applied a total of 183 rules in 4 ms. Remains 19 /80 variables (removed 61) and now considering 18/140 (removed 122) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 19/80 places, 18/140 transitions.
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 3 ms
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 3 ms
[2024-06-01 13:44:49] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 80/80 places, 140/140 transitions.
Graph (complete) has 100 edges and 80 vertex of which 10 are kept as prefixes of interest. Removing 70 places using SCC suffix rule.1 ms
Discarding 70 places :
Also discarding 80 output transitions
Drop transitions (Output transitions of discarded places.) removed 80 transitions
Ensure Unique test removed 50 transitions
Reduce isomorphic transitions removed 50 transitions.
Iterating post reduction 0 with 50 rules applied. Total rules applied 51 place count 10 transition count 10
Applied a total of 51 rules in 3 ms. Remains 10 /80 variables (removed 70) and now considering 10/140 (removed 130) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 10/80 places, 10/140 transitions.
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:44:49] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 140/140 transitions.
Discarding 43 places :
Symmetric choice reduction at 0 with 43 rule applications. Total rules 43 place count 37 transition count 97
Iterating global reduction 0 with 43 rules applied. Total rules applied 86 place count 37 transition count 97
Ensure Unique test removed 43 transitions
Reduce isomorphic transitions removed 43 transitions.
Iterating post reduction 0 with 43 rules applied. Total rules applied 129 place count 37 transition count 54
Applied a total of 129 rules in 3 ms. Remains 37 /80 variables (removed 43) and now considering 54/140 (removed 86) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 37/80 places, 54/140 transitions.
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 5 ms
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 6 ms
[2024-06-01 13:44:49] [INFO ] Input system was already deterministic with 54 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 140/140 transitions.
Discarding 30 places :
Symmetric choice reduction at 0 with 30 rule applications. Total rules 30 place count 50 transition count 110
Iterating global reduction 0 with 30 rules applied. Total rules applied 60 place count 50 transition count 110
Ensure Unique test removed 30 transitions
Reduce isomorphic transitions removed 30 transitions.
Iterating post reduction 0 with 30 rules applied. Total rules applied 90 place count 50 transition count 80
Applied a total of 90 rules in 3 ms. Remains 50 /80 variables (removed 30) and now considering 80/140 (removed 60) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 50/80 places, 80/140 transitions.
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 9 ms
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 9 ms
[2024-06-01 13:44:49] [INFO ] Input system was already deterministic with 80 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 140/140 transitions.
Discarding 59 places :
Symmetric choice reduction at 0 with 59 rule applications. Total rules 59 place count 21 transition count 81
Iterating global reduction 0 with 59 rules applied. Total rules applied 118 place count 21 transition count 81
Ensure Unique test removed 59 transitions
Reduce isomorphic transitions removed 59 transitions.
Iterating post reduction 0 with 59 rules applied. Total rules applied 177 place count 21 transition count 22
Applied a total of 177 rules in 3 ms. Remains 21 /80 variables (removed 59) and now considering 22/140 (removed 118) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 21/80 places, 22/140 transitions.
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 3 ms
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 3 ms
[2024-06-01 13:44:49] [INFO ] Input system was already deterministic with 22 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 140/140 transitions.
Discarding 60 places :
Symmetric choice reduction at 0 with 60 rule applications. Total rules 60 place count 20 transition count 80
Iterating global reduction 0 with 60 rules applied. Total rules applied 120 place count 20 transition count 80
Ensure Unique test removed 60 transitions
Reduce isomorphic transitions removed 60 transitions.
Iterating post reduction 0 with 60 rules applied. Total rules applied 180 place count 20 transition count 20
Applied a total of 180 rules in 3 ms. Remains 20 /80 variables (removed 60) and now considering 20/140 (removed 120) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 20/80 places, 20/140 transitions.
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 3 ms
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 3 ms
[2024-06-01 13:44:49] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 80/80 places, 140/140 transitions.
Graph (complete) has 100 edges and 80 vertex of which 64 are kept as prefixes of interest. Removing 16 places using SCC suffix rule.1 ms
Discarding 16 places :
Also discarding 28 output transitions
Drop transitions (Output transitions of discarded places.) removed 28 transitions
Discarding 47 places :
Symmetric choice reduction at 0 with 47 rule applications. Total rules 48 place count 17 transition count 65
Iterating global reduction 0 with 47 rules applied. Total rules applied 95 place count 17 transition count 65
Ensure Unique test removed 47 transitions
Reduce isomorphic transitions removed 47 transitions.
Iterating post reduction 0 with 47 rules applied. Total rules applied 142 place count 17 transition count 18
Applied a total of 142 rules in 7 ms. Remains 17 /80 variables (removed 63) and now considering 18/140 (removed 122) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 17/80 places, 18/140 transitions.
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:44:49] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 140/140 transitions.
Discarding 58 places :
Symmetric choice reduction at 0 with 58 rule applications. Total rules 58 place count 22 transition count 82
Iterating global reduction 0 with 58 rules applied. Total rules applied 116 place count 22 transition count 82
Ensure Unique test removed 58 transitions
Reduce isomorphic transitions removed 58 transitions.
Iterating post reduction 0 with 58 rules applied. Total rules applied 174 place count 22 transition count 24
Applied a total of 174 rules in 3 ms. Remains 22 /80 variables (removed 58) and now considering 24/140 (removed 116) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 22/80 places, 24/140 transitions.
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 3 ms
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 3 ms
[2024-06-01 13:44:49] [INFO ] Input system was already deterministic with 24 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 140/140 transitions.
Discarding 54 places :
Symmetric choice reduction at 0 with 54 rule applications. Total rules 54 place count 26 transition count 86
Iterating global reduction 0 with 54 rules applied. Total rules applied 108 place count 26 transition count 86
Ensure Unique test removed 54 transitions
Reduce isomorphic transitions removed 54 transitions.
Iterating post reduction 0 with 54 rules applied. Total rules applied 162 place count 26 transition count 32
Applied a total of 162 rules in 3 ms. Remains 26 /80 variables (removed 54) and now considering 32/140 (removed 108) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 26/80 places, 32/140 transitions.
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 3 ms
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 4 ms
[2024-06-01 13:44:49] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 80/80 places, 140/140 transitions.
Graph (complete) has 100 edges and 80 vertex of which 50 are kept as prefixes of interest. Removing 30 places using SCC suffix rule.1 ms
Discarding 30 places :
Also discarding 52 output transitions
Drop transitions (Output transitions of discarded places.) removed 52 transitions
Discarding 38 places :
Symmetric choice reduction at 0 with 38 rule applications. Total rules 39 place count 12 transition count 50
Iterating global reduction 0 with 38 rules applied. Total rules applied 77 place count 12 transition count 50
Ensure Unique test removed 38 transitions
Reduce isomorphic transitions removed 38 transitions.
Iterating post reduction 0 with 38 rules applied. Total rules applied 115 place count 12 transition count 12
Applied a total of 115 rules in 5 ms. Remains 12 /80 variables (removed 68) and now considering 12/140 (removed 128) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 12/80 places, 12/140 transitions.
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 1 ms
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:44:49] [INFO ] Input system was already deterministic with 12 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 140/140 transitions.
Discarding 58 places :
Symmetric choice reduction at 0 with 58 rule applications. Total rules 58 place count 22 transition count 82
Iterating global reduction 0 with 58 rules applied. Total rules applied 116 place count 22 transition count 82
Ensure Unique test removed 58 transitions
Reduce isomorphic transitions removed 58 transitions.
Iterating post reduction 0 with 58 rules applied. Total rules applied 174 place count 22 transition count 24
Applied a total of 174 rules in 3 ms. Remains 22 /80 variables (removed 58) and now considering 24/140 (removed 116) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 22/80 places, 24/140 transitions.
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:44:49] [INFO ] Input system was already deterministic with 24 transitions.
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 16 ms
[2024-06-01 13:44:49] [INFO ] Flatten gal took : 16 ms
[2024-06-01 13:44:49] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 10 ms.
[2024-06-01 13:44:49] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 80 places, 140 transitions and 306 arcs took 8 ms.
Total runtime 10789 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=]
[--mu-opt] [--saturation=]
[--sat-granularity=] [--save-sat-levels]
[--guidance=] [-d|--deadlock]
[--action=] [-i|--invariant=STRING] [-n|--no-exit]
[--trace=] [--type=]
[--mu=.mu] [--ctl-star=.ctl]
[--ctl=.ctl] [--ltl=.ltl] [--dot=STRING]
[--save-levels=STRING] [--pg-solve] [--attr=]
[--saturating-attractor] [--write-strategy=.spg]
[--check-strategy] [--interactive-play] [--player]
[--pg-write=.spg] [--no-matrix] [--noack=<1|2>]
[--edge-label=] [--labels] [-m|--matrix]
[--mucalc=.mcf|] [-c|--cache]
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por= (default: heur)]
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=] [--sloan-w2=]
[--cw-max-cols=] [--cw-max-rows=] [--col-ins=<(C.C',)+>]
[--mh-timeout=] [--row-perm=<(R,)+>] [--col-perm=<(C,)+>]
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=] [--ldd32-step=]
[--ldd32-cache=] [--ldd-step=] [--ldd-cache=]
[--cache-ratio=] [--max-increase=]
[--min-free-nodes=] [--fdd-bits=]
[--fdd-reorder=]
[--vset-cache-diff=] [--no-soundness-check] [--precise]
[--next-union] [--peak-nodes] [--maxsum=]
[--block-size=] [--cluster-size=] [-v] [-q]
[--debug=] [--stats] [--where] [--when]
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS] []
Could not compute solution for formula : AirplaneLD-PT-0020-CTLFireability-2024-00
Could not compute solution for formula : AirplaneLD-PT-0020-CTLFireability-2024-01
Could not compute solution for formula : AirplaneLD-PT-0020-CTLFireability-2024-02
Could not compute solution for formula : AirplaneLD-PT-0020-CTLFireability-2024-03
Could not compute solution for formula : AirplaneLD-PT-0020-CTLFireability-2024-04
Could not compute solution for formula : AirplaneLD-PT-0020-CTLFireability-2024-06
Could not compute solution for formula : AirplaneLD-PT-0020-CTLFireability-2024-08
Could not compute solution for formula : AirplaneLD-PT-0020-CTLFireability-2024-09
Could not compute solution for formula : AirplaneLD-PT-0020-CTLFireability-2024-10
Could not compute solution for formula : AirplaneLD-PT-0020-CTLFireability-2024-11
Could not compute solution for formula : AirplaneLD-PT-0020-CTLFireability-2024-12
Could not compute solution for formula : AirplaneLD-PT-0020-CTLFireability-2024-14
Could not compute solution for formula : AirplaneLD-PT-0020-CTLFireability-2024-15

BK_STOP 1717249490661

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name AirplaneLD-PT-0020-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/518/ctl_0_
ctl formula name AirplaneLD-PT-0020-CTLFireability-2024-01
ctl formula formula --ctl=/tmp/518/ctl_1_
ctl formula name AirplaneLD-PT-0020-CTLFireability-2024-02
ctl formula formula --ctl=/tmp/518/ctl_2_
ctl formula name AirplaneLD-PT-0020-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/518/ctl_3_
ctl formula name AirplaneLD-PT-0020-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/518/ctl_4_
ctl formula name AirplaneLD-PT-0020-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/518/ctl_5_
ctl formula name AirplaneLD-PT-0020-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/518/ctl_6_
ctl formula name AirplaneLD-PT-0020-CTLFireability-2024-09
ctl formula formula --ctl=/tmp/518/ctl_7_
ctl formula name AirplaneLD-PT-0020-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/518/ctl_8_
ctl formula name AirplaneLD-PT-0020-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/518/ctl_9_
ctl formula name AirplaneLD-PT-0020-CTLFireability-2024-12
ctl formula formula --ctl=/tmp/518/ctl_10_
ctl formula name AirplaneLD-PT-0020-CTLFireability-2024-14
ctl formula formula --ctl=/tmp/518/ctl_11_
ctl formula name AirplaneLD-PT-0020-CTLFireability-2024-15
ctl formula formula --ctl=/tmp/518/ctl_12_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-PT-0020"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is AirplaneLD-PT-0020, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r464-smll-171620118100250"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-PT-0020.tgz
mv AirplaneLD-PT-0020 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;