About the Execution of LTSMin+red for AirplaneLD-COL-0050
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 280.451 | 8050.00 | 19438.00 | 151.10 | ?FT????T?T?????T | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r464-smll-171620118000186.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................
=====================================================================
Generated by BenchKit 2-5568
Executing tool ltsminxred
Input is AirplaneLD-COL-0050, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r464-smll-171620118000186
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 476K
-rw-r--r-- 1 mcc users 8.5K Apr 12 03:31 CTLCardinality.txt
-rw-r--r-- 1 mcc users 83K Apr 12 03:31 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Apr 12 03:28 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K Apr 12 03:28 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:42 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:42 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.2K Apr 22 14:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 22 14:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Apr 22 14:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 22 14:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.8K Apr 12 03:41 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 75K Apr 12 03:41 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.0K Apr 12 03:38 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K Apr 12 03:38 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 22 14:27 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 22 14:27 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:42 equiv_pt
-rw-r--r-- 1 mcc users 5 May 18 16:42 instance
-rw-r--r-- 1 mcc users 5 May 18 16:42 iscolored
-rw-r--r-- 1 mcc users 46K May 18 16:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-2024-00
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-2024-01
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-2024-02
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-2024-03
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-2024-04
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-2024-05
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-2024-06
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-2024-07
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-2024-08
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-2024-09
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-2024-10
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-2024-11
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-2024-12
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-2024-13
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-2024-14
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-2024-15
=== Now, execution of the tool begins
BK_START 1717248753024
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AirplaneLD-COL-0050
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202405141337
[2024-06-01 13:32:35] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-06-01 13:32:35] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-06-01 13:32:35] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2024-06-01 13:32:36] [WARNING] Using fallBack plugin, rng conformance not checked
[2024-06-01 13:32:37] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 1196 ms
[2024-06-01 13:32:37] [INFO ] Detected 3 constant HL places corresponding to 152 PT places.
[2024-06-01 13:32:37] [INFO ] Imported 20 HL places and 15 HL transitions for a total of 369 PT places and 612.0 transition bindings in 37 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 21 ms.
[2024-06-01 13:32:37] [INFO ] Built PT skeleton of HLPN with 20 places and 15 transitions 56 arcs in 6 ms.
[2024-06-01 13:32:37] [INFO ] Skeletonized 8 HLPN properties in 3 ms. Removed 8 properties that had guard overlaps.
Computed a total of 20 stabilizing places and 15 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 20 transition count 15
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 4 formulas.
FORMULA AirplaneLD-COL-0050-CTLFireability-2024-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-COL-0050-CTLFireability-2024-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-COL-0050-CTLFireability-2024-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Remains 2 properties that can be checked using skeleton over-approximation.
Reduce places removed 3 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
Computed a total of 17 stabilizing places and 14 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 17 transition count 14
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
RANDOM walk for 110 steps (11 resets) in 26 ms. (4 steps per ms) remains 0/2 properties
[2024-06-01 13:32:37] [INFO ] Flatten gal took : 23 ms
[2024-06-01 13:32:37] [INFO ] Flatten gal took : 6 ms
Symmetric sort wr.t. initial and guards and successors and join/free detected :Altitude
Symmetric sort wr.t. initial detected :Altitude
Transition t3_2 : guard parameter $A(Altitude:100) in guard (OR (GEQ $A 49) (EQ $A 99))introduces in Altitude(100) partition with 2 elements
Transition t3_1 : guard parameter $A(Altitude:100) in guard (AND (LT $A 49) (NEQ $A 99))introduces in Altitude(100) partition with 2 elements
Sort wr.t. initial and guards Altitude has partition 2
Applying symmetric unfolding of partitioned symmetric sort :Altitude domain size was 100 reducing to 2 values.
For transition t3_2:(OR (GEQ $A 49) (EQ $A 99)) -> (EQ $A 1)
For transition t3_1:(AND (LT $A 49) (NEQ $A 99)) -> (EQ $A 0)
Symmetric sort wr.t. initial and guards and successors and join/free detected :Speed
Symmetric sort wr.t. initial detected :Speed
Transition t5_2 : guard parameter $S(Speed:50) in guard (OR (LEQ $S 24) (EQ $S 49))introduces in Speed(50) partition with 2 elements
Transition t5_1 : guard parameter $S(Speed:50) in guard (AND (GT $S 24) (NEQ $S 49))introduces in Speed(50) partition with 2 elements
Transition t4_2 : guard parameter $S(Speed:50) in guard (OR (LEQ $S 24) (EQ $S 49))introduces in Speed(50) partition with 2 elements
Transition t4_1 : guard parameter $S(Speed:50) in guard (AND (GT $S 24) (NEQ $S 49))introduces in Speed(50) partition with 2 elements
Sort wr.t. initial and guards Speed has partition 2
Applying symmetric unfolding of partitioned symmetric sort :Speed domain size was 50 reducing to 2 values.
For transition t5_2:(OR (LEQ $S 24) (EQ $S 49)) -> (EQ $S 1)
For transition t5_1:(AND (GT $S 24) (NEQ $S 49)) -> (EQ $S 0)
For transition t4_2:(OR (LEQ $S 24) (EQ $S 49)) -> (EQ $S 1)
For transition t4_1:(AND (GT $S 24) (NEQ $S 49)) -> (EQ $S 0)
Symmetric sort wr.t. initial and guards and successors and join/free detected :Signal
Arc [19:1*[1]] contains constants of sort Signal
Transition t5_2 : constants on arcs in [[19:1*[1]]] introduces in Signal(2) partition with 1 elements that refines current partition to 2 subsets.
Symmetric sort wr.t. initial and guards and successors and join/free detected :Weight
Symmetric sort wr.t. initial detected :Weight
Transition t2_2 : guard parameter $W(Weight:2) in guard (EQ $W 1)introduces in Weight(2) partition with 2 elements
[2024-06-01 13:32:37] [INFO ] Unfolded HLPN to a Petri net with 29 places and 20 transitions 56 arcs in 70 ms.
[2024-06-01 13:32:37] [INFO ] Unfolded 13 HLPN properties in 0 ms.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
[2024-06-01 13:32:37] [INFO ] Reduced 1 identical enabling conditions.
Reduce places removed 6 places and 0 transitions.
Support contains 20 out of 23 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 23/23 places, 20/20 transitions.
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 20 transition count 20
Applied a total of 3 rules in 27 ms. Remains 20 /23 variables (removed 3) and now considering 20/20 (removed 0) transitions.
// Phase 1: matrix 20 rows 20 cols
[2024-06-01 13:32:37] [INFO ] Computed 1 invariants in 14 ms
[2024-06-01 13:32:37] [INFO ] Implicit Places using invariants in 222 ms returned []
[2024-06-01 13:32:37] [INFO ] Invariant cache hit.
[2024-06-01 13:32:37] [INFO ] Implicit Places using invariants and state equation in 84 ms returned []
Implicit Place search using SMT with State Equation took 356 ms to find 0 implicit places.
Running 10 sub problems to find dead transitions.
[2024-06-01 13:32:37] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/15 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 1 (OVERLAPS) 1/16 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/16 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 3 (OVERLAPS) 20/36 variables, 16/17 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/36 variables, 0/17 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 5 (OVERLAPS) 4/40 variables, 4/21 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/40 variables, 0/21 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 7 (OVERLAPS) 0/40 variables, 0/21 constraints. Problems are: Problem set: 0 solved, 10 unsolved
No progress, stopping.
After SMT solving in domain Real declared 40/40 variables, and 21 constraints, problems are : Problem set: 0 solved, 10 unsolved in 394 ms.
Refiners :[Generalized P Invariants (flows): 1/1 constraints, State Equation: 20/20 constraints, PredecessorRefiner: 10/10 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 10 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/15 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 1 (OVERLAPS) 1/16 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/16 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 3 (OVERLAPS) 20/36 variables, 16/17 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/36 variables, 10/27 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/36 variables, 0/27 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 6 (OVERLAPS) 4/40 variables, 4/31 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/40 variables, 0/31 constraints. Problems are: Problem set: 0 solved, 10 unsolved
At refinement iteration 8 (OVERLAPS) 0/40 variables, 0/31 constraints. Problems are: Problem set: 0 solved, 10 unsolved
No progress, stopping.
After SMT solving in domain Int declared 40/40 variables, and 31 constraints, problems are : Problem set: 0 solved, 10 unsolved in 380 ms.
Refiners :[Generalized P Invariants (flows): 1/1 constraints, State Equation: 20/20 constraints, PredecessorRefiner: 10/10 constraints, Known Traps: 0/0 constraints]
After SMT, in 822ms problems are : Problem set: 0 solved, 10 unsolved
Search for dead transitions found 0 dead transitions in 838ms
Starting structural reductions in LTL mode, iteration 1 : 20/23 places, 20/20 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1241 ms. Remains : 20/23 places, 20/20 transitions.
Support contains 20 out of 20 places after structural reductions.
[2024-06-01 13:32:38] [INFO ] Flatten gal took : 10 ms
[2024-06-01 13:32:38] [INFO ] Flatten gal took : 11 ms
[2024-06-01 13:32:38] [INFO ] Input system was already deterministic with 20 transitions.
Reduction of identical properties reduced properties to check from 32 to 29
RANDOM walk for 40000 steps (5031 resets) in 2428 ms. (16 steps per ms) remains 6/29 properties
BEST_FIRST walk for 40004 steps (934 resets) in 526 ms. (75 steps per ms) remains 6/6 properties
BEST_FIRST walk for 40003 steps (958 resets) in 257 ms. (155 steps per ms) remains 6/6 properties
BEST_FIRST walk for 40002 steps (890 resets) in 267 ms. (149 steps per ms) remains 6/6 properties
BEST_FIRST walk for 40004 steps (1049 resets) in 358 ms. (111 steps per ms) remains 6/6 properties
BEST_FIRST walk for 40003 steps (976 resets) in 89 ms. (444 steps per ms) remains 6/6 properties
BEST_FIRST walk for 40002 steps (990 resets) in 203 ms. (196 steps per ms) remains 6/6 properties
[2024-06-01 13:32:40] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/16 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/16 variables, 0/1 constraints. Problems are: Problem set: 0 solved, 6 unsolved
Problem AtomicPropp6 is UNSAT
Problem AtomicPropp9 is UNSAT
Problem AtomicPropp10 is UNSAT
Problem AtomicPropp24 is UNSAT
Problem AtomicPropp26 is UNSAT
Problem AtomicPropp31 is UNSAT
After SMT solving in domain Real declared 35/40 variables, and 17 constraints, problems are : Problem set: 6 solved, 0 unsolved in 66 ms.
Refiners :[Generalized P Invariants (flows): 1/1 constraints, State Equation: 16/20 constraints, PredecessorRefiner: 6/6 constraints, Known Traps: 0/0 constraints]
After SMT, in 92ms problems are : Problem set: 6 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 6 atomic propositions for a total of 13 simplifications.
FORMULA AirplaneLD-COL-0050-CTLFireability-2024-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 4 ms
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 5 ms
[2024-06-01 13:32:40] [INFO ] Input system was already deterministic with 20 transitions.
Computed a total of 20 stabilizing places and 20 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 20 transition count 20
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 1 formulas.
Starting structural reductions in SI_CTL mode, iteration 0 : 20/20 places, 20/20 transitions.
Graph (complete) has 18 edges and 20 vertex of which 12 are kept as prefixes of interest. Removing 8 places using SCC suffix rule.0 ms
Discarding 8 places :
Also discarding 8 output transitions
Drop transitions (Output transitions of discarded places.) removed 8 transitions
Applied a total of 1 rules in 13 ms. Remains 12 /20 variables (removed 8) and now considering 12/20 (removed 8) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 12/20 places, 12/20 transitions.
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:32:40] [INFO ] Input system was already deterministic with 12 transitions.
Starting structural reductions in LTL mode, iteration 0 : 20/20 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 20 /20 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 20/20 places, 20/20 transitions.
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 3 ms
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:32:40] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 20/20 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 20 /20 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 20/20 places, 20/20 transitions.
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:32:40] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 20/20 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 20 /20 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 20/20 places, 20/20 transitions.
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 3 ms
[2024-06-01 13:32:40] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 20/20 places, 20/20 transitions.
Graph (complete) has 18 edges and 20 vertex of which 8 are kept as prefixes of interest. Removing 12 places using SCC suffix rule.0 ms
Discarding 12 places :
Also discarding 12 output transitions
Drop transitions (Output transitions of discarded places.) removed 12 transitions
Applied a total of 1 rules in 1 ms. Remains 8 /20 variables (removed 12) and now considering 8/20 (removed 12) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 8/20 places, 8/20 transitions.
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 1 ms
[2024-06-01 13:32:40] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 20/20 places, 20/20 transitions.
Graph (complete) has 18 edges and 20 vertex of which 8 are kept as prefixes of interest. Removing 12 places using SCC suffix rule.0 ms
Discarding 12 places :
Also discarding 12 output transitions
Drop transitions (Output transitions of discarded places.) removed 12 transitions
Applied a total of 1 rules in 2 ms. Remains 8 /20 variables (removed 12) and now considering 8/20 (removed 12) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 8/20 places, 8/20 transitions.
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 1 ms
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 1 ms
[2024-06-01 13:32:40] [INFO ] Input system was already deterministic with 8 transitions.
RANDOM walk for 112 steps (23 resets) in 4 ms. (22 steps per ms) remains 0/1 properties
FORMULA AirplaneLD-COL-0050-CTLFireability-2024-07 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 20/20 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 20 /20 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 20/20 places, 20/20 transitions.
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:32:40] [INFO ] Input system was already deterministic with 20 transitions.
Support contains 0 out of 20 places (down from 7) after GAL structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 20/20 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 20 /20 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 20/20 places, 20/20 transitions.
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 3 ms
[2024-06-01 13:32:40] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 20/20 places, 20/20 transitions.
Applied a total of 0 rules in 2 ms. Remains 20 /20 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 20/20 places, 20/20 transitions.
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:32:40] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 20/20 places, 20/20 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 19 transition count 19
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 19 transition count 19
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 19 transition count 18
Applied a total of 3 rules in 7 ms. Remains 19 /20 variables (removed 1) and now considering 18/20 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 19/20 places, 18/20 transitions.
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:32:40] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 20/20 places, 20/20 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 19 transition count 19
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 19 transition count 19
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 19 transition count 18
Applied a total of 3 rules in 1 ms. Remains 19 /20 variables (removed 1) and now considering 18/20 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 19/20 places, 18/20 transitions.
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 1 ms
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:32:40] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 20/20 places, 20/20 transitions.
Graph (complete) has 18 edges and 20 vertex of which 8 are kept as prefixes of interest. Removing 12 places using SCC suffix rule.0 ms
Discarding 12 places :
Also discarding 12 output transitions
Drop transitions (Output transitions of discarded places.) removed 12 transitions
Applied a total of 1 rules in 1 ms. Remains 8 /20 variables (removed 12) and now considering 8/20 (removed 12) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 8/20 places, 8/20 transitions.
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 1 ms
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 1 ms
[2024-06-01 13:32:40] [INFO ] Input system was already deterministic with 8 transitions.
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 3 ms
[2024-06-01 13:32:40] [INFO ] Flatten gal took : 2 ms
[2024-06-01 13:32:40] [INFO ] Export to MCC of 11 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2024-06-01 13:32:40] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 20 places, 20 transitions and 44 arcs took 2 ms.
Total runtime 5127 ms.
There are residual formulas that ITS could not solve within timeout
Usage: pnml2lts-sym [-gvqh] [--order=
[--mu-opt] [--saturation=
[--sat-granularity=
[--guidance=
[--action=
[--trace=
[--mu=
[--ctl=
[--save-levels=STRING] [--pg-solve] [--attr=
[--saturating-attractor] [--write-strategy=
[--check-strategy] [--interactive-play] [--player]
[--pg-write=
[--edge-label=
[--mucalc=
[--allow-undefined-edges] [--allow-undefined-values]
[-p|--por=
[--weak=[valmari] (default: uses stronger left-commutativity)]
[--leap] [-r|--regroup=<(T,)+>] [--sloan-w1=
[--cw-max-cols=
[--mh-timeout=
[--graph-metrics] [--regroup-exit] [--regroup-time]
[-g|--pins-guards] [--vset=
[--ldd32-cache=
[--cache-ratio=
[--min-free-nodes=
[--fdd-reorder=
[--vset-cache-diff=
[--next-union] [--peak-nodes] [--maxsum=
[--block-size=
[--debug=
[--timeout=INT] [--version] [-h|--help] [--usage]
[OPTIONS]
Could not compute solution for formula : AirplaneLD-COL-0050-CTLFireability-2024-00
Could not compute solution for formula : AirplaneLD-COL-0050-CTLFireability-2024-03
Could not compute solution for formula : AirplaneLD-COL-0050-CTLFireability-2024-04
Could not compute solution for formula : AirplaneLD-COL-0050-CTLFireability-2024-05
Could not compute solution for formula : AirplaneLD-COL-0050-CTLFireability-2024-06
Could not compute solution for formula : AirplaneLD-COL-0050-CTLFireability-2024-08
Could not compute solution for formula : AirplaneLD-COL-0050-CTLFireability-2024-10
Could not compute solution for formula : AirplaneLD-COL-0050-CTLFireability-2024-11
Could not compute solution for formula : AirplaneLD-COL-0050-CTLFireability-2024-12
Could not compute solution for formula : AirplaneLD-COL-0050-CTLFireability-2024-13
Could not compute solution for formula : AirplaneLD-COL-0050-CTLFireability-2024-14
BK_STOP 1717248761074
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2024
ctl formula name AirplaneLD-COL-0050-CTLFireability-2024-00
ctl formula formula --ctl=/tmp/512/ctl_0_
ctl formula name AirplaneLD-COL-0050-CTLFireability-2024-03
ctl formula formula --ctl=/tmp/512/ctl_1_
ctl formula name AirplaneLD-COL-0050-CTLFireability-2024-04
ctl formula formula --ctl=/tmp/512/ctl_2_
ctl formula name AirplaneLD-COL-0050-CTLFireability-2024-05
ctl formula formula --ctl=/tmp/512/ctl_3_
ctl formula name AirplaneLD-COL-0050-CTLFireability-2024-06
ctl formula formula --ctl=/tmp/512/ctl_4_
ctl formula name AirplaneLD-COL-0050-CTLFireability-2024-08
ctl formula formula --ctl=/tmp/512/ctl_5_
ctl formula name AirplaneLD-COL-0050-CTLFireability-2024-10
ctl formula formula --ctl=/tmp/512/ctl_6_
ctl formula name AirplaneLD-COL-0050-CTLFireability-2024-11
ctl formula formula --ctl=/tmp/512/ctl_7_
ctl formula name AirplaneLD-COL-0050-CTLFireability-2024-12
ctl formula formula --ctl=/tmp/512/ctl_8_
ctl formula name AirplaneLD-COL-0050-CTLFireability-2024-13
ctl formula formula --ctl=/tmp/512/ctl_9_
ctl formula name AirplaneLD-COL-0050-CTLFireability-2024-14
ctl formula formula --ctl=/tmp/512/ctl_10_
pnml2lts-sym, ** error **: unknown vector set implementation lddmc
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-COL-0050"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool ltsminxred"
echo " Input is AirplaneLD-COL-0050, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r464-smll-171620118000186"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-COL-0050.tgz
mv AirplaneLD-COL-0050 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;