About the Execution of 2023-gold for UtilityControlRoom-PT-Z4T4N06
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 451.523 | 30252.00 | 103717.00 | 321.20 | TFTFFTTTFFFFFTFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r461-smll-171701123000164.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool gold2023
Input is UtilityControlRoom-PT-Z4T4N06, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r461-smll-171701123000164
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.3M
-rw-r--r-- 1 mcc users 34K Apr 13 05:25 CTLCardinality.txt
-rw-r--r-- 1 mcc users 173K Apr 13 05:25 CTLCardinality.xml
-rw-r--r-- 1 mcc users 73K Apr 13 05:21 CTLFireability.txt
-rw-r--r-- 1 mcc users 292K Apr 13 05:21 CTLFireability.xml
-rw-r--r-- 1 mcc users 26K Apr 23 08:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 87K Apr 23 08:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 21K Apr 23 08:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 64K Apr 23 08:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 84K Apr 13 05:41 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 433K Apr 13 05:41 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 170K Apr 13 05:37 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 636K Apr 13 05:37 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 4.1K Apr 23 08:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 8.8K Apr 23 08:04 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 8 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 191K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-00
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-01
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-02
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-03
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-04
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-05
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-06
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-07
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-08
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-09
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-10
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-11
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-12
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-13
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-14
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-15
=== Now, execution of the tool begins
BK_START 1717192527213
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=gold2023
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-PT-Z4T4N06
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2024-05-31 21:55:29] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2024-05-31 21:55:29] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-31 21:55:29] [INFO ] Load time of PNML (sax parser for PT used): 103 ms
[2024-05-31 21:55:29] [INFO ] Transformed 228 places.
[2024-05-31 21:55:29] [INFO ] Transformed 450 transitions.
[2024-05-31 21:55:29] [INFO ] Parsed PT model containing 228 places and 450 transitions and 1446 arcs in 201 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 48 ms.
Working with output stream class java.io.PrintStream
Ensure Unique test removed 96 transitions
Reduce redundant transitions removed 96 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 780 ms. (steps per millisecond=12 ) properties (out of 16) seen :2
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-14 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-13 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 50 ms. (steps per millisecond=200 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 182 ms. (steps per millisecond=54 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 226 ms. (steps per millisecond=44 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 68 ms. (steps per millisecond=147 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 36 ms. (steps per millisecond=277 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 41 ms. (steps per millisecond=243 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 367 ms. (steps per millisecond=27 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 59 ms. (steps per millisecond=169 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 76 ms. (steps per millisecond=131 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 83 ms. (steps per millisecond=120 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 59 ms. (steps per millisecond=169 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 80 ms. (steps per millisecond=125 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 84 ms. (steps per millisecond=119 ) properties (out of 14) seen :0
Running SMT prover for 14 properties.
// Phase 1: matrix 354 rows 228 cols
[2024-05-31 21:55:32] [INFO ] Computed 15 invariants in 17 ms
[2024-05-31 21:55:33] [INFO ] [Real]Absence check using 15 positive place invariants in 12 ms returned sat
[2024-05-31 21:55:33] [INFO ] After 495ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:13
[2024-05-31 21:55:33] [INFO ] [Nat]Absence check using 15 positive place invariants in 8 ms returned sat
[2024-05-31 21:55:33] [INFO ] After 324ms SMT Verify possible using all constraints in natural domain returned unsat :14 sat :0
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-15 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-12 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-11 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-10 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-09 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-08 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-07 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-06 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-05 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-04 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-03 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-02 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-01 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-00 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 14 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 4093 ms.
starting LoLA
BK_INPUT UtilityControlRoom-PT-Z4T4N06
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717192557465
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 50 (type SKEL/FNDP) for 0 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type SKEL/EQUN) for 0 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type SKEL/SRCH) for 0 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 54 (type SKEL/SRCH) for 0 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 53 (type SKEL/SRCH) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-00
lola: result : false
lola: markings : 1498
lola: fired transitions : 3907
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 50 (type FNDP) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-00 (obsolete)
lola: CANCELED task # 51 (type EQUN) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-00 (obsolete)
lola: CANCELED task # 54 (type SRCH) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-00 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 50 (type SKEL/FNDP) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-00
lola: result : unknown
lola: fired transitions : 352
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 57 (type SKEL/FNDP) for 3 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SKEL/EQUN) for 3 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type SKEL/SRCH) for 3 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 61 (type SKEL/SRCH) for 3 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 51 (type SKEL/EQUN) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-00
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Rule S: 0 transitions removed,0 places removed
lola: FINISHED task # 60 (type SKEL/SRCH) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-01
lola: result : false
lola: markings : 3139
lola: fired transitions : 12535
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 57 (type FNDP) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-01 (obsolete)
lola: CANCELED task # 58 (type EQUN) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-01 (obsolete)
lola: CANCELED task # 61 (type SRCH) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-01 (obsolete)
lola: LAUNCH task # 65 (type SKEL/FNDP) for 6 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type SKEL/EQUN) for 6 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 68 (type SKEL/SRCH) for 6 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type SKEL/SRCH) for 6 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 57 (type SKEL/FNDP) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-01
lola: result : unknown
lola: fired transitions : 51
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 68 (type SKEL/SRCH) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-02
lola: result : false
lola: markings : 229
lola: fired transitions : 477
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 65 (type FNDP) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-02 (obsolete)
lola: CANCELED task # 66 (type EQUN) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-02 (obsolete)
lola: CANCELED task # 69 (type SRCH) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-02 (obsolete)
lola: LAUNCH task # 72 (type SKEL/FNDP) for 12 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 73 (type SKEL/EQUN) for 12 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 75 (type SKEL/SRCH) for 12 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 76 (type SKEL/SRCH) for 12 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 76 (type SKEL/SRCH) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-04
lola: result : false
lola: markings : 83
lola: fired transitions : 122
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: time used : 0.000000
lola: memory pages used : 1
lola: planning for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-02 stopped (result already fixed).
lola: planning for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-00 stopped (result already fixed).
lola: CANCELED task # 72 (type FNDP) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-04 (obsolete)
lola: CANCELED task # 73 (type EQUN) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-04 (obsolete)
lola: CANCELED task # 75 (type SRCH) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-04 (obsolete)
lola: LAUNCH task # 80 (type SKEL/FNDP) for 15 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 81 (type SKEL/EQUN) for 15 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 83 (type SKEL/SRCH) for 15 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 84 (type SKEL/SRCH) for 15 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 83 (type SKEL/SRCH) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-05
lola: result : false
lola: markings : 188
lola: fired transitions : 274
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 80 (type FNDP) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-05 (obsolete)
lola: CANCELED task # 81 (type EQUN) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-05 (obsolete)
lola: CANCELED task # 84 (type SRCH) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-05 (obsolete)
lola: FINISHED task # 75 (type SKEL/SRCH) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-04
lola: result : false
lola: markings : 1138
lola: fired transitions : 2987
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: planning for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-01 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 88 (type SKEL/FNDP) for 18 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 89 (type SKEL/EQUN) for 18 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 91 (type SKEL/SRCH) for 18 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 92 (type SKEL/SRCH) for 18 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-58.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-66.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-81.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-73.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 91 (type SKEL/SRCH) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-06
lola: result : false
lola: markings : 4658
lola: fired transitions : 15519
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 88 (type FNDP) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-06 (obsolete)
lola: CANCELED task # 89 (type EQUN) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-06 (obsolete)
lola: CANCELED task # 92 (type SRCH) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-06 (obsolete)
lola: LAUNCH task # 95 (type SKEL/FNDP) for 9 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 96 (type SKEL/EQUN) for 9 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 98 (type SKEL/SRCH) for 9 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 99 (type SKEL/SRCH) for 9 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 88 (type SKEL/FNDP) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-06
lola: result : unknown
lola: fired transitions : 4397
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 98 (type SKEL/SRCH) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-03
lola: result : false
lola: markings : 363
lola: fired transitions : 563
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 95 (type FNDP) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-03 (obsolete)
lola: CANCELED task # 96 (type EQUN) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-03 (obsolete)
lola: CANCELED task # 99 (type SRCH) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-03 (obsolete)
lola: FINISHED task # 95 (type SKEL/FNDP) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-03
lola: result : unknown
lola: fired transitions : 7204
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 73 (type SKEL/EQUN) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-04
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: planning for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-06 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 103 (type SKEL/FNDP) for 21 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 104 (type SKEL/EQUN) for 21 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 106 (type SKEL/SRCH) for 21 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 107 (type SKEL/SRCH) for 21 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 81 (type SKEL/EQUN) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-05
lola: result : false
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-96.sara.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 66 (type SKEL/EQUN) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-02
lola: result : false
lola: FINISHED task # 107 (type SKEL/SRCH) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-07
lola: result : false
lola: markings : 1307
lola: fired transitions : 3094
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 103 (type FNDP) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-07 (obsolete)
lola: CANCELED task # 104 (type EQUN) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-07 (obsolete)
lola: CANCELED task # 106 (type SRCH) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-07 (obsolete)
lola: LAUNCH task # 110 (type SKEL/FNDP) for 33 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 111 (type SKEL/EQUN) for 33 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-11
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 113 (type SKEL/SRCH) for 33 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 114 (type SKEL/SRCH) for 33 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-104.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 96 (type SKEL/EQUN) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-03
lola: result : false
lola: planning for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-03 stopped (result already fixed).
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-111.sara.
sara: place or transition ordering is non-deterministic
lola: planning for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-05 stopped (result already fixed).
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 104 (type SKEL/EQUN) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-07
lola: result : false
lola: FINISHED task # 111 (type SKEL/EQUN) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-11
lola: result : false
lola: planning for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-04 stopped (result already fixed).
lola: CANCELED task # 110 (type FNDP) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-11 (obsolete)
lola: CANCELED task # 113 (type SRCH) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-11 (obsolete)
lola: CANCELED task # 114 (type SRCH) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-11 (obsolete)
lola: FINISHED task # 110 (type SKEL/FNDP) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-11
lola: result : unknown
lola: fired transitions : 6160
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 126 (type EXCL) for 30 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-10
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 122 (type FNDP) for 30 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 123 (type EQUN) for 30 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 125 (type SRCH) for 30 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-123.sara.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 58 (type SKEL/EQUN) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-01
lola: result : false
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-89.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 89 (type SKEL/EQUN) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-06
lola: result : false
lola: FINISHED task # 123 (type EQUN) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-10
lola: result : false
lola: CANCELED task # 122 (type FNDP) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-10 (obsolete)
lola: CANCELED task # 125 (type SRCH) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-10 (obsolete)
lola: CANCELED task # 126 (type EXCL) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-10 (obsolete)
lola: LAUNCH task # 164 (type EXCL) for 24 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-08
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 154 (type FNDP) for 27 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 155 (type EQUN) for 27 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 157 (type SRCH) for 27 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 122 (type FNDP) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-10
lola: result : unknown
lola: fired transitions : 107348
lola: tried executions : 2
lola: time used : 2.000000
lola: memory pages used : 0
lola: FINISHED task # 164 (type EXCL) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-08
lola: result : false
lola: markings : 55
lola: fired transitions : 280
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 152 (type EXCL) for 42 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-14
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-155.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-00: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-01: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-02: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-03: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-04: EF false skeleton: tandem / relaxed
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-05: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-06: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-07: AG true skeleton: tandem / relaxed
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-08: EF false tandem / relaxed
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-10: EF false state equation
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-11: EF false skeleton: state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-09: EF 0 2 3 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-12: EF 0 5 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-13: EF 0 5 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-14: AG 0 4 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-15: EF 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
152 EF EXCL 3/719 1/32 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-14 27748 m, 5549 m/sec, 39445 t fired, .
154 EF FNDP 3/513 0/5 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-09 101933 t fired, 1 attempts, .
155 EF STEQ 3/513 0/5 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-09 sara is running.
157 EF SRCH 3/599 1/5 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-09 120918 m, 24183 m/sec, 162740 t fired, .
Time elapsed: 6 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-00: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-01: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-02: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-03: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-04: EF false skeleton: tandem / relaxed
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-05: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-06: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-07: AG true skeleton: tandem / relaxed
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-08: EF false tandem / relaxed
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-10: EF false state equation
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-11: EF false skeleton: state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-09: EF 0 2 3 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-12: EF 0 5 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-13: EF 0 5 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-14: AG 0 4 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-15: EF 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
152 EF EXCL 8/719 1/32 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-14 83726 m, 11195 m/sec, 127614 t fired, .
154 EF FNDP 8/510 0/5 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-09 322489 t fired, 1 attempts, .
155 EF STEQ 8/510 0/5 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-09 sara is running.
157 EF SRCH 8/596 2/5 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-09 361401 m, 48096 m/sec, 501926 t fired, .
Time elapsed: 11 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-00: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-01: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-02: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-03: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-04: EF false skeleton: tandem / relaxed
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-05: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-06: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-07: AG true skeleton: tandem / relaxed
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-08: EF false tandem / relaxed
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-10: EF false state equation
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-11: EF false skeleton: state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-09: EF 0 2 3 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-12: EF 0 5 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-13: EF 0 5 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-14: AG 0 4 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-15: EF 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
152 EF EXCL 13/719 1/32 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-14 137790 m, 10812 m/sec, 216728 t fired, .
154 EF FNDP 13/505 0/5 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-09 518969 t fired, 1 attempts, .
155 EF STEQ 13/505 0/5 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-09 sara is running.
157 EF SRCH 13/591 3/5 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-09 579038 m, 43527 m/sec, 817898 t fired, .
Time elapsed: 16 secs. Pages in use: 4
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 155 (type EQUN) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-09
lola: result : false
lola: CANCELED task # 154 (type FNDP) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-09 (obsolete)
lola: CANCELED task # 157 (type SRCH) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-09 (obsolete)
lola: LAUNCH task # 166 (type FNDP) for 36 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 167 (type EQUN) for 36 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 169 (type SRCH) for 36 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 154 (type FNDP) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-09
lola: result : unknown
lola: fired transitions : 666486
lola: tried executions : 2
lola: time used : 16.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-167.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-00: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-01: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-02: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-03: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-04: EF false skeleton: tandem / relaxed
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-05: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-06: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-07: AG true skeleton: tandem / relaxed
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-08: EF false tandem / relaxed
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-09: EF false state equation
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-10: EF false state equation
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-11: EF false skeleton: state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-12: EF 0 2 3 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-13: EF 0 5 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-14: AG 0 4 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-15: EF 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
152 EF EXCL 18/899 1/32 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-14 194257 m, 11293 m/sec, 313362 t fired, .
166 EF FNDP 2/596 0/5 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-12 49462 t fired, 1 attempts, .
167 EF STEQ 2/716 0/5 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-12 sara is running.
169 EF SRCH 2/716 1/5 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-12 53067 m, 10613 m/sec, 78002 t fired, .
Time elapsed: 21 secs. Pages in use: 4
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 167 (type EQUN) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-12
lola: result : false
lola: CANCELED task # 166 (type FNDP) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-12 (obsolete)
lola: CANCELED task # 169 (type SRCH) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-12 (obsolete)
lola: LAUNCH task # 134 (type FNDP) for 39 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 136 (type EQUN) for 39 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 144 (type SRCH) for 39 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 166 (type FNDP) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-12
lola: result : unknown
lola: fired transitions : 133748
lola: tried executions : 2
lola: time used : 3.000000
lola: memory pages used : 0
lola: FINISHED task # 134 (type FNDP) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-13
lola: result : true
lola: fired transitions : 5
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 136 (type EQUN) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-13 (obsolete)
lola: CANCELED task # 144 (type SRCH) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-13 (obsolete)
lola: LAUNCH task # 130 (type FNDP) for 45 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 133 (type EQUN) for 45 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 141 (type SRCH) for 45 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-133.sara.
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-136.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 133 (type EQUN) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-15
lola: result : false
lola: CANCELED task # 130 (type FNDP) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-15 (obsolete)
lola: CANCELED task # 141 (type SRCH) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-15 (obsolete)
lola: LAUNCH task # 148 (type FNDP) for 42 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 149 (type EQUN) for 42 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 151 (type SRCH) for 42 UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 130 (type FNDP) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-15
lola: result : unknown
lola: fired transitions : 22870
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
lola: FINISHED task # 151 (type SRCH) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-14
lola: result : true
lola: markings : 13
lola: fired transitions : 13
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 148 (type FNDP) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-14 (obsolete)
lola: CANCELED task # 149 (type EQUN) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-14 (obsolete)
lola: CANCELED task # 152 (type EXCL) for UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-14 (obsolete)
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-00: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-01: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-02: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-03: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-04: EF false skeleton: tandem / relaxed
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-05: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-06: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-07: AG true skeleton: tandem / relaxed
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-08: EF false tandem / relaxed
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-09: EF false state equation
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-10: EF false state equation
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-11: EF false skeleton: state equation
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-12: EF false state equation
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-13: EF true findpath
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-14: AG false tandem / insertion
UtilityControlRoom-PT-Z4T4N06-ReachabilityCardinality-2024-15: EF false state equation
Time elapsed: 23 secs. Pages in use: 4
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-PT-Z4T4N06"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="gold2023"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool gold2023"
echo " Input is UtilityControlRoom-PT-Z4T4N06, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r461-smll-171701123000164"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-PT-Z4T4N06.tgz
mv UtilityControlRoom-PT-Z4T4N06 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;