Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r445-smll-171701112200267.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is UtilityControlRoom-PT-Z4T4N08, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r445-smll-171701112200267
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.3M
-rw-r--r-- 1 mcc users 52K Apr 13 05:52 CTLCardinality.txt
-rw-r--r-- 1 mcc users 251K Apr 13 05:52 CTLCardinality.xml
-rw-r--r-- 1 mcc users 74K Apr 13 05:48 CTLFireability.txt
-rw-r--r-- 1 mcc users 279K Apr 13 05:48 CTLFireability.xml
-rw-r--r-- 1 mcc users 14K Apr 23 08:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 49K Apr 23 08:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 28K Apr 23 08:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 81K Apr 23 08:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 43K Apr 13 06:06 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 214K Apr 13 06:06 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 196K Apr 13 06:03 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 758K Apr 13 06:03 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 7.5K Apr 23 08:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 17K Apr 23 08:04 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 8 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 255K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-LTLCardinality-00
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-LTLCardinality-01
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-LTLCardinality-02
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-LTLCardinality-03
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-LTLCardinality-04
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-LTLCardinality-05
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-LTLCardinality-06
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-LTLCardinality-07
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-LTLCardinality-08
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-LTLCardinality-09
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-LTLCardinality-10
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-LTLCardinality-11
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-LTLCardinality-12
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-LTLCardinality-13
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-LTLCardinality-14
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1717128149891

FORMULA UtilityControlRoom-PT-Z4T4N08-LTLCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N08-LTLCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N08-LTLCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N08-LTLCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N08-LTLCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N08-LTLCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N08-LTLCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N08-LTLCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N08-LTLCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N08-LTLCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N08-LTLCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N08-LTLCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N08-LTLCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N08-LTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N08-LTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T4N08-LTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[lola] FINAL RESULTS
[lola]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-00: LTL false LTL model checker
[lola] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-01: LTL false LTL model checker
[lola] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-02: CONJ false preprocessing
[lola] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-03: LTL false LTL model checker
[lola] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-04: LTL false LTL model checker
[lola] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-05: LTL false LTL model checker
[lola] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-06: LTL false LTL model checker
[lola] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-07: LTL false LTL model checker
[lola] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-08: LTL false LTL model checker
[lola] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-09: INITIAL true preprocessing
[lola] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-10: LTL false LTL model checker
[lola] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-11: INITIAL false preprocessing
[lola] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-12: LTL false LTL model checker
[lola] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-13: INITIAL false preprocessing
[lola] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-14: LTL true skeleton: LTL model checker
[lola] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-15: INITIAL false preprocessing
[lola]
[lola] Time elapsed: 70 secs. Pages in use: 59

BK_STOP 1717128220352

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from LTLCardinality.xml
[lola][I] NOTDEADLOCKFREE
[lola][I] NOTDEADLOCKFREE
[lola][I] NOTDEADLOCKFREE
[lola][I] Rule S: 0 transitions removed,0 places removed
[lola][I] NOTDEADLOCKFREE
[lola][I] NOTDEADLOCKFREE
[lola][I] NOTDEADLOCKFREE
[lola][I] LAUNCH task # 60 (type SKEL/SRCH) for 21 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-03
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 60 (type SKEL/SRCH) for UtilityControlRoom-PT-Z4T4N08-LTLCardinality-03
[lola][I] result : false
[lola][I] markings : 79
[lola][I] fired transitions : 110
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] NOTDEADLOCKFREE
[lola][I] LAUNCH task # 46 (type CNST) for 45 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-11
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 46 (type CNST) for UtilityControlRoom-PT-Z4T4N08-LTLCardinality-11
[lola][I] result : false
[lola][I] LAUNCH task # 40 (type CNST) for 39 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-09
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 40 (type CNST) for UtilityControlRoom-PT-Z4T4N08-LTLCardinality-09
[lola][I] result : true
[lola][I] LAUNCH task # 1 (type EXCL) for 0 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-00
[lola][I] time limit : 133 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 1 (type EXCL) for UtilityControlRoom-PT-Z4T4N08-LTLCardinality-00
[lola][I] result : false
[lola][I] markings : 714
[lola][I] fired transitions : 1126
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 62 (type EXCL) for 6 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-02
[lola][I] time limit : 138 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 65 (type EQUN) for 6 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-02
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 58 (type CNST) for 57 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-15
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] LAUNCH task # 9 (type CNST) for 6 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-02
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 58 (type CNST) for UtilityControlRoom-PT-Z4T4N08-LTLCardinality-15
[lola][I] result : false
[lola][I] NOTDEADLOCKFREE
[lola][I] FINISHED task # 9 (type CNST) for UtilityControlRoom-PT-Z4T4N08-LTLCardinality-02
[lola][I] result : false
[lola][W] CANCELED task # 62 (type EXCL) for UtilityControlRoom-PT-Z4T4N08-LTLCardinality-02 (obsolete)
[lola][W] CANCELED task # 65 (type EQUN) for UtilityControlRoom-PT-Z4T4N08-LTLCardinality-02 (obsolete)
[lola][I] LAUNCH task # 66 (type SKEL/SRCH) for 33 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-07
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 66 (type SKEL/SRCH) for UtilityControlRoom-PT-Z4T4N08-LTLCardinality-07
[lola][I] result : false
[lola][I] markings : 23
[lola][I] fired transitions : 23
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] NOTDEADLOCKFREE
[lola][I] NOTDEADLOCKFREE
[lola][I] LAUNCH task # 52 (type CNST) for 51 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-13
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 52 (type CNST) for UtilityControlRoom-PT-Z4T4N08-LTLCardinality-13
[lola][I] result : false
[lola][I] LAUNCH task # 22 (type EXCL) for 21 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-03
[lola][I] time limit : 276 sec
[lola][I] memory limit: 2000 pages
[lola][I] NOTDEADLOCKFREE
[lola][I] LAUNCH task # 72 (type SKEL/SRCH) for 54 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-14
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 72 (type SKEL/SRCH) for UtilityControlRoom-PT-Z4T4N08-LTLCardinality-14
[lola][I] result : true
[lola][I] markings : 3
[lola][I] fired transitions : 2
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] NOTDEADLOCKFREE
[lola][I] NOTDEADLOCKFREE
[lola][I] FINISHED task # 65 (type EQUN) for UtilityControlRoom-PT-Z4T4N08-LTLCardinality-02
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-00: LTL false LTL model checker
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-02: CONJ false preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-09: INITIAL true preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-11: INITIAL false preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-13: INITIAL false preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-14: LTL true skeleton: LTL model checker
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-15: INITIAL false preprocessing
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[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
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[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 22 LTL EXCL 4/399 6/2000 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-03 583660 m, 116732 m/sec, 1443780 t fired, .
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[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-00: LTL false LTL model checker
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-02: CONJ false preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-09: INITIAL true preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-11: INITIAL false preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-13: INITIAL false preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-14: LTL true skeleton: LTL model checker
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-15: INITIAL false preprocessing
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[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
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[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 22 LTL EXCL 9/399 11/2000 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-03 1158002 m, 114868 m/sec, 2949787 t fired, .
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[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-00: LTL false LTL model checker
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-02: CONJ false preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-09: INITIAL true preprocessing
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[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-14: LTL true skeleton: LTL model checker
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-15: INITIAL false preprocessing
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 22 LTL EXCL 14/399 16/2000 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-03 1690914 m, 106582 m/sec, 4431857 t fired, .
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[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-00: LTL false LTL model checker
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-02: CONJ false preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-09: INITIAL true preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-11: INITIAL false preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-13: INITIAL false preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-14: LTL true skeleton: LTL model checker
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-15: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 22 LTL EXCL 19/399 20/2000 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-03 2228204 m, 107458 m/sec, 5870861 t fired, .
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[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-02: CONJ false preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-09: INITIAL true preprocessing
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[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-14: LTL true skeleton: LTL model checker
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-15: INITIAL false preprocessing
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 22 LTL EXCL 24/399 25/2000 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-03 2726822 m, 99723 m/sec, 7299812 t fired, .
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[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-00: LTL false LTL model checker
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[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-09: INITIAL true preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-11: INITIAL false preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-13: INITIAL false preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-14: LTL true skeleton: LTL model checker
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-15: INITIAL false preprocessing
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 22 LTL EXCL 29/399 29/2000 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-03 3214729 m, 97581 m/sec, 8695523 t fired, .
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[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-00: LTL false LTL model checker
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[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-09: INITIAL true preprocessing
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[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-14: LTL true skeleton: LTL model checker
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-15: INITIAL false preprocessing
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 22 LTL EXCL 34/399 33/2000 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-03 3706318 m, 98317 m/sec, 10060154 t fired, .
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[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-14: LTL true skeleton: LTL model checker
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-15: INITIAL false preprocessing
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 22 LTL EXCL 40/399 37/2000 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-03 4178111 m, 94358 m/sec, 11416392 t fired, .
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[lola][.] 22 LTL EXCL 45/399 41/2000 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-03 4628114 m, 90000 m/sec, 12768237 t fired, .
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[lola][.] 22 LTL EXCL 50/399 45/2000 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-03 5077145 m, 89806 m/sec, 14084365 t fired, .
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[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-09: INITIAL true preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-11: INITIAL false preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-13: INITIAL false preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-14: LTL true skeleton: LTL model checker
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-15: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-03: LTL 0 0 1 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 22 LTL EXCL 55/399 49/2000 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-03 5518282 m, 88227 m/sec, 15425225 t fired, .
[lola][.]
[lola][.] Time elapsed: 57 secs. Pages in use: 49
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-00: LTL false LTL model checker
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-02: CONJ false preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-09: INITIAL true preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-11: INITIAL false preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-13: INITIAL false preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-14: LTL true skeleton: LTL model checker
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-15: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-03: LTL 0 0 1 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 22 LTL EXCL 60/399 53/2000 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-03 5949460 m, 86235 m/sec, 16760373 t fired, .
[lola][.]
[lola][.] Time elapsed: 62 secs. Pages in use: 53
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-00: LTL false LTL model checker
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-02: CONJ false preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-09: INITIAL true preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-11: INITIAL false preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-13: INITIAL false preprocessing
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-14: LTL true skeleton: LTL model checker
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-15: INITIAL false preprocessing
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-03: LTL 0 0 1 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[lola][.] UtilityControlRoom-PT-Z4T4N08-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 22 LTL EXCL 65/399 56/2000 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-03 6385171 m, 87142 m/sec, 18076716 t fired, .
[lola][.]
[lola][.] Time elapsed: 67 secs. Pages in use: 56
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I] FINISHED task # 22 (type EXCL) for UtilityControlRoom-PT-Z4T4N08-LTLCardinality-03
[lola][I] result : false
[lola][I] markings : 6662959
[lola][I] fired transitions : 18919352
[lola][I] time used : 68
[lola][I] memory pages used : 59
[lola][I] LAUNCH task # 49 (type EXCL) for 48 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-12
[lola][I] time limit : 441 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 49 (type EXCL) for UtilityControlRoom-PT-Z4T4N08-LTLCardinality-12
[lola][I] result : false
[lola][I] markings : 107
[lola][I] fired transitions : 110
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 43 (type EXCL) for 42 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-10
[lola][I] time limit : 504 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 43 (type EXCL) for UtilityControlRoom-PT-Z4T4N08-LTLCardinality-10
[lola][I] result : false
[lola][I] markings : 40
[lola][I] fired transitions : 40
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 37 (type EXCL) for 36 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-08
[lola][I] time limit : 588 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 37 (type EXCL) for UtilityControlRoom-PT-Z4T4N08-LTLCardinality-08
[lola][I] result : false
[lola][I] markings : 40
[lola][I] fired transitions : 40
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 34 (type EXCL) for 33 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-07
[lola][I] time limit : 706 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 34 (type EXCL) for UtilityControlRoom-PT-Z4T4N08-LTLCardinality-07
[lola][I] result : false
[lola][I] markings : 40
[lola][I] fired transitions : 40
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 31 (type EXCL) for 30 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-06
[lola][I] time limit : 882 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 31 (type EXCL) for UtilityControlRoom-PT-Z4T4N08-LTLCardinality-06
[lola][I] result : false
[lola][I] markings : 115
[lola][I] fired transitions : 115
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 28 (type EXCL) for 27 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-05
[lola][I] time limit : 1176 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 28 (type EXCL) for UtilityControlRoom-PT-Z4T4N08-LTLCardinality-05
[lola][I] result : false
[lola][I] markings : 40
[lola][I] fired transitions : 40
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 25 (type EXCL) for 24 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-04
[lola][I] time limit : 1765 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 25 (type EXCL) for UtilityControlRoom-PT-Z4T4N08-LTLCardinality-04
[lola][I] result : false
[lola][I] markings : 40
[lola][I] fired transitions : 40
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 4 (type EXCL) for 3 UtilityControlRoom-PT-Z4T4N08-LTLCardinality-01
[lola][I] time limit : 3530 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 4 (type EXCL) for UtilityControlRoom-PT-Z4T4N08-LTLCardinality-01
[lola][I] result : false
[lola][I] markings : 58
[lola][I] fired transitions : 59
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] Portfolio finished: no open formulas

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-PT-Z4T4N08"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is UtilityControlRoom-PT-Z4T4N08, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r445-smll-171701112200267"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-PT-Z4T4N08.tgz
mv UtilityControlRoom-PT-Z4T4N08 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;