About the Execution of LoLA for UtilityControlRoom-PT-Z2T4N06
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 10621.768 | 1341830.00 | 1373844.00 | 3301.60 | FFFFTTFFFFFFFFTT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r445-smll-171701112000193.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is UtilityControlRoom-PT-Z2T4N06, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r445-smll-171701112000193
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.4M
-rw-r--r-- 1 mcc users 33K Apr 13 05:28 CTLCardinality.txt
-rw-r--r-- 1 mcc users 187K Apr 13 05:28 CTLCardinality.xml
-rw-r--r-- 1 mcc users 24K Apr 13 05:25 CTLFireability.txt
-rw-r--r-- 1 mcc users 120K Apr 13 05:25 CTLFireability.xml
-rw-r--r-- 1 mcc users 7.8K Apr 23 08:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 37K Apr 23 08:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 12K Apr 23 08:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 42K Apr 23 08:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 60K Apr 13 05:37 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 341K Apr 13 05:37 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 67K Apr 13 05:35 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 300K Apr 13 05:35 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.8K Apr 23 08:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.9K Apr 23 08:04 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 8 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 70K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-00
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-01
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-02
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-03
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-04
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-05
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-06
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-07
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-08
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-09
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-10
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-11
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-12
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-13
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-15
=== Now, execution of the tool begins
BK_START 1717087632861
FORMULA UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-02: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[32mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-04: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-08: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-12: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-13: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-15: INITIAL true preprocessing[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 1342 secs. Pages in use: 239
BK_STOP 1717088974691
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLCardinality.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 48 (type SKEL/SRCH) for 12 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 48 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 49 (type SKEL/SRCH) for 36 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 49 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 28
[[35mlola[0m][I] fired transitions : 28
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 1 (type CNST) for 0 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-00
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 7 (type CNST) for 6 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-02
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 10 (type CNST) for 9 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-03
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 10 (type CNST) for UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 7 (type CNST) for UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 16 (type CNST) for 15 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-05
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 19 (type CNST) for 18 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-06
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] planning for UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-12 stopped (result already fixed).
[[35mlola[0m][I] LAUNCH task # 4 (type CNST) for 3 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-01
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 22 (type CNST) for 21 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-07
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 28 (type CNST) for 27 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-09
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 31 (type CNST) for 30 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-10
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 46 (type CNST) for 45 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-15
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 46 (type CNST) for UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 1 (type CNST) for UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 19 (type CNST) for UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 4 (type CNST) for UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 22 (type CNST) for UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 28 (type CNST) for UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 31 (type CNST) for UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 16 (type CNST) for UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 43 (type EXCL) for 42 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14
[[35mlola[0m][I] time limit : 719 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-02: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-12: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 5/719 2/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14 369728 m, 73945 m/sec, 2110129 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 9 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-01: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-02: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-03: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-10: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-12: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-15: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 43 CTL EXCL 10/719 4/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14 728760 m, 71806 m/sec, 4307687 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 14 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-00: INITIAL false preprocessing[0m
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[[35mlola[0m][.] 43 CTL EXCL 15/719 5/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14 1105467 m, 75341 m/sec, 6680022 t fired, .
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[[35mlola[0m][.] 43 CTL EXCL 50/719 16/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14 3466311 m, 66472 m/sec, 22313960 t fired, .
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[[35mlola[0m][.] 43 CTL EXCL 55/719 17/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14 3797466 m, 66231 m/sec, 24569962 t fired, .
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[[35mlola[0m][.] 43 CTL EXCL 60/719 18/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14 4124235 m, 65353 m/sec, 26829366 t fired, .
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[[35mlola[0m][.] 43 CTL EXCL 65/719 20/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14 4448516 m, 64856 m/sec, 29077243 t fired, .
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[[35mlola[0m][.] 43 CTL EXCL 70/719 21/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14 4770643 m, 64425 m/sec, 31320669 t fired, .
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[[35mlola[0m][.] 43 CTL EXCL 75/719 23/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14 5090267 m, 63924 m/sec, 33563334 t fired, .
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[[35mlola[0m][.] 43 CTL EXCL 80/719 24/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14 5406158 m, 63178 m/sec, 35788545 t fired, .
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[[35mlola[0m][.] 43 CTL EXCL 90/719 27/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14 6042466 m, 64497 m/sec, 40310835 t fired, .
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[[35mlola[0m][.] 43 CTL EXCL 95/719 28/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14 6363776 m, 64262 m/sec, 42619121 t fired, .
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[[35mlola[0m][.] 43 CTL EXCL 100/719 29/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14 6681203 m, 63485 m/sec, 44911245 t fired, .
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[[35mlola[0m][.] 43 CTL EXCL 105/719 31/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14 6996623 m, 63084 m/sec, 47196778 t fired, .
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[[35mlola[0m][.] 43 CTL EXCL 135/719 39/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14 8838050 m, 60455 m/sec, 60795098 t fired, .
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[[35mlola[0m][.] 43 CTL EXCL 170/719 48/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14 10898046 m, 57389 m/sec, 76498545 t fired, .
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[[35mlola[0m][.] 43 CTL EXCL 175/719 49/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14 11184400 m, 57270 m/sec, 78732110 t fired, .
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[[35mlola[0m][.] 43 CTL EXCL 205/719 56/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14 12875113 m, 55484 m/sec, 92078168 t fired, .
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[[35mlola[0m][.] 43 CTL EXCL 245/719 65/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14 15039810 m, 52956 m/sec, 109789581 t fired, .
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[[35mlola[0m][.] 43 CTL EXCL 285/719 74/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14 17092289 m, 50222 m/sec, 127374038 t fired, .
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[[35mlola[0m][.] 43 CTL EXCL 290/719 75/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14 17341524 m, 49847 m/sec, 129562635 t fired, .
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[[35mlola[0m][.] 43 CTL EXCL 360/719 89/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14 20646421 m, 44796 m/sec, 160187256 t fired, .
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[[35mlola[0m][.] 43 CTL EXCL 475/719 109/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14 25345971 m, 40138 m/sec, 210281738 t fired, .
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[[35mlola[0m][.] 43 CTL EXCL 665/719 119/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14 27618671 m, 88 m/sec, 287606303 t fired, .
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[[35mlola[0m][.] 43 CTL EXCL 705/719 119/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14 27621407 m, 37 m/sec, 304196369 t fired, .
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[[35mlola[0m][.] 43 CTL EXCL 710/719 119/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-14 27621563 m, 31 m/sec, 306325492 t fired, .
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[[35mlola[0m][.] 34 CTL EXCL 425/953 119/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-11 27571691 m, 1736 m/sec, 188712489 t fired, .
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[[35mlola[0m][.] 34 CTL EXCL 430/953 119/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-11 27577230 m, 1107 m/sec, 190581450 t fired, .
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[[35mlola[0m][.] 34 CTL EXCL 460/953 119/2000 UtilityControlRoom-PT-Z2T4N06-CTLCardinality-2024-11 27601101 m, 538 m/sec, 201964088 t fired, .
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[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-PT-Z2T4N06"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is UtilityControlRoom-PT-Z2T4N06, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r445-smll-171701112000193"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-PT-Z2T4N06.tgz
mv UtilityControlRoom-PT-Z2T4N06 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;