About the Execution of LoLA for UtilityControlRoom-PT-Z2T3N08
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
16206.663 | 664069.00 | 958398.00 | 3244.10 | F??F??TT?????FT? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r445-smll-171701111900161.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is UtilityControlRoom-PT-Z2T3N08, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r445-smll-171701111900161
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.1M
-rw-r--r-- 1 mcc users 28K Apr 13 05:35 CTLCardinality.txt
-rw-r--r-- 1 mcc users 154K Apr 13 05:35 CTLCardinality.xml
-rw-r--r-- 1 mcc users 25K Apr 13 05:32 CTLFireability.txt
-rw-r--r-- 1 mcc users 120K Apr 13 05:32 CTLFireability.xml
-rw-r--r-- 1 mcc users 12K Apr 23 08:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 45K Apr 23 08:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 13K Apr 23 08:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 42K Apr 23 08:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 38K Apr 13 05:42 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 210K Apr 13 05:42 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 46K Apr 13 05:40 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 198K Apr 13 05:40 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.9K Apr 23 08:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.8K Apr 23 08:04 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 8 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 93K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14
FORMULA_NAME UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15
=== Now, execution of the tool begins
BK_START 1717079966610
FORMULA UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717080630679
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLCardinality.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 48 (type SKEL/SRCH) for 9 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 48 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 34
[[35mlola[0m][I] fired transitions : 34
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] planning for UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03 stopped (result already fixed).
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 49 (type SKEL/SRCH) for 21 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 49 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 1 (type CNST) for 0 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 1 (type CNST) for UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 19 (type CNST) for 18 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 19 (type CNST) for UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 40 (type CNST) for 39 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 40 (type CNST) for UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 50 (type SKEL/SRCH) for 33 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 50 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 22 (type EXCL) for 21 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07
[[35mlola[0m][I] time limit : 199 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 22 (type EXCL) for UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 9
[[35mlola[0m][I] fired transitions : 8
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 43 (type CNST) for 42 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 43 (type CNST) for UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 16 (type EXCL) for 15 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 58 (type EQUN) for 27 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 60 (type EQUN) for 27 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 54 (type EQUN) for 6 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 54 (type EQUN) for UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] LAUNCH task # 62 (type EQUN) for 6 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 58 (type EQUN) for UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 67 (type EQUN) for 36 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 60 (type EQUN) for UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] FINISHED task # 62 (type EQUN) for UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 67 (type EQUN) for UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 5/359 5/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 909754 m, 181950 m/sec, 3004977 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 8 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 10/359 9/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 1822822 m, 182613 m/sec, 6275386 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 13 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 15/359 12/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 2687993 m, 173034 m/sec, 9533887 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 18 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 20/359 16/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 3517220 m, 165845 m/sec, 12736222 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 23 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 25/359 20/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 4363419 m, 169239 m/sec, 15873364 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 28 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 30/359 23/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 5076571 m, 142630 m/sec, 18625094 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 33 secs. Pages in use: 23
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 35/359 26/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 5843923 m, 153470 m/sec, 21610124 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 38 secs. Pages in use: 26
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 40/359 29/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 6574497 m, 146114 m/sec, 24667460 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 43 secs. Pages in use: 29
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 45/359 32/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 7349744 m, 155049 m/sec, 27643728 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 48 secs. Pages in use: 32
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 50/359 36/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 8068721 m, 143795 m/sec, 30701503 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 53 secs. Pages in use: 36
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 55/359 39/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 8771789 m, 140613 m/sec, 33682637 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 58 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 60/359 41/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 9441718 m, 133985 m/sec, 36862758 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 63 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 65/359 44/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 10145711 m, 140798 m/sec, 39811003 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 68 secs. Pages in use: 44
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 70/359 48/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 10848589 m, 140575 m/sec, 42783760 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 73 secs. Pages in use: 48
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 75/359 51/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 11582098 m, 146701 m/sec, 45753793 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 78 secs. Pages in use: 51
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 80/359 54/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 12304819 m, 144544 m/sec, 48752104 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 83 secs. Pages in use: 54
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 85/359 57/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 13003391 m, 139714 m/sec, 51682478 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 88 secs. Pages in use: 57
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 90/359 60/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 13706547 m, 140631 m/sec, 54644330 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 93 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 95/359 63/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 14391034 m, 136897 m/sec, 57625262 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 98 secs. Pages in use: 63
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 100/359 65/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 15034553 m, 128703 m/sec, 60786406 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 103 secs. Pages in use: 65
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 105/359 68/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 15715715 m, 136232 m/sec, 63705773 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 108 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 110/359 71/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 16398735 m, 136604 m/sec, 66541545 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 113 secs. Pages in use: 71
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 115/359 74/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 17071699 m, 134592 m/sec, 69466410 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 118 secs. Pages in use: 74
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 120/359 77/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 17737672 m, 133194 m/sec, 72435737 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 123 secs. Pages in use: 77
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 125/359 80/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 18394875 m, 131440 m/sec, 75313003 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 128 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 130/359 83/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 19085124 m, 138049 m/sec, 78241219 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 133 secs. Pages in use: 83
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 135/359 85/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 19709926 m, 124960 m/sec, 81236424 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 138 secs. Pages in use: 85
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 140/359 88/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 20379635 m, 133941 m/sec, 84081994 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 143 secs. Pages in use: 88
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 145/359 91/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 21035604 m, 131193 m/sec, 87034994 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 148 secs. Pages in use: 91
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 150/359 94/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 21699542 m, 132787 m/sec, 89872822 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 153 secs. Pages in use: 94
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 155/359 97/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 22317510 m, 123593 m/sec, 92841685 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 158 secs. Pages in use: 97
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 160/359 99/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 22962189 m, 128935 m/sec, 95788082 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 163 secs. Pages in use: 99
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 165/359 102/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 23632082 m, 133978 m/sec, 98614289 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 168 secs. Pages in use: 102
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 170/359 105/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 24285069 m, 130597 m/sec, 101465873 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 173 secs. Pages in use: 105
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 175/359 108/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 24929057 m, 128797 m/sec, 104332582 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 178 secs. Pages in use: 108
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 180/359 110/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 25577743 m, 129737 m/sec, 107191869 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 183 secs. Pages in use: 110
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 185/359 113/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 26216496 m, 127750 m/sec, 110079868 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 188 secs. Pages in use: 113
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 190/359 116/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 26858543 m, 128409 m/sec, 112914828 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 193 secs. Pages in use: 116
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 195/359 119/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 27483316 m, 124954 m/sec, 115704312 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 198 secs. Pages in use: 119
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 200/359 121/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 28138598 m, 131056 m/sec, 118556022 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 203 secs. Pages in use: 121
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 205/359 124/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 28758631 m, 124006 m/sec, 121318761 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 208 secs. Pages in use: 124
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 210/359 127/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 29365195 m, 121312 m/sec, 124105629 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 213 secs. Pages in use: 127
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 215/359 129/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 29984528 m, 123866 m/sec, 126950093 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 218 secs. Pages in use: 129
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 220/359 132/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 30595585 m, 122211 m/sec, 129752441 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 223 secs. Pages in use: 132
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 225/359 134/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 31184892 m, 117861 m/sec, 132750525 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 228 secs. Pages in use: 134
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 230/359 137/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 31797509 m, 122523 m/sec, 135629542 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 233 secs. Pages in use: 137
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 235/359 140/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 32421979 m, 124894 m/sec, 138415286 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 238 secs. Pages in use: 140
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 240/359 142/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 33035526 m, 122709 m/sec, 141163148 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 243 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 245/359 145/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 33609674 m, 114829 m/sec, 143831245 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 248 secs. Pages in use: 145
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 250/359 147/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 34199903 m, 118045 m/sec, 146678065 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 253 secs. Pages in use: 147
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 255/359 150/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 34804741 m, 120967 m/sec, 149457355 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 258 secs. Pages in use: 150
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 260/359 152/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 35422847 m, 123621 m/sec, 152243260 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 263 secs. Pages in use: 152
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 265/359 155/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 36021157 m, 119662 m/sec, 155019683 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 268 secs. Pages in use: 155
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 270/359 158/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 36627992 m, 121367 m/sec, 157850997 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 273 secs. Pages in use: 158
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 275/359 160/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 37223490 m, 119099 m/sec, 160792192 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 278 secs. Pages in use: 160
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 280/359 163/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 37851614 m, 125624 m/sec, 163613598 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 283 secs. Pages in use: 163
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 285/359 165/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 38444293 m, 118535 m/sec, 166427891 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 288 secs. Pages in use: 165
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 290/359 168/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 39056018 m, 122345 m/sec, 169198495 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 293 secs. Pages in use: 168
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 295/359 171/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 39655036 m, 119803 m/sec, 171944062 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 298 secs. Pages in use: 171
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 300/359 173/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 40197152 m, 108423 m/sec, 174479535 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 303 secs. Pages in use: 173
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 305/359 175/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 40785602 m, 117690 m/sec, 177254423 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 308 secs. Pages in use: 175
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 310/359 178/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 41353658 m, 113611 m/sec, 180043760 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 313 secs. Pages in use: 178
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 315/359 180/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 41956394 m, 120547 m/sec, 182849102 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 318 secs. Pages in use: 180
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 320/359 183/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 42547150 m, 118151 m/sec, 185624824 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 323 secs. Pages in use: 183
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 325/359 185/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 43164024 m, 123374 m/sec, 188407722 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 328 secs. Pages in use: 185
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 330/359 188/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 43704449 m, 108085 m/sec, 191106409 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 333 secs. Pages in use: 188
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 335/359 190/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 44261960 m, 111502 m/sec, 193665074 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 338 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 340/359 192/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 44782259 m, 104059 m/sec, 196141961 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 343 secs. Pages in use: 192
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 345/359 195/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 45361587 m, 115865 m/sec, 198880500 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 348 secs. Pages in use: 195
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 350/359 197/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 45943085 m, 116299 m/sec, 201657448 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 353 secs. Pages in use: 197
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 355/359 200/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 46532803 m, 117943 m/sec, 204449641 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 358 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 16 (type EXCL) for UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 363 secs. Pages in use: 202
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 46 (type EXCL) for 45 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15
[[35mlola[0m][I] time limit : 359 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 16 (type EXCL) for 15 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05
[[35mlola[0m][I] time limit : 3237 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 16 CTL EXCL 5/3237 5/5 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 915763 m, -9123408 m/sec, 3025155 t fired, .
[[35mlola[0m][.] 46 CTL EXCL 5/359 2/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 277573 m, 55514 m/sec, 889785 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 368 secs. Pages in use: 212
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 16 (type EXCL) for UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 10/323 3/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 539407 m, 52366 m/sec, 1773753 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 373 secs. Pages in use: 213
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 15/359 4/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 806210 m, 53360 m/sec, 2701222 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 378 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 20/359 5/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 1065919 m, 51941 m/sec, 3619331 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 383 secs. Pages in use: 217
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 25/359 6/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 1320769 m, 50970 m/sec, 4529806 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 388 secs. Pages in use: 220
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 30/359 8/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 1572792 m, 50404 m/sec, 5438943 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 393 secs. Pages in use: 225
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 35/359 9/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 1822984 m, 50038 m/sec, 6348258 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 398 secs. Pages in use: 228
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 40/359 10/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 2070264 m, 49456 m/sec, 7258223 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 403 secs. Pages in use: 231
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 45/359 11/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 2309369 m, 47821 m/sec, 8140796 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 408 secs. Pages in use: 234
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 50/359 12/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 2553258 m, 48777 m/sec, 9047383 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 413 secs. Pages in use: 237
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 55/359 13/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 2801486 m, 49645 m/sec, 9973956 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 418 secs. Pages in use: 241
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 60/359 14/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 3046109 m, 48924 m/sec, 10902179 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 423 secs. Pages in use: 244
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 65/359 15/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 3288498 m, 48477 m/sec, 11819703 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 428 secs. Pages in use: 247
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 70/359 16/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 3531208 m, 48542 m/sec, 12745126 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 433 secs. Pages in use: 250
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 75/359 17/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 3770829 m, 47924 m/sec, 13660880 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 438 secs. Pages in use: 254
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 80/359 18/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 3999449 m, 45724 m/sec, 14537548 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 443 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 85/359 19/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 4223402 m, 44790 m/sec, 15394843 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 448 secs. Pages in use: 260
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 90/359 20/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 4455610 m, 46441 m/sec, 16292381 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 453 secs. Pages in use: 263
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 95/359 21/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 4689138 m, 46705 m/sec, 17195596 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 458 secs. Pages in use: 266
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 100/359 22/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 4922846 m, 46741 m/sec, 18109434 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 463 secs. Pages in use: 270
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 105/359 24/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 5153487 m, 46128 m/sec, 19003392 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 468 secs. Pages in use: 274
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 110/359 25/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 5384673 m, 46237 m/sec, 19902979 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 473 secs. Pages in use: 277
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 115/359 26/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 5618172 m, 46699 m/sec, 20818356 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 478 secs. Pages in use: 280
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 120/359 27/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 5843354 m, 45036 m/sec, 21708884 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 483 secs. Pages in use: 283
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 125/359 28/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 6069219 m, 45173 m/sec, 22597412 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 488 secs. Pages in use: 287
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 130/359 29/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 6299722 m, 46100 m/sec, 23510707 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 493 secs. Pages in use: 290
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 135/359 30/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 6530677 m, 46191 m/sec, 24420094 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 498 secs. Pages in use: 293
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 140/359 31/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 6759529 m, 45770 m/sec, 25328757 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 503 secs. Pages in use: 296
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 145/359 32/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 6988410 m, 45776 m/sec, 26235771 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 508 secs. Pages in use: 300
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 150/359 33/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 7217785 m, 45875 m/sec, 27146946 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 513 secs. Pages in use: 303
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 155/359 34/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 7446084 m, 45659 m/sec, 28055384 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 518 secs. Pages in use: 306
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 160/359 35/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 7671311 m, 45045 m/sec, 28959582 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 523 secs. Pages in use: 309
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 165/359 36/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 7894279 m, 44593 m/sec, 29854924 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 528 secs. Pages in use: 313
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 170/359 37/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 8109399 m, 43024 m/sec, 30718101 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 533 secs. Pages in use: 316
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 175/359 38/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 8318942 m, 41908 m/sec, 31565380 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 538 secs. Pages in use: 319
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 180/359 39/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 8546766 m, 45564 m/sec, 32485992 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 543 secs. Pages in use: 322
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 185/359 40/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 8776288 m, 45904 m/sec, 33418591 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 548 secs. Pages in use: 325
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 190/359 41/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 9003038 m, 45350 m/sec, 34337180 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 553 secs. Pages in use: 328
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 195/359 42/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 9228555 m, 45103 m/sec, 35254046 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 558 secs. Pages in use: 331
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 200/359 43/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 9454475 m, 45184 m/sec, 36175296 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 563 secs. Pages in use: 334
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 205/359 44/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 9682162 m, 45537 m/sec, 37104012 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 568 secs. Pages in use: 337
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 210/359 45/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 9909428 m, 45453 m/sec, 38032468 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 573 secs. Pages in use: 340
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 215/359 46/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 10133353 m, 44785 m/sec, 38949312 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 578 secs. Pages in use: 343
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 220/359 46/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 10355950 m, 44519 m/sec, 39863694 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 583 secs. Pages in use: 346
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 225/359 47/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 10578309 m, 44471 m/sec, 40772841 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 588 secs. Pages in use: 349
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 230/359 48/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 10800904 m, 44519 m/sec, 41687058 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 593 secs. Pages in use: 352
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 235/359 49/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 11006655 m, 41150 m/sec, 42527837 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 598 secs. Pages in use: 355
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 240/359 50/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 11228224 m, 44313 m/sec, 43443880 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 603 secs. Pages in use: 358
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 245/359 51/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 11446860 m, 43727 m/sec, 44345002 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 608 secs. Pages in use: 361
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 250/359 52/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 11666341 m, 43896 m/sec, 45247629 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 613 secs. Pages in use: 364
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 255/359 53/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 11883237 m, 43379 m/sec, 46146303 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 618 secs. Pages in use: 367
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 260/359 54/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 12078057 m, 38964 m/sec, 46953082 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 623 secs. Pages in use: 371
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 265/359 55/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 12295438 m, 43476 m/sec, 47853174 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 628 secs. Pages in use: 374
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 270/359 56/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 12516815 m, 44275 m/sec, 48771061 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 633 secs. Pages in use: 377
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 275/359 57/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 12735884 m, 43813 m/sec, 49678822 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 638 secs. Pages in use: 380
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 280/359 58/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 12956396 m, 44102 m/sec, 50598412 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 643 secs. Pages in use: 383
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-03: LTL/CTL false skeleton: LTL model checker[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-06: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-07: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mUtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-14: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-02: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-09: EFAGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-12: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 285/359 59/2000 UtilityControlRoom-PT-Z2T3N08-CTLCardinality-2024-15 13173431 m, 43407 m/sec, 51502122 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 648 secs. Pages in use: 385
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 402 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-PT-Z2T3N08"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is UtilityControlRoom-PT-Z2T3N08, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r445-smll-171701111900161"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-PT-Z2T3N08.tgz
mv UtilityControlRoom-PT-Z2T3N08 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;