Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r443-smll-171701110100250.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.....................
=====================================================================
Generated by BenchKit 2-5568
Executing tool greatspnxred
Input is UtilityControlRoom-PT-Z4T4N04, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r443-smll-171701110100250
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.7M
-rw-r--r-- 1 mcc users 27K Apr 13 05:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 153K Apr 13 05:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 52K Apr 13 05:19 CTLFireability.txt
-rw-r--r-- 1 mcc users 220K Apr 13 05:19 CTLFireability.xml
-rw-r--r-- 1 mcc users 15K Apr 23 08:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 55K Apr 23 08:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 13K Apr 23 08:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 46K Apr 23 08:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 59K Apr 13 05:32 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 321K Apr 13 05:32 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 103K Apr 13 05:29 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 406K Apr 13 05:29 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 3.8K Apr 23 08:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 8.3K Apr 23 08:04 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 8 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 128K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-00
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-01
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-02
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-03
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-04
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-05
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-06
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-07
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-08
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-09
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-10
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-11
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-12
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-13
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-14
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717082094386

Invoking MCC driver with
BK_TOOL=greatspnxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-PT-Z4T4N04
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool greatspn
Invoking reducer
Running Version 202405141337
[2024-05-30 15:14:57] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-05-30 15:14:57] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-30 15:14:57] [INFO ] Load time of PNML (sax parser for PT used): 157 ms
[2024-05-30 15:14:57] [INFO ] Transformed 154 places.
[2024-05-30 15:14:57] [INFO ] Transformed 300 transitions.
[2024-05-30 15:14:57] [INFO ] Parsed PT model containing 154 places and 300 transitions and 964 arcs in 377 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 60 ms.
[2024-05-30 15:14:57] [INFO ] Reduced 12 identical enabling conditions.
[2024-05-30 15:14:57] [INFO ] Reduced 12 identical enabling conditions.
[2024-05-30 15:14:57] [INFO ] Reduced 12 identical enabling conditions.
[2024-05-30 15:14:57] [INFO ] Reduced 12 identical enabling conditions.
[2024-05-30 15:14:57] [INFO ] Reduced 12 identical enabling conditions.
[2024-05-30 15:14:57] [INFO ] Reduced 12 identical enabling conditions.
Ensure Unique test removed 64 transitions
Reduce redundant transitions removed 64 transitions.
Support contains 154 out of 154 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Applied a total of 0 rules in 22 ms. Remains 154 /154 variables (removed 0) and now considering 236/236 (removed 0) transitions.
// Phase 1: matrix 236 rows 154 cols
[2024-05-30 15:14:57] [INFO ] Computed 11 invariants in 54 ms
[2024-05-30 15:14:58] [INFO ] Implicit Places using invariants in 425 ms returned []
[2024-05-30 15:14:58] [INFO ] Invariant cache hit.
[2024-05-30 15:14:58] [INFO ] Implicit Places using invariants and state equation in 290 ms returned []
Implicit Place search using SMT with State Equation took 789 ms to find 0 implicit places.
Running 232 sub problems to find dead transitions.
[2024-05-30 15:14:58] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/150 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 232 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/150 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 232 unsolved
At refinement iteration 2 (OVERLAPS) 4/154 variables, 9/11 constraints. Problems are: Problem set: 0 solved, 232 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/154 variables, 0/11 constraints. Problems are: Problem set: 0 solved, 232 unsolved
At refinement iteration 4 (OVERLAPS) 236/390 variables, 154/165 constraints. Problems are: Problem set: 0 solved, 232 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/390 variables, 0/165 constraints. Problems are: Problem set: 0 solved, 232 unsolved
At refinement iteration 6 (OVERLAPS) 0/390 variables, 0/165 constraints. Problems are: Problem set: 0 solved, 232 unsolved
No progress, stopping.
After SMT solving in domain Real declared 390/390 variables, and 165 constraints, problems are : Problem set: 0 solved, 232 unsolved in 12289 ms.
Refiners :[Positive P Invariants (semi-flows): 11/11 constraints, State Equation: 154/154 constraints, PredecessorRefiner: 232/232 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 232 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/150 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 232 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/150 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 232 unsolved
At refinement iteration 2 (OVERLAPS) 4/154 variables, 9/11 constraints. Problems are: Problem set: 0 solved, 232 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/154 variables, 0/11 constraints. Problems are: Problem set: 0 solved, 232 unsolved
At refinement iteration 4 (OVERLAPS) 236/390 variables, 154/165 constraints. Problems are: Problem set: 0 solved, 232 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/390 variables, 232/397 constraints. Problems are: Problem set: 0 solved, 232 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/390 variables, 0/397 constraints. Problems are: Problem set: 0 solved, 232 unsolved
At refinement iteration 7 (OVERLAPS) 0/390 variables, 0/397 constraints. Problems are: Problem set: 0 solved, 232 unsolved
No progress, stopping.
After SMT solving in domain Int declared 390/390 variables, and 397 constraints, problems are : Problem set: 0 solved, 232 unsolved in 14620 ms.
Refiners :[Positive P Invariants (semi-flows): 11/11 constraints, State Equation: 154/154 constraints, PredecessorRefiner: 232/232 constraints, Known Traps: 0/0 constraints]
After SMT, in 27367ms problems are : Problem set: 0 solved, 232 unsolved
Search for dead transitions found 0 dead transitions in 27394ms
Finished structural reductions in LTL mode , in 1 iterations and 28248 ms. Remains : 154/154 places, 236/236 transitions.
Support contains 154 out of 154 places after structural reductions.
[2024-05-30 15:15:26] [INFO ] Flatten gal took : 88 ms
[2024-05-30 15:15:26] [INFO ] Flatten gal took : 79 ms
[2024-05-30 15:15:27] [INFO ] Input system was already deterministic with 236 transitions.
Reduction of identical properties reduced properties to check from 80 to 79
RANDOM walk for 40000 steps (8 resets) in 3791 ms. (10 steps per ms) remains 2/79 properties
BEST_FIRST walk for 40003 steps (8 resets) in 959 ms. (41 steps per ms) remains 2/2 properties
BEST_FIRST walk for 40004 steps (8 resets) in 101 ms. (392 steps per ms) remains 2/2 properties
[2024-05-30 15:15:28] [INFO ] Invariant cache hit.
Problem AtomicPropp21 is UNSAT
At refinement iteration 0 (INCLUDED_ONLY) 0/37 variables, 0/0 constraints. Problems are: Problem set: 1 solved, 1 unsolved
Problem AtomicPropp79 is UNSAT
After SMT solving in domain Real declared 145/390 variables, and 6 constraints, problems are : Problem set: 2 solved, 0 unsolved in 99 ms.
Refiners :[Positive P Invariants (semi-flows): 6/11 constraints, State Equation: 0/154 constraints, PredecessorRefiner: 2/2 constraints, Known Traps: 0/0 constraints]
After SMT, in 242ms problems are : Problem set: 2 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 2 atomic propositions for a total of 16 simplifications.
FORMULA UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-05-30 15:15:28] [INFO ] Flatten gal took : 30 ms
[2024-05-30 15:15:29] [INFO ] Flatten gal took : 35 ms
[2024-05-30 15:15:29] [INFO ] Input system was already deterministic with 236 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Applied a total of 0 rules in 3 ms. Remains 154 /154 variables (removed 0) and now considering 236/236 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 154/154 places, 236/236 transitions.
[2024-05-30 15:15:29] [INFO ] Flatten gal took : 18 ms
[2024-05-30 15:15:29] [INFO ] Flatten gal took : 19 ms
[2024-05-30 15:15:29] [INFO ] Input system was already deterministic with 236 transitions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Applied a total of 0 rules in 7 ms. Remains 154 /154 variables (removed 0) and now considering 236/236 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 154/154 places, 236/236 transitions.
[2024-05-30 15:15:29] [INFO ] Flatten gal took : 16 ms
[2024-05-30 15:15:29] [INFO ] Flatten gal took : 16 ms
[2024-05-30 15:15:29] [INFO ] Input system was already deterministic with 236 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Performed 64 Post agglomeration using F-continuation condition.Transition count delta: 64
Iterating post reduction 0 with 64 rules applied. Total rules applied 64 place count 154 transition count 172
Reduce places removed 64 places and 0 transitions.
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Iterating post reduction 1 with 80 rules applied. Total rules applied 144 place count 90 transition count 156
Performed 16 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 16 Pre rules applied. Total rules applied 144 place count 90 transition count 140
Deduced a syphon composed of 16 places in 0 ms
Reduce places removed 16 places and 0 transitions.
Iterating global reduction 2 with 32 rules applied. Total rules applied 176 place count 74 transition count 140
Applied a total of 176 rules in 43 ms. Remains 74 /154 variables (removed 80) and now considering 140/236 (removed 96) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 44 ms. Remains : 74/154 places, 140/236 transitions.
[2024-05-30 15:15:29] [INFO ] Flatten gal took : 9 ms
[2024-05-30 15:15:29] [INFO ] Flatten gal took : 10 ms
[2024-05-30 15:15:29] [INFO ] Input system was already deterministic with 140 transitions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Applied a total of 0 rules in 2 ms. Remains 154 /154 variables (removed 0) and now considering 236/236 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 154/154 places, 236/236 transitions.
[2024-05-30 15:15:29] [INFO ] Flatten gal took : 16 ms
[2024-05-30 15:15:29] [INFO ] Flatten gal took : 26 ms
[2024-05-30 15:15:29] [INFO ] Input system was already deterministic with 236 transitions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Applied a total of 0 rules in 3 ms. Remains 154 /154 variables (removed 0) and now considering 236/236 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 154/154 places, 236/236 transitions.
[2024-05-30 15:15:29] [INFO ] Flatten gal took : 22 ms
[2024-05-30 15:15:29] [INFO ] Flatten gal took : 22 ms
[2024-05-30 15:15:29] [INFO ] Input system was already deterministic with 236 transitions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Applied a total of 0 rules in 5 ms. Remains 154 /154 variables (removed 0) and now considering 236/236 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 154/154 places, 236/236 transitions.
[2024-05-30 15:15:29] [INFO ] Flatten gal took : 17 ms
[2024-05-30 15:15:29] [INFO ] Flatten gal took : 18 ms
[2024-05-30 15:15:29] [INFO ] Input system was already deterministic with 236 transitions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Applied a total of 0 rules in 4 ms. Remains 154 /154 variables (removed 0) and now considering 236/236 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 154/154 places, 236/236 transitions.
[2024-05-30 15:15:29] [INFO ] Flatten gal took : 17 ms
[2024-05-30 15:15:29] [INFO ] Flatten gal took : 19 ms
[2024-05-30 15:15:29] [INFO ] Input system was already deterministic with 236 transitions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Discarding 47 places :
Symmetric choice reduction at 0 with 47 rule applications. Total rules 47 place count 107 transition count 189
Iterating global reduction 0 with 47 rules applied. Total rules applied 94 place count 107 transition count 189
Applied a total of 94 rules in 19 ms. Remains 107 /154 variables (removed 47) and now considering 189/236 (removed 47) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 20 ms. Remains : 107/154 places, 189/236 transitions.
[2024-05-30 15:15:29] [INFO ] Flatten gal took : 14 ms
[2024-05-30 15:15:29] [INFO ] Flatten gal took : 15 ms
[2024-05-30 15:15:29] [INFO ] Input system was already deterministic with 189 transitions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Discarding 44 places :
Symmetric choice reduction at 0 with 44 rule applications. Total rules 44 place count 110 transition count 192
Iterating global reduction 0 with 44 rules applied. Total rules applied 88 place count 110 transition count 192
Applied a total of 88 rules in 17 ms. Remains 110 /154 variables (removed 44) and now considering 192/236 (removed 44) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 17 ms. Remains : 110/154 places, 192/236 transitions.
[2024-05-30 15:15:29] [INFO ] Flatten gal took : 16 ms
[2024-05-30 15:15:30] [INFO ] Flatten gal took : 12 ms
[2024-05-30 15:15:30] [INFO ] Input system was already deterministic with 192 transitions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Discarding 47 places :
Symmetric choice reduction at 0 with 47 rule applications. Total rules 47 place count 107 transition count 189
Iterating global reduction 0 with 47 rules applied. Total rules applied 94 place count 107 transition count 189
Applied a total of 94 rules in 9 ms. Remains 107 /154 variables (removed 47) and now considering 189/236 (removed 47) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 107/154 places, 189/236 transitions.
[2024-05-30 15:15:30] [INFO ] Flatten gal took : 8 ms
[2024-05-30 15:15:30] [INFO ] Flatten gal took : 9 ms
[2024-05-30 15:15:30] [INFO ] Input system was already deterministic with 189 transitions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Discarding 47 places :
Symmetric choice reduction at 0 with 47 rule applications. Total rules 47 place count 107 transition count 189
Iterating global reduction 0 with 47 rules applied. Total rules applied 94 place count 107 transition count 189
Applied a total of 94 rules in 9 ms. Remains 107 /154 variables (removed 47) and now considering 189/236 (removed 47) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 107/154 places, 189/236 transitions.
[2024-05-30 15:15:30] [INFO ] Flatten gal took : 8 ms
[2024-05-30 15:15:30] [INFO ] Flatten gal took : 8 ms
[2024-05-30 15:15:30] [INFO ] Input system was already deterministic with 189 transitions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Discarding 44 places :
Symmetric choice reduction at 0 with 44 rule applications. Total rules 44 place count 110 transition count 192
Iterating global reduction 0 with 44 rules applied. Total rules applied 88 place count 110 transition count 192
Applied a total of 88 rules in 5 ms. Remains 110 /154 variables (removed 44) and now considering 192/236 (removed 44) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 110/154 places, 192/236 transitions.
[2024-05-30 15:15:30] [INFO ] Flatten gal took : 7 ms
[2024-05-30 15:15:30] [INFO ] Flatten gal took : 8 ms
[2024-05-30 15:15:30] [INFO ] Input system was already deterministic with 192 transitions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Discarding 48 places :
Symmetric choice reduction at 0 with 48 rule applications. Total rules 48 place count 106 transition count 188
Iterating global reduction 0 with 48 rules applied. Total rules applied 96 place count 106 transition count 188
Applied a total of 96 rules in 6 ms. Remains 106 /154 variables (removed 48) and now considering 188/236 (removed 48) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 106/154 places, 188/236 transitions.
[2024-05-30 15:15:30] [INFO ] Flatten gal took : 6 ms
[2024-05-30 15:15:30] [INFO ] Flatten gal took : 7 ms
[2024-05-30 15:15:30] [INFO ] Input system was already deterministic with 188 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Performed 64 Post agglomeration using F-continuation condition.Transition count delta: 64
Iterating post reduction 0 with 64 rules applied. Total rules applied 64 place count 154 transition count 172
Reduce places removed 64 places and 0 transitions.
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Iterating post reduction 1 with 80 rules applied. Total rules applied 144 place count 90 transition count 156
Performed 16 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 16 Pre rules applied. Total rules applied 144 place count 90 transition count 140
Deduced a syphon composed of 16 places in 1 ms
Reduce places removed 16 places and 0 transitions.
Iterating global reduction 2 with 32 rules applied. Total rules applied 176 place count 74 transition count 140
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 2 with 8 rules applied. Total rules applied 184 place count 70 transition count 136
Applied a total of 184 rules in 37 ms. Remains 70 /154 variables (removed 84) and now considering 136/236 (removed 100) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 38 ms. Remains : 70/154 places, 136/236 transitions.
[2024-05-30 15:15:30] [INFO ] Flatten gal took : 5 ms
[2024-05-30 15:15:30] [INFO ] Flatten gal took : 5 ms
[2024-05-30 15:15:30] [INFO ] Input system was already deterministic with 136 transitions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Discarding 48 places :
Symmetric choice reduction at 0 with 48 rule applications. Total rules 48 place count 106 transition count 188
Iterating global reduction 0 with 48 rules applied. Total rules applied 96 place count 106 transition count 188
Applied a total of 96 rules in 5 ms. Remains 106 /154 variables (removed 48) and now considering 188/236 (removed 48) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 106/154 places, 188/236 transitions.
[2024-05-30 15:15:30] [INFO ] Flatten gal took : 6 ms
[2024-05-30 15:15:30] [INFO ] Flatten gal took : 12 ms
[2024-05-30 15:15:30] [INFO ] Input system was already deterministic with 188 transitions.
[2024-05-30 15:15:30] [INFO ] Flatten gal took : 20 ms
[2024-05-30 15:15:30] [INFO ] Flatten gal took : 21 ms
[2024-05-30 15:15:30] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 27 ms.
[2024-05-30 15:15:30] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 154 places, 236 transitions and 708 arcs took 7 ms.
Total runtime 33562 ms.
There are residual formulas that ITS could not solve within timeout
----------------------------------------------------------------------
GreatSPN-meddly tool, MCC 2023
----------------------------------------------------------------------

Running UtilityControlRoom-PT-Z4T4N04

IS_COLORED=
IS_NUPN=

LOADING PETRI NET FILE /home/mcc/execution/412/model.pnml (PNML) ...
PNML VERSION 2009, P/T NET.
COLOR CLASSES: 0
CONSTANTS: 0
PLACES: 154
TRANSITIONS: 236
COLOR VARS: 0
MEASURES: 0
LOADING TIME: [User 0.006s, Sys 0.000s]


SAVING FILE /home/mcc/execution/412/model (.net / .def) ...
EXPORT TIME: [User 0.001s, Sys 0.000s]


----------------------------------------------------------------------
GreatSPN/Meddly.
Copyright (C) 1987-2022, University of Torino, Italy.
website: https://github.com/greatspn/SOURCES

Based on MEDDLY version 0.16.0
Copyright (C) 2009, Iowa State University Research Foundation, Inc.
website: http://meddly.sourceforge.net

Process ID: 556
MODEL NAME: /home/mcc/execution/412/model
154 places, 236 transitions.

Creating all event NSFs..
Creating all event NSFs..
Creating all event NSFs..
Creating all event NSFs..
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Building monolithic NSF...
FORMULA UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-02 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-00 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-01 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-03 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-05 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-08 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-07 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-10 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-11 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-09 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-12 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-15 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-13 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-06 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N04-CTLFireability-2024-14 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
Ok.
EXITCODE: 0
----------------------------------------------------------------------

BK_STOP 1717082138545

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-PT-Z4T4N04"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="greatspnxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool greatspnxred"
echo " Input is UtilityControlRoom-PT-Z4T4N04, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r443-smll-171701110100250"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-PT-Z4T4N04.tgz
mv UtilityControlRoom-PT-Z4T4N04 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;